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12 daysbuild(deps): bump pygments from 2.18.0 to 2.20.0 in /doc/sphinxdependabot/pip/doc/sphinx/pygments-2.20.0dependabot[bot]
Bumps [pygments](https://github.com/pygments/pygments) from 2.18.0 to 2.20.0. - [Release notes](https://github.com/pygments/pygments/releases) - [Changelog](https://github.com/pygments/pygments/blob/master/CHANGES) - [Commits](https://github.com/pygments/pygments/compare/2.18.0...2.20.0) --- updated-dependencies: - dependency-name: pygments dependency-version: 2.20.0 dependency-type: direct:production ... Signed-off-by: dependabot[bot] <[email protected]>
2026-03-27Merge tag 'doc-2026-04-rc6' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-efi Pull request doc-2026-04-rc6 CI: https://source.denx.de/u-boot/custodians/u-boot-efi/-/pipelines/29687 Documentation: * TI boards - fix OP-TEE args - fix incorrect labels for boot switches * Fix typo in pstore documentation. * Fix document references pointing to replaced uImage.FIT. * buildman: Add missing :: for examples. * overlay-fdt-boot: .dtbos do not need load addresses. * When building the documentation use sys.path.append for pytests.
2026-03-27doc: overlay-fdt-boot: .dtbos do not need load addressesRasmus Villemoes
The requirement that .dtbos have load addresses in the FIT image vanished five years ago with 4c531d9f58b ("fit: Load DTO into temporary buffer and ignore load address") Fix the documentation accordingly. Signed-off-by: Rasmus Villemoes <[email protected]> Reviewed-by: Marek Vasut <[email protected]>
2026-03-27doc: board: ti: fix incorrect labels for boot switchesAnshul Dalal
The labels for the boot mode switches were incorreclty documented for some TI boards, this patch fixes them as per the official user guides linked below: AM62x https://www.ti.com/lit/ug/spruj40e/spruj40e.pdf AM62dx https://www.ti.com/lit/ug/sprujg2/sprujg2.pdf AM62ax https://www.ti.com/lit/ug/spruj66b/spruj66b.pdf AM62px https://www.ti.com/lit/ug/spruj40e/spruj40e.pdf AM6254atl https://www.ti.com/lit/ug/spruja1a/spruja1a.pdf Signed-off-by: Anshul Dalal <[email protected]>
2026-03-27doc: board: fix OPTEE args for TI SoCsAnshul Dalal
CFG_WITH_SOFTWARE_PRNG=y was added as an OPTEE argument to workaround some bugs related to TRNG which have been fixed now[1]. Therefore this patch drops the redundant argument from the documentation. [1]: https://github.com/OP-TEE/optee_os/commit/e313f4765fd0478bb66985827441411793433773 Signed-off-by: Anshul Dalal <[email protected]> Acked-by: Francesco Dolcini <[email protected]> # Toradex Verdin AM62
2026-03-27doc: Use sys.path.append for pytests being foundTom Rini
Rather than having our "docs" build tagets modify PTYHONPATH, have doc/conf.py append the required paths at runtime instead. This will ensure that our builds from readthedocs will also find all of the required files. Signed-off-by: Tom Rini <[email protected]>
2026-03-27doc/buildman: fix missing :: on examplesDavid Lechner
Fix 4 instances in buildman.rst where examples were missing :: for proper formatting. Three cases just had a single : and in one case, : didn't make grammatical sense, so it gets a stand-alone :: along with fixing the indent. Signed-off-by: David Lechner <[email protected]>
2026-03-27doc: pstore: fix typoAristo Chen
Use "parameters have been set" and "they need" for correct grammar in the pstore documentation. Signed-off-by: Aristo Chen <[email protected]>
2026-03-27treewide: fix uImage.FIT document pathsDaniel Golle
Commit 488445cefa1 ("doc: Move FIT into its own directory") moved the documentation in doc/uImage.FIT to doc/usage/fit, subsequently all documents and example sources have been converted to reStructuredText. Fix (almost) all of the remaining occurrences of the old path and filenames across the tree. The exception is doc/uImage.FIT/command_syntax_extensions.txt which apparently has been removed entirely, or at least I was unable to locate where that document is now. Signed-off-by: Daniel Golle <[email protected]>
2026-03-26Merge tag 'rpi-2026.04-rc5' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-raspberrypi Updates for RPi for 2026.04-rc5: - rpi: Update the naming for bcm2712 SoC RevD naming - arm: bcm: Include missing errno.h
2026-03-26rpi: Update the naming for bcm2712 SoC RevD namingPeter Robinson
The downstream Raspberry Pi uses two namings for the revD SoC device trees, both bcm2712d0-rpi-5-b and bcm2712-d-rpi-5-b but it seems upstream has settled on just the later, so lets use that as it's the name that maps both upstream and downstream. Fixes: c15a7919725 ("board/raspberrypi: add bcm2712d0-rpi-5-b for Raspberry Pi 5") Signed-off-by: Peter Robinson <[email protected]> Reviewed-by: Matthias Brugger <[email protected]>
2026-03-26arm: bcm: Include missing errno.hMarek Vasut
The msg.c file uses EIO macro defined in errno.h , include errno.h to avoid build failure: " arch/arm/mach-bcm283x/msg.c: In function 'bcm2835_power_on_module': arch/arm/mach-bcm283x/msg.c:73:25: error: 'EIO' undeclared (first use in this function) 73 | return -EIO; | ^~~ " Signed-off-by: Marek Vasut <[email protected]>
2026-03-24Merge tag 'qcom-fixes-24Mar2026' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-snapdragon - Assorted Qualcomm platform fixes
2026-03-24watchdog: qcom: stop watchdog by defaultCasey Connolly
Prevent the Qualcomm watchdog from autostarting and ensure it's stopped when the driver probed. In some cases the watchdog is left running by a previous bootloader stage. Disable autostart so it isn't left running when we boot into the OS, this behaviour can be changed by enabling autostart in the board defconfig. Reviewed-by: Stefan Roese <[email protected]> Reviewed-by: Sumit Garg <[email protected]> Reviewed-by: Tom Rini <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Casey Connolly <[email protected]>
2026-03-24qcom: rpmh: don't error for SLEEP requestsCasey Connolly
Just stub out non-active votes, if we return an error the caller may propagate it and not send its active vote. Since we don't suspend there's no risk of us entering a broken state due to missing votes. Link: https://patch.msgid.link/20260320-casey-qcom-rpmh-serial-fixes-v1-2-b81d05832eec@linaro.org Signed-off-by: Casey Connolly <[email protected]>
2026-03-24serial: msm-geni: allow invalid clockCasey Connolly
Pre-relocation we may not have a clock but it's usually been enabled for us already, or worst case we will enable it after relocation. Erroring out in this case will almost always cause U-Boot to hang pre-relocation which is undesirable and may be hard to debug. Link: https://patch.msgid.link/20260320-casey-qcom-rpmh-serial-fixes-v1-1-b81d05832eec@linaro.org Signed-off-by: Casey Connolly <[email protected]>
2026-03-24power: regulator: qcom: Correct dependenecies for DM_REGULATOR_QCOM_USB_VBUSTom Rini
The DM_REGULATOR_QCOM_USB_VBUS functionality can only work with DM_PMIC enabled as well, so express this dependency in Kconfig. Signed-off-by: Tom Rini <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Casey Connolly <[email protected]>
2026-03-24phy: qcom: qusb2: Add QCS615 QUSB2 PHY supportBalaji Selvanathan
Add support for QCS615 QUSB2 PHY by introducing platform-specific initialization table and register layout. The implementation reuses the IPQ6018 register layout and defines QCS615-specific tuning parameters for proper USB PHY operation. Taken from Linux commit 8adbf20e0502 ("phy: qcom-qusb2: Add support for QCS615") Signed-off-by: Balaji Selvanathan <[email protected]> Reviewed-by: Sumit Garg <[email protected]> Reviewed-by: Neil Armstrong <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Casey Connolly <[email protected]>
2026-03-24clk: qcom: qcs615: Add GCC_AHB2PHY_WEST_CLK clock supportBalaji Selvanathan
Add GCC_AHB2PHY_WEST_CLK gate clock definition to the QCS615 clock driver. This clock is required for proper PHY operation and eliminates clock-related warnings during USB initialization. Signed-off-by: Balaji Selvanathan <[email protected]> Reviewed-by: Sumit Garg <[email protected]> Reviewed-by: Neil Armstrong <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Casey Connolly <[email protected]>
2026-03-24clk: qcom: qcs615: Add GCC_USB3_PRIM_CLKREF_CLK supportBalaji Selvanathan
Add support for GCC_USB3_PRIM_CLKREF_CLK to the QCS615 clock driver. This clock is referenced in the device tree USB node but was not implemented in U-Boot, causing "Clock 152 not found" warnings during fastboot run. Signed-off-by: Balaji Selvanathan <[email protected]> Reviewed-by: Sumit Garg <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Casey Connolly <[email protected]>
2026-03-23Prepare v2026.04-rc5v2026.04-rc5Tom Rini
Signed-off-by: Tom Rini <[email protected]>
2026-03-23Merge tag 'fsl-qoriq-for-2026.04-rc5' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq CI: https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq/-/pipelines/29615 - Fix SPI flash clock for ls102xa
2026-03-23serial: Enable SYS_NS16550 on incorrectly migrated platformsTom Rini
With the migration to DM_SERIAL in commit 191b10ac70d7 ("PowerPC / Layerscape: Finish migration to DM_SERIAL") a number of platforms were incorrectly migrated and did not enable SYS_NS16550 despite previously having enabled the non-DM NS16650 serial driver. Enable these now. Fixes: 191b10ac70d7 ("PowerPC / Layerscape: Finish migration to DM_SERIAL") Reported-by: Michael Walle <[email protected]> Reviewed-by: Vladimir Oltean <[email protected]> Signed-off-by: Tom Rini <[email protected]>
2026-03-23armv7: ls102xa: fix SPI flash clockMichael Walle
Commit bb6f3c0f7634 ("armv7: ls102xa: Update SCFG_QSPI_CLKSEL value") broke the SPI boot on the LS1021ATSN board (ls1021atsn_qspi_defconfig) at least. The commit message reads Update SCFG_QSPI_CLKSEL value : 0xC -> 0x5 which means ClusterPLL/16 The original submitted patch had the following description: Value 0xC is reserved. Replace it with correct value 0x5 which is ClusterPLL/16 Unfortunatly, the little information which was there, was stripped even further. Why is 0x5 the "correct" value? In fact, it seems that the upper bit is just ignored and thus the value 0xC translates to 0x4 which is ClusterPLL/20. This, will result in a SPI clock of 60MHz (if the PLL is clocked at 1.2GHz). But even that is too much for the (default) 03h read opcode (max 50MHz). Set the value to ClusterPLL/24 which is 50MHz. Link: https://lore.kernel.org/r/[email protected]/ Fixes: bb6f3c0f7634 ("armv7: ls102xa: Update SCFG_QSPI_CLKSEL value") Signed-off-by: Michael Walle <[email protected]> Reviewed-by: Vladimir Oltean <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2026-03-23configs: ls1021atsn: enable serial driverMichael Walle
Switching to DM_SERIAL disabled any serial driver. Re-enable it again. Fixes: 191b10ac70d7 ("PowerPC / Layerscape: Finish migration to DM_SERIAL") Signed-off-by: Michael Walle <[email protected]> Reviewed-by: Vladimir Oltean <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2026-03-23arm: dts: ls1021a-tsn: add default serial outputMichael Walle
Since switching to DM_SERIAL 'stdout-path' seems to be necessary. Signed-off-by: Michael Walle <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2026-03-22tests: FIT: Add "clone" image attack image testTom Rini
Related to the problem resolved with commit 2092322b31cc ("boot: Add fit_config_get_hash_list() to build signed node list"), add a testcase for the problem as well. Reported-by: Apple Security Engineering and Architecture (SEAR) Signed-off-by: Tom Rini <[email protected]>
2026-03-18Merge tag 'mediatek-for-master-2026-03-17' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-mediatek * A fix for mt7622 infracfg and pericfg clocks that were unusable.
2026-03-18Merge patch series "update MAINTAINERS for PWM LED"Tom Rini
Quentin Schulz <[email protected]> says: The entry is named LED while it only matches PWM LED binding and driver, so rename it to PWM LED. Ivan's email is bouncing, so mark the PWM LED entry as orphaned. Link: https://lore.kernel.org/r/[email protected]
2026-03-18MAINTAINERS: make PWM LED orphanQuentin Schulz
Ivan's mail is bouncing, so update the entry status. Signed-off-by: Quentin Schulz <[email protected]>
2026-03-18MAINTAINERS: rename LED into PWM LEDQuentin Schulz
It clearly only lists PWM LED driver and bindings so we should have the entry reflect that. Signed-off-by: Quentin Schulz <[email protected]>
2026-03-18image-fit: Fix mismatched parameter type in commentKunihiko Hayashi
The functions use 'ulong', however, the comments said 'uint32_t'. Update the comments to match the prototype. Signed-off-by: Kunihiko Hayashi <[email protected]> Reviewed-by: Quentin Schulz <[email protected]>
2026-03-17clk: mediatek: mt7622: fix infracfg and pericfg clock operationsDaniel Golle
The MT7622 infracfg and pericfg drivers both use mtk_common_clk_infrasys_init() for probe, which populates struct mtk_clk_priv and stores gate definitions in the clk_tree. However, both drivers were incorrectly wired to mtk_clk_gate_ops which expects struct mtk_cg_priv with separately populated gates/num_gates/gates_offs fields from mtk_common_clk_gate_init(). Since those fields were never set, any attempt to enable an infracfg or pericfg gate clock (e.g. CLK_INFRA_TRNG) would fail with -EINVAL. Switch both to mtk_clk_infrasys_ops and struct mtk_clk_priv to match the init function. Fixes: 72ab603b201 ("clk: mediatek: add driver for MT7622") Signed-off-by: Daniel Golle <[email protected]> Reviewed-by: David Lechner <[email protected]> Signed-off-by: David Lechner <[email protected]>
2026-03-12Merge tag 'rpi-2026.04-rc4' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-raspberrypi Updates for RPi for 2026.04-rc4: - board/raspberrypi: add bcm2712d0-rpi-5-b for Raspberry Pi 5 - board/raspberrypi: add multi-FDT support - rpi: pass the Video Core logs DT parameter through - pinctrl: bcm283x: Fix GPIO pull state register values for BCM2711
2026-03-12board/raspberrypi: add bcm2712d0-rpi-5-b for Raspberry Pi 5Filip Kokosiński
This commit adds an FDT entry for the d0 stepping of the BCM2712 SoC. This entry is used by the v1.1 revision of the board (revision & 0x0f == 1). Signed-off-by: Filip Kokosiński <[email protected]> Reviewed-by: Peter Robinson <[email protected]> Tested-by: Peter Robinson <[email protected]>
2026-03-12board/raspberrypi: add multi-FDT supportFilip Kokosiński
This patch adds support for multiple FDT files per board model. This is done by adding the FDTFILES macro, which initializes two rpi_model struct members: fdtfiles and fdtcount. The new-style revision codes designate LSB bits as board revision; this value is used to choose between provided FDTs. The first element of the fdtfiles list is used should no revision match. Signed-off-by: Filip Kokosiński <[email protected]> Reviewed-by: Peter Robinson <[email protected]> Tested-by: Peter Robinson <[email protected]>
2026-03-12rpi: pass the Video Core logs DT parameter throughPeter Robinson
Pass the VC logs DT parameter through to the kernel device tree. This is used by the vclog tool and is a useful debugging tool. Signed-off-by: Peter Robinson <[email protected]> Acked-by: Matthias Brugger <[email protected]>
2026-03-12pinctrl: bcm283x: Fix GPIO pull state register values for BCM2711Cibil Pankiras
BCM2711 has different pull-up/down register values compared to BCM2835 - BCM2835: NONE=0, DOWN=1, UP=2 - BCM2711: NONE=0, UP=1, DOWN=2 This patch fixes the pull state register values for BCM2711. Fixes: 2c39d975f87c ("pinctrl: bcm283x: Add GPIO pull-up/down control for BCM2835 and BCM2711") Signed-off-by: Cibil Pankiras <[email protected]> Reviewed-by: Matthias Brugger <[email protected]> Reviewed-by: Peter Robinson <[email protected]> Tested-by: Peter Robinson <[email protected]>
2026-03-10kbuild: fix cross_tools compilationIlias Apalodimas
Frieder reports that after the kbuild sync running make tools-only_defconfig make cross_tools fails with UPD include/generated/timestamp_autogenerated.h PYMOD rebuild tools/Makefile:359: *** insufficient number of arguments (1) to function 'filter'. Stop. make: *** [Makefile:2191: tools] Error 2 After the sync 'hostprogs-always-y' contains the complete list of the tools we need to strip, so the $(filter) command is not needed. Fixes: bd3f9ee679b4d ("kbuild: Bump the build system to 6.1") Reported-by: Frieder Schrempf <[email protected]> Signed-off-by: Ilias Apalodimas <[email protected]> Tested-by: Frieder Schrempf <[email protected]>
2026-03-09Prepare v2026.04-rc4v2026.04-rc4Tom Rini
Signed-off-by: Tom Rini <[email protected]>
2026-03-09boot: Add fit_config_get_hash_list() to build signed node listSimon Glass
The hashed-nodes property in a FIT signature node lists which FDT paths are included in the signature hash. It is intended as a hint so should not be used for verification. Add a function to build the node list from scratch by iterating the configuration's image references. Skip properties known not to be image references. For each image, collect the path plus all hash and cipher subnodes. Use the new function in fit_config_check_sig() instead of reading 'hashed-nodes'. Update the test_vboot kernel@ test case: fit_check_sign now catches the attack at signature-verification time (the @-suffixed node is hashed instead of the real one, causing a mismatch) rather than at fit_check_format() time. Update the docs to cover this. The FIT spec can be updated separately. Signed-off-by: Simon Glass <[email protected]> Closes: https://lore.kernel.org/u-boot/[email protected]/ Reported-by: Apple Security Engineering and Architecture (SEAR) Tested-by: Tom Rini <[email protected]>
2026-03-09Merge patch series "64-bit PCIe for AM64, AM69, J7200, J722S and J784S4"Tom Rini
Siddharth Vadapalli <[email protected]> says: Since Linux device-tree has switched to 64-bit Address space for the PCIe Controllers on TI SoCs, currently, U-Boot needs to support the same. This series adds support for 64-bit addressing for PCIe along with enabling Root-Complex mode of operation for AM69 and J784S4 SoCs. Series has been tested on all platforms being affected by this series. Test Logs: 1. AM642-EVM https://gist.github.com/Siddharth-Vadapalli-at-TI/82512389f8396a51e4f167c7ebe4c2a3 2. AM69-SK https://gist.github.com/Siddharth-Vadapalli-at-TI/b20b2811804ffc6e6c063564330c0a35 3. J7200-EVM https://gist.github.com/Siddharth-Vadapalli-at-TI/c545da68bd28a5e036803bb60f32d8e9 4. J722S-EVM https://gist.github.com/Siddharth-Vadapalli-at-TI/3dde05c4c7076076aa20ac47a6e2d176 5. J784S4-EVM https://gist.github.com/Siddharth-Vadapalli-at-TI/a93c1b2cd5d90f494e885d1831d3d23e Link: https://lore.kernel.org/r/[email protected]
2026-03-09configs: j722s_evm_a53_defconfig: enable 64-bit addressing for PCIeSiddharth Vadapalli
The PCIe0 instance of PCIe on the J722S SoC uses the 4 GB Address Window starting from 0x6_0000_0000 to map System Addresses to PCIe Bus Addresses. Hence, enable CONFIG_SYS_PCI_64BIT. Signed-off-by: Siddharth Vadapalli <[email protected]> Fixes: 79f3e77133bd ("Subtree merge tag 'v6.16-dts' of dts repo [1] into dts/upstream")
2026-03-09configs: j7200_evm_a72_defconfig: enable 64-bit addressing for PCIeSiddharth Vadapalli
The PCIe1 instance of PCIe on the J7200 SoC uses the 4 GB Address Window starting from 0x41_0000_0000 to map System Addresses to PCIe Bus Addresses. Hence, enable CONFIG_SYS_PCI_64BIT. Signed-off-by: Siddharth Vadapalli <[email protected]> Fixes: 79f3e77133bd ("Subtree merge tag 'v6.16-dts' of dts repo [1] into dts/upstream")
2026-03-09configs: am64x_evm_a53_defconfig: enable 64-bit addressing for PCIeSiddharth Vadapalli
The PCIe0 instance of PCIe on the AM64x SoC uses the 4 GB Address Window starting from 0x6_0000_0000 to map System Addresses to PCIe Bus Addresses. Hence, enable CONFIG_SYS_PCI_64BIT. Signed-off-by: Siddharth Vadapalli <[email protected]> Fixes: 79f3e77133bd ("Subtree merge tag 'v6.16-dts' of dts repo [1] into dts/upstream")
2026-03-09configs: {am69_sk, j784s4_evm}_a72_defconfig: enable PCIe Root-Complex modeSiddharth Vadapalli
The PCIe Controllers on the J784S4 and AM69 SoCs support Root-Complex mode of operation. PCIe0 instance of PCIe on both of the SoCs is brought out on the Starter-Kit (AM69) and EVM (J784S4) boards. Hence, enable the configs required for Root-Complex mode of operation. Signed-off-by: Siddharth Vadapalli <[email protected]> Fixes: 79f3e77133bd ("Subtree merge tag 'v6.16-dts' of dts repo [1] into dts/upstream")
2026-03-09pci: pcie_cdns_ti: enable PCIe root-complex mode for J784S4 SoCSiddharth Vadapalli
The PCIe Controllers on the J784S4 SoC support Root-Complex mode of operation. Hence, enable it. Signed-off-by: Siddharth Vadapalli <[email protected]> Fixes: 79f3e77133bd ("Subtree merge tag 'v6.16-dts' of dts repo [1] into dts/upstream")
2026-03-09arm: mach-k3: arm64-mmu: add mapping for PCIe 4 GB Address WindowsSiddharth Vadapalli
The PCIe Controllers in the K3 SoCs have 4 GB Address Windows in the 64-bit address space to map System (CPU) Addresses to PCIe Bus Addresses. The physical addresses for these Address Windows across PCIe instances across SoCs is as follows: +--------+----------------+----------------+----------------+----------------+ | SoC | PCIe0 | PCIe1 | PCIe2 | PCIe3 | +--------+----------------+----------------+----------------+----------------+ | AM64 | 0x6_0000_0000 | NA | NA | NA | | J722S | 0x6_0000_0000 | NA | NA | NA | | AM68 | NA | 0x41_0000_0000 | NA | NA | | J7200 | NA | 0x41_0000_0000 | NA | NA | | J721S2 | NA | 0x41_0000_0000 | NA | NA | | J742S2 | 0x40_0000_0000 | 0x41_0000_0000 | NA | NA | | AM69 | 0x40_0000_0000 | 0x41_0000_0000 | 0x42_0000_0000 | 0x43_0000_0000 | | J721E | 0x40_0000_0000 | 0x41_0000_0000 | 0x42_0000_0000 | 0x43_0000_0000 | | J784S4 | 0x40_0000_0000 | 0x41_0000_0000 | 0x42_0000_0000 | 0x43_0000_0000 | +--------+----------------+----------------+----------------+----------------+ Two regions for a 1:1 mapping from virtual addresses to physical addresses catering to all of the above will be required, which are: 1. For AM64 and J722S SoCs => Start: 0x6_0000_0000 Size: 0x1_0000_0000 2. For AM68, AM69, J7200, J721E, J721S2, J742S2 and J784S4 SoCs => Start: 0x40_0000_0000 Size: 0x4_0000_0000 Since the 'Flash Peripherals' region from 0x5_0000_0000 to 0x8_7FFF_FFFF includes the mapping for AM64 and J722S SoCs, only the second region mentioned above needs to be added. Hence, add the region to support 64-bit address space for PCIe. Signed-off-by: Siddharth Vadapalli <[email protected]> Fixes: 79f3e77133bd ("Subtree merge tag 'v6.16-dts' of dts repo [1] into dts/upstream")
2026-03-09MAINTAINERS: update SPI NOR reviewerTakahiro Kuwano
Tudor Ambarus will step down as SPI NOR reviewer. I would like to take this role. Signed-off-by: Takahiro Kuwano <[email protected]> Acked-by: Tudor Ambarus <[email protected]>
2026-03-09video: stm32: dsi: add .of_to_plat callbackRaphael Gallais-Pou
Drivers should extract device-tree data before probing via the .of_to_plat hook. Implement it for stm32_dsi driver. By doing so, it also solve a variable shadowing in stm32_dsi_probe() where &clk was used as peripheral clock and ref clock. For readability some struct have been renamed such as: * struct stm32_dsi_priv *dsi -> struct stm32_dsi_priv *priv * struct clk clk -> struct clk pclk Signed-off-by: Raphael Gallais-Pou <[email protected]> Reviewed-by: Patrick Delaunay <[email protected]>
generated by cgit v1.2.3 (git 2.25.1) at 2026-04-11 14:06:06 +0000