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Make DMA transactions snoopable so that CPUs can keep caches up-to-date.
This allows dma transactions to be used for operations such as memory
copies without any additional cache control operations.
Signed-off-by: Peter Tyser <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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Signed-off-by: Peter Tyser <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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Signed-off-by: Peter Tyser <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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Signed-off-by: Peter Tyser <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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Also update dmacpy()'s argument order to match memcpy's and use
phys_addr_t/phy_size_t for address/size arguments
Signed-off-by: Peter Tyser <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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The Channel Start (CS) bit in the Mode Register (MR) should actually be
cleared as the comment in the code suggests. Previously, CS was being
set, not cleared.
Assuming normal operation of the DMA engine, this change shouldn't have
any real affect.
Signed-off-by: Peter Tyser <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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Support DMA transfers larger than the DMA controller's limit of
(2 ^ 26 - 1) bytes
Signed-off-by: Peter Tyser <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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Signed-off-by: Peter Tyser <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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Signed-off-by: Peter Tyser <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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DMA support is now enabled via the CONFIG_FSL_DMA define instead of the
previous CONFIG_DDR_ECC
Signed-off-by: Peter Tyser <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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Signed-off-by: Roy Zang <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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We want the outbound PCI memory map to end at the 4G boundary so we
can maximize the amount of space available for inbound mappings if
we have large amounts of memory.
This matches the device tree setup in the kernel for the 36-bit physical
configs for the platforms that have one (MPC8641 HPCN & MPC8572 DS).
Signed-off-by: Kumar Gala <[email protected]>
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Unify with 83xx and 85xx and use CPU_TYPE_ENTRY. We are going to use
this to convey the # of cores and DDR width in the near future so its
good to keep in sync.
Signed-off-by: Kumar Gala <[email protected]>
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The way the ALL variable is used allows for config.mk's to add more
targets themselves without having to clutter up the top level Makefile.
Signed-off-by: Mike Frysinger <[email protected]>
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The SPI flash define is named CONFIG_SF_DEFAULT_SPEED, not
CONFIG_SF_DEFAULT_HZ, so fix the typos in the Blackfin boards.
Signed-off-by: Mike Frysinger <[email protected]>
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Building the compression code in lib_generic/ with -O2 rather than -Os
gives a nice speed boost without too much code size increase.
Signed-off-by: Mike Frysinger <[email protected]>
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The latest version of U-Boot got a bit fatter in the BSS section which
caused overflows in the RAM region, so increase the monitor size.
Signed-off-by: Mike Frysinger <[email protected]>
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The SPI flash layer is much stricter about sector usage than the eeprom
layer we used to use, so update the env settings to better match the
sector alignment of the flashes we use.
Signed-off-by: Vivi Li <[email protected]>
Signed-off-by: Mike Frysinger <[email protected]>
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The debug tools that interface with the other side of the JTAG console
got much slower when generalizing things, so bump up the default timeout
value on the U-Boot side to cope. Hopefully at some point we can improve
the debug tools to speed things back up.
Signed-off-by: Vivi Li <[email protected]>
Signed-off-by: Mike Frysinger <[email protected]>
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This script is similar to the netconsole script, but instead works with
the JTAG console device driver that exists on Blackfin parts.
Signed-off-by: Mike Frysinger <[email protected]>
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All drivers need to be converted to CONFIG_NET_MULTI.
This patch converts the dm9000 driver.
Signed-off-by: Thomas Smits <[email protected]>
Signed-off-by: Remy Bohmer <[email protected]>
Signed-off-by: Ben Warren <[email protected]>
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This patch adds a egiga driver for the Marvell Kirkwood SoC's.
Contributors:
Yotam Admon <[email protected]>
Michael Blostein <[email protected]
Reviewed-by: Ronen Shitrit <[email protected]>
Acked-by: Stefan Rose <[email protected]>
Signed-off-by: Prafulla Wadaskar <[email protected]>
Signed-off-by: Ben Warren <[email protected]>
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Different flavours of DaVinci SOC's have differences in their EMAC IP
This patch does the following
1) Updates base addresses for DM365
2) Updates MDIO frequencies for DM365 and DM646x
3) Update EMAC wrapper registers for DM365 and DM646x
Patch applies to u-boot-net git. the EMAC driver itself
will be updated shortly to add support for DM365 and DM646x
Signed-off-by: Sandeep Paulraj <[email protected]>
Signed-off-by: Ben Warren <[email protected]>
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udelay(1) loop counter.
From 584b5fbd4abfc43f920cc1c329633e03816e28be Mon Sep 17 00:00:00 2001
From: Richard Retanubun <[email protected]>
Date: Wed, 20 May 2009 18:26:01 -0400
Subject: [PATCH] Standardize the use of MCFFEC_TOUT_LOOP as a udelay(1) loop counter.
Signed-off-by: Richard Retanubun <[email protected]>
Signed-off-by: Ben Warren <[email protected]>
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The problem is that BOOTP_SIZE uses ETHER_HDR_SIZE which is 14 bytes.
If sending a VLAN tagged frame (when env variable vlan is set) this
should be VLAN_ETHER_HDR_SIZE=18 which is what NetSetEther returns.
Signed-off-by: Norbert van Bolhuis <[email protected]>
Signed-off-by: Ben Warren <[email protected]>
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Signed-off-by: Ben Warren <[email protected]>
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Added CONFIG_NET_MULTI to all Davinci boards
Removed all calls to Davinci network driver from board code
Added cpu_eth_init() to cpu/arm926ejs/cpu.c
Signed-off-by: Ben Warren <[email protected]>
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Removed pointless #ifdefs
Moved functions around in file in preparation for switch to newer API
Signed-off-by: Ben Warren <[email protected]>
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This driver has been renamed davinci_emac.c
Signed-off-by: Ben Warren <[email protected]>
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Chips supported:-
1. 88E6161 6 port gbe swtich with 5 integrated PHYs
2. 88E6165 6 port gbe swtich with 5 integrated PHYs
2. 88E6132 3 port gbe swtich with 2 integrated PHYs
Platform specific configuration supported for:-
default or router port vlan configuration
led_init configuration
mdip/n polarity reversal configuration
Note: This driver is supported and tested against
kirkwood egiga interface
Contributors:
Yotam Admon <[email protected]>
Michael Blostein <[email protected]
Reviewed by: Ronen Shitrit <[email protected]>
Signed-off-by: Prafulla Wadaskar <[email protected]>
Signed-off-by: Ben Warren <[email protected]>
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Signed-off-by: Zach LeRoy <[email protected]>
Acked-by: Kumar Gala <[email protected]>
Signed-off-by: Ben Warren <[email protected]>
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All the Blackfin linker scripts were duplicated across the board dirs with
no difference save from the semi-often used ENV_IS_EMBEDDED option. So
unify all of them in the lib_blackfin/ dir and for the few boards that
need to embedded the environment directly, add a LDS_BOARD_TEXT define for
them to customize via their board config file. This is much simpler than
forcing them to duplicate the rest of the linker script.
Signed-off-by: Mike Frysinger <[email protected]>
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The BF51xF parts have an internal SST SPI flash, so make sure the driver is
enabled by default so we can access it.
Signed-off-by: Mike Frysinger <[email protected]>
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The Blackfin port was using asm/blackfin-config-{pre,post}.h to setup
common Blackfin board defines. The common method now is to use config.h,
so convert blackfin-config-post.h to that. Rename the still Blackfin
specific blackfin-config-pre.h to config-pre.h so the naming conventions
at least line up.
Signed-off-by: Mike Frysinger <[email protected]>
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Signed-off-by: Mike Frysinger <[email protected]>
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Allow boards to easily override the root= and default bootcmd, allow
people to tweak the file used in default bootcmds at runtime via one env
var, and add a stock nandboot command.
Signed-off-by: Mike Frysinger <[email protected]>
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Signed-off-by: Hoan Hoang <[email protected]>
Signed-off-by: Mike Frysinger <[email protected]>
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Signed-off-by: Mike Frysinger <[email protected]>
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Signed-off-by: Mike Frysinger <[email protected]>
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Signed-off-by: Mike Frysinger <[email protected]>
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Signed-off-by: Mike Frysinger <[email protected]>
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Signed-off-by: Mike Frysinger <[email protected]>
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Signed-off-by: Mike Frysinger <[email protected]>
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Signed-off-by: Mike Frysinger <[email protected]>
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Signed-off-by: Mike Frysinger <[email protected]>
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Signed-off-by: Mike Frysinger <[email protected]>
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Signed-off-by: Mike Frysinger <[email protected]>
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Newer Blackfin parts can an on-chip ROM that can boot LDRs over SPI flashes,
so add a new 'spibootldr' command to take advantage of it.
Signed-off-by: Mike Frysinger <[email protected]>
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