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2026-03-13misc: k3_fuse: Limit writes to 25bit valuesVignesh Raghavendra
K3 OTP bits can only be programmed 25bits at a time. Limit the value accordingly using a 25 bit mask. Signed-off-by: Vignesh Raghavendra <[email protected]> Signed-off-by: Anshul Dalal <[email protected]>
2026-03-13misc: k3_fuse: Enable fuse Sense supportVignesh Raghavendra
fuse sense is essentially read, map it to fuse read. Signed-off-by: Vignesh Raghavendra <[email protected]> Signed-off-by: Anshul Dalal <[email protected]>
2026-03-13misc: k3_fuse: Check readback on fuse progVignesh Raghavendra
Error out if readback value doesn't match the programmed value. Signed-off-by: Vignesh Raghavendra <[email protected]> Signed-off-by: Anshul Dalal <[email protected]>
2026-03-13misc: k3_fuse: Fix printing of error codesVignesh Raghavendra
Use signed int format to print error codes so that its more readable Fixes: ed5f2e5bed91 ("drivers: k3_fuse: Add fuse sub-system func calls") Signed-off-by: Vignesh Raghavendra <[email protected]> Signed-off-by: Anshul Dalal <[email protected]>
2026-03-13Merge patch series "board: k3: Sync rm-cfg with TIFS v11.02.09 firmware"Tom Rini
Sparsh Kumar <[email protected]> says: This series updates the Resource Management (RM) configuration files for AM62 family devices to align with the TIFS v11.02.09 firmware. Background ---------- With the latest TIFS firmware (v11.02.09), an additional virtual interrupt and event is reserved for MCU cores to DM usage on am62x, am62ax, and am62px devices. This series brings the rm-cfg and tifs-rm-cfg files in sync with these firmware changes across both TI reference boards and vendor boards. These changes are backward compatible with older TIFS firmware versions. Additionally, the am62x platform was originally introduced without a tifs-rm-cfg.yaml file, unlike other platforms in the AM62 family. This series addresses that gap and enables tifs-rm-cfg in binman for am625-sk and am62p-sk platforms. Changes ------- TI reference boards (patches 1-4): - Update rm-cfg.yaml for am62x, am62ax, am62px - Sync am62px tifs-rm-cfg.yaml with TIFS firmware template - Add missing tifs-rm-cfg.yaml for am62x - Enable tifs-rm-cfg in binman for am625-sk and am62p-sk Vendor boards (patches 5-9): - beagleplay (am62x-based) - phytec phycore_am62x - toradex verdin-am62 - phytec phycore_am62ax - toradex verdin-am62p with the required interrupt reservation. The tifs-rm-cfg.yaml files cannot be updated without access to the corresponding SysConfig files, as both rm-cfg.yaml and tifs-rm-cfg.yaml must remain in sync. Link: https://lore.kernel.org/r/[email protected]
2026-03-13board: toradex: verdin-am62p: rm-cfg: Update rm-cfg to reflect new resource ↵Sparsh Kumar
reservation With the latest v11.02.09 TIFS firmware, an additional virtual interrupt and event is reserved for MCU cores to DM usage on am62px devices. Update the rm-cfg to reflect this new reservation. Signed-off-by: Sparsh Kumar <[email protected]>
2026-03-13board: phytec: phycore_am62ax: rm-cfg: Update rm-cfg to reflect new resource ↵Sparsh Kumar
reservation With the latest v11.02.09 TIFS firmware, an additional virtual interrupt and event is reserved for MCU cores to DM usage on am62ax devices. Update the rm-cfg to reflect this new reservation. Signed-off-by: Sparsh Kumar <[email protected]>
2026-03-13toradex: verdin-am62: rm-cfg: Update rm-cfg to reflect new resource reservationSparsh Kumar
With the latest v11.02.09 TIFS firmware, an additional virtual interrupt and event is reserved for MCU cores to DM usage on am62x devices. Update the rm-cfg to reflect this new reservation. Signed-off-by: Sparsh Kumar <[email protected]>
2026-03-13board: phytec: rm-cfg: Update rm-cfg to reflect new resource reservationSparsh Kumar
With the latest v11.02.09 TIFS firmware, an additional virtual interrupt and event is reserved for MCU cores to DM usage on am62x devices. Update the rm-cfg to reflect this new reservation. Signed-off-by: Sparsh Kumar <[email protected]>
2026-03-13board: beagle: beagleplay: rm-cfg: Update rm-cfg to reflect new resource ↵Sparsh Kumar
reservation With the latest v11.02.09 TIFS firmware, an additional virtual interrupt and event is reserved for MCU cores to DM usage on am62x devices. Update the rm-cfg to reflect this new reservation. Signed-off-by: Sparsh Kumar <[email protected]>
2026-03-13arm: dts: k3: am62x/am62px: Enable tifs-rm-cfg in binmanSparsh Kumar
Add rcfg_yaml_tifs node override to use tifs-rm-cfg.yaml instead of the default rm-cfg.yaml for am625-sk and am62p-sk platforms. This enables binman to include the tifs-rm-cfg.yaml configuration when building tiboot3 images, bringing these platforms in line with other K3 devices like am62a-sk that already use tifs-rm-cfg.yaml. This builds on the tifs-rm-cfg files added/updated earlier in this series. Signed-off-by: Sparsh Kumar <[email protected]> Reviewed-by: Neha Malcom Francis <[email protected]>
2026-03-13board: ti: am62x: tifs-rm-cfg: Add the missing tifs-rm-cfg:Sparsh Kumar
The am62x platform was originally introduced without a tifs-rm-cfg.yaml file. Add the tifs-rm-cfg to bring am62x in line with other am62 family of devices (am62px and am62a) which all include this file. This complements the rm-cfg update earlier in this series. Signed-off-by: Sparsh Kumar <[email protected]>
2026-03-13board: ti: am62px: tifs-rm-cfg: Sync tifs-rm-cfg with TIFS firmware updatesSparsh Kumar
Synchronize tifs-rm-cfg file with the latest v11.02.09 TIFS firmware rm configuration: - Update am62px tifs-rm-cfg with revised resource allocations - Apply formatting updates to align with TIFS template This brings tifs-rm-cfg in sync with the rm-cfg changes earlier in this series. Signed-off-by: Sparsh Kumar <[email protected]>
2026-03-13board: ti: rm-cfg: Update rm-cfg to reflect new resource reservationSparsh Kumar
With the latest v11.02.09 TIFS firmware, an additional virtual interrupt and event is reserved for MCU cores to DM usage on am62x, am62ax and am62px devices. Update the rm-cfg to reflect this new reservation. Signed-off-by: Sparsh Kumar <[email protected]>
2026-03-13arm: dts: sc594: Update sc594 EZKIT GPIO polaritiesCaleb Ethridge
Updates the polarities for the GPIOs on the sc594 EZKIT carrier board for the newest revision, Rev D. The new carrier board revision has different polarities for some GPIOs. This patch updates the sc594 entries to match the sc598 entries that were updated in a previous commit, as both SOMs can utilize the EZKIT. Note that these updates are for the EZKIT carrier board used by both sc598 and sc594 SOMs, not the SOMs themselves. Fixes: be79378 ("board: adi: Add support for SC594") Signed-off-by: Caleb Ethridge <[email protected]> Reviewed-by: Greg Malysa <[email protected]>
2026-03-13linux_compat: fix NULL pointer dereference in get_mem()Anton Moryakov
Add NULL check after memalign() call in get_mem() to prevent potential NULL pointer dereference (CWE-476). The function memalign() can return NULL on allocation failure. Dereferencing the returned pointer without checking for NULL may cause a crash in low-memory conditions. Changes: - Add NULL check after memalign() allocation - Return NULL on failure, consistent with function semantics This fixes the static analyzer warning: linux_compat.c:34: dereference of memalign return value without NULL check Reported-by: static analyzer Svace Signed-off-by: Anton Moryakov <[email protected]> Reviewed-by: Tom Rini <[email protected]>
2026-03-13serial: ns16550: Fix return-type warningNikita Shubin
Fix compiler warning: drivers/serial/ns16550.c: In function ‘serial_in_dynamic’: drivers/serial/ns16550.c:153:1: warning: control reaches end of non-void function [-Wreturn-type] 153 | } | ^ Observed with gcc 15.2.1: $ riscv64-unknown-linux-gnu-gcc --version riscv64-unknown-linux-gnu-gcc (Gentoo 15.2.1_p20260214 p5) 15.2.1 Fixes: 62cbde4c4e46 ("serial: ns16550: Support run-time configuration") Signed-off-by: Nikita Shubin <[email protected]> Reviewed-by: Tom Rini <[email protected]>
2026-03-13arm: dts: k3-j721s2*: Enable OSPI1 with 32-bit address mappings for R5 SPLAnurag Dutta
The R5 SPL requires 32-bit address mappings for OSPI1(QSPI) access. Override the OSPI1 node with appropriate 32-bit register ranges to enable proper address translation on the 32-bit R5 core, while preserving 64-bit mappings for A72 cores. While at it, remove the disabled status override for ospi1 node to support booting from qspi. Signed-off-by: Anurag Dutta <[email protected]>
2026-03-13spl: Remake SPL elf from binMichal Simek
On Xilinx MB-V there is a need to use ELF file for SPL which is placed in BRAM (Block RAM) because tools for placing code to bitstream requires to use ELF. That's why introduce SPL_REMAKE_ELF similar to REMAKE_ELF option as was originally done by commit f4dc714aaa2d ("arm64: Turn u-boot.bin back into an ELF file after relocate-rela"). There is already generic and simple linker script (arch/u-boot-elf.lds) which can be also used without any modification. Signed-off-by: Michal Simek <[email protected]>
2026-03-13sandbox: symbol CONFIG_DM_SOUND does not existHeinrich Schuchardt
The correct configuration symbol is CONFIG_SOUND. Signed-off-by: Heinrich Schuchardt <[email protected]> Reviewed-by: Tom Rini <[email protected]>
2026-03-13spl: spi: fix loss of spl_load() error on soft resetDimitrios Siganos
When CONFIG_SPI_FLASH_SOFT_RESET is enabled, spi_nor_remove() is called after spl_load() to switch the flash back to legacy SPI mode. However, the return value of spi_nor_remove() unconditionally overwrites the return value of spl_load(), discarding any load error. Fix this by preserving the spl_load() error and only propagating the spi_nor_remove() error as a fallback. Also log a message when spi_nor_remove() fails, since in the case where spl_load() already failed its error would otherwise be silently discarded. Signed-off-by: Dimitrios Siganos <[email protected]>
2026-03-13lmb: Reinstate access to memory above ram_topMarek Vasut
Revert commit eb052cbb896f ("lmb: add and reserve memory above ram_top") and commit 1a48b0be93d4 ("lmb: prohibit allocations above ram_top even from same bank"). These are based on incorrect premise of the first commit, that "U-Boot does not use memory above ram_top". While U-Boot itself indeed does not and should not use memory above ram_top, user can perfectly well use that memory from the U-Boot shell, for example to load content in there. Currently, attempt to use that memory to load large image using TFTP ends with "TFTP error: trying to overwrite reserved memory...". With this change in place, the memory can be used again. Fixes: eb052cbb896f ("lmb: add and reserve memory above ram_top") Fixes: 1a48b0be93d4 ("lmb: prohibit allocations above ram_top even from same bank") Reported-by: Yuya Hamamachi <[email protected]> Signed-off-by: Marek Vasut <[email protected]>
2026-03-13Merge tag 'u-boot-ufs-20260313' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-ufs into next - ufs_hba_ops callbacks cleanup - Rockchip UFS reset support - UFS support in SPL
2026-03-13Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-riscv ↵Tom Rini
into next CI: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/29497 - sifive: switch to OF_UPSTREAM - driver: cache: Remove SiFive PL2 driver - riscv: fixes for non-existent CONFIG
2026-03-13Merge tag 'net-20260312' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-net into next Pull request net-20260312. net: - Move network PHY under NETDEVICES - s/DM_CLK/CLK/ in HIFEMAC_{ETH,MDIO} - Add support for Airoha AN8811HB PHY - airoha: PCS and MDIO support for Airoha AN7581 SoC net-lwip: - Fix issue when TFTP blocksize is >8192 - Adjust PBUF_POOL_SIZE/IP_REASS_MAX_PBUFS for better performance and resource usage. - Enable mii command for NET_LWIP
2026-03-13net: Move network PHY under NETDEVICESTom Rini
A number of network PHY drivers have Kconfig dependencies on various network drivers under NETDEVICES. This is in addition to logical dependencies of network PHYs needing network drivers. Resolve the Kconfig problems by moving the network PHY lines to be after the network devices, within the overall NETDEVICES guard. Signed-off-by: Tom Rini <[email protected]> Acked-by: Jerome Forissier <[email protected]>
2026-03-13net: lwip: scale buffer pool size with TFTP block sizePranav Tilak
TFTP transfers fail when tftpblocksize is set to 8192 or larger due to insufficient buffer resources for IP fragment reassembly. Calculate PBUF_POOL_SIZE and IP_REASS_MAX_PBUFS dynamically based on CONFIG_TFTP_BLOCKSIZE using IP fragmentation boundaries (1480 usable bytes per fragment at 1500 MTU). The pool size includes headroom for TX, ARP, and protocol overhead, while ensuring PBUF_POOL_SIZE remains greater than IP_REASS_MAX_PBUFS as required by lwIP. Signed-off-by: Pranav Tilak <[email protected]>
2026-03-13net: lwip: Fix PBUF_POOL_BUFSIZE when PROT_TCP_LWIP is disabledJonas Karlman
The PBUF_POOL_BUFSIZE ends up being only 592 bytes, instead of 1514, when PROT_TCP_LWIP Kconfig option is disabled. This results in a full Ethernet frame requiring three PBUFs instead of just one. This happens because the PBUF_POOL_BUFSIZE constant depends on the value of a TCP_MSS constant, something that defaults to 536 when PROT_TCP_LWIP is disabled. PBUF_POOL_BUFSIZE = LWIP_MEM_ALIGN_SIZE(TCP_MSS + 40 + PBUF_LINK_HLEN) Ensure that a full Ethernet frame fits inside a single PBUF by moving the define of TCP_MSS outside the PROT_TCP_LWIP ifdef block. Fixes: 1c41a7afaa15 ("net: lwip: build lwIP") Acked-by: Jerome Forissier <[email protected]> Signed-off-by: Jonas Karlman <[email protected]>
2026-03-13net: do not use non-existent CONFIG_DM_CLKHeinrich Schuchardt
For enabling the clock driver we use symbol CONFIG_CLK. Select this symbol for the HiSilicon Fast Ethernet Controller driver. Signed-off-by: Heinrich Schuchardt <[email protected]> Reviewed-by: Quentin Schulz <[email protected]>
2026-03-13net: phy: air_en8811: add support for Airoha AN8811HB PHYTommy Shih
Add support for the Airoha AN8811HB 2.5 Gigabit PHY to the existing en8811h driver. This PHY supports 10/100/1000/2500 Mbps speeds. Update the driver to recognize the AN8811HB PHY ID and handle its specific firmware loading requirements. The firmware loading mechanism remains consistent with the existing implementation. This driver is based on: - Linux upstream PHY subsystem (v7.0-rc1) - air_an8811hb v0.0.4 out-of-tree uboot driver written by "Lucien.Jheng <[email protected]>" Tested on MT7987 RFB board. Link: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=6f1769ec5892ac41d82e820d94dcdc68e904aa99 Link: https://patchwork.kernel.org/project/netdevbpf/patch/[email protected]/ Signed-off-by: Tommy Shih <[email protected]> Reviewed-by: Lucien.Jheng <[email protected]>
2026-03-12Merge tag 'rpi-2026.04-rc4' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-raspberrypi Updates for RPi for 2026.04-rc4: - board/raspberrypi: add bcm2712d0-rpi-5-b for Raspberry Pi 5 - board/raspberrypi: add multi-FDT support - rpi: pass the Video Core logs DT parameter through - pinctrl: bcm283x: Fix GPIO pull state register values for BCM2711
2026-03-13riscv: mpfs: SIFIVE_CLINT and SPL_SIFIVE_CLINT don't existHeinrich Schuchardt
Don't imply non-existent symbols CONFIG_SIFIVE_CLINT and SPL_SIFIVE_CLINT. MPFS boards neither use SPL nor do they run main U-Boot in M-mode. So we don't need CONFIG_(SPL_)ACLINT either. Signed-off-by: Heinrich Schuchardt <[email protected]> Acked-by: Conor Dooley <[email protected]>
2026-03-13openpiton: imply CONFIG_SPL_CPUHeinrich Schuchardt
There is no symbol CONFIG_SPL_CPU_SUPPORT. The intended symbol is called CONFIG_SPL_CPU. Signed-off-by: Heinrich Schuchardt <[email protected]> Reviewed-by: Tianrui Wei <[email protected]> Fixes: 8a44fe694394 ("board: riscv: add openpiton-riscv64 SoC support") Reviewed-by: Quentin Schulz <[email protected]>
2026-03-13riscv: don't imply non-existent CONFIG_IP_DYNHeinrich Schuchardt
The symbol CONFIG_IP_DYN does not exist, but multiple contributors copied an imply statement. Remove the imply IP_DYN statements. Fixes: 3fda0262c33f ("riscv: Add SiFive FU540 board support") Fixes: 64413e1b7caf ("riscv: Add Microchip MPFS Icicle Kit support") Fixes: 70415e1e528d ("board: sifive: add HiFive Unmatched board support") Fixes: 6f902b85b6ee ("board: starfive: Add Kconfig for StarFive VisionFive v2 Board") Signed-off-by: Heinrich Schuchardt <[email protected]> Acked-by: Conor Dooley <[email protected]>
2026-03-13driver: cache: Remove SiFive PL2 driverNick Hu
Under single core boot platform, the secondary cores won't enter the u-boot spl. Therefore we move the pl2 driver from u-boot to the Opensbi. Signed-off-by: Nick Hu <[email protected]> Signed-off-by: Jimmy Ho <[email protected]> Reviewed-by: Leo Yu-Chi Liang <[email protected]>
2026-03-13sifive: switch to OF_UPSTREAMAndreas Schwab
Tested on HiFive Unleashed and HiFive Unmatched, both SPIFlash and MMC boot. Signed-off-by: Andreas Schwab <[email protected]> Reviewed-by: Leo Yu-Chi Liang <[email protected]>
2026-03-12boot: availability of command mii for NET_LWIPHeinrich Schuchardt
If we are using the legacy or the LWIP network stack, should not influence our decision to provide command `mii`. Let BOOT_DEFAULTS_CMDS imply MII if either of the network stacks is available. Signed-off-by: Heinrich Schuchardt <[email protected]>
2026-03-12net: airoha: use mt7531 mdio for GDM1Mikhail Kshevetskiy
Current code just bind mt7531 mdio with it's driver, so mdio device may not be probed and hense not usable. This patch: * Forces probing of mt7531 mdio for GDM1 port * Renames the mt7531 mdio bus interface to 'mt7531-mdio'. We may have multiple available MDIO, so the name 'mdio' isn't descriptive enough. * Sets mdio bus for the GDM port device Signed-off-by: Mikhail Kshevetskiy <[email protected]>
2026-03-12net: airoha: makes PCS support optionalMikhail Kshevetskiy
It's not possible to disable PCS support just now, an7581 u-boot will not compile. This patch fixes an issue. Signed-off-by: Mikhail Kshevetskiy <[email protected]>
2026-03-12net: airoha: fill in support for PCS/PHY in Airoha Ethernet driverChristian Marangi
Add required changes to call PCS function to configure the Serdes Port. The Ethernet driver is adapted following Upstream Kernel node structure. Function calling order is the same of Phylink upstream kernel. With the PCS support, also add support for attaching PHY. With "in-band-status" set in DT for the managed property, a rudimental support for SFP module is present. Signed-off-by: Christian Marangi <[email protected]>
2026-03-12configs: enable PCS for Airoha AN7581Christian Marangi
Enable PCS config for Airoha AN7581 SoC by default to enable support for External PHY. Signed-off-by: Christian Marangi <[email protected]>
2026-03-12airoha: add PCS node for AN7581Christian Marangi
Add PCS node for Airoha AN7581 SoC to enable support for Serdes Ethernet and PON port. Signed-off-by: Christian Marangi <[email protected]>
2026-03-12airoha: add GDM1 sub-node into EN7523 ethernet controller nodeMikhail Kshevetskiy
This is required to make ethernet working after PCS support changes Signed-off-by: Mikhail Kshevetskiy <[email protected]>
2026-03-12net: airoha-pcs: an7581: sync with linux code a bitMikhail Kshevetskiy
based on linux kernel patches from https://github.com/Ansuel/openwrt/commits/openwrt-24.10-airoha-an7581-stable/ created by Christian Marangi <[email protected]> Signed-off-by: Mikhail Kshevetskiy <[email protected]>
2026-03-12Merge tag 'mediatek-for-next-2026-03-11' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-mediatek into next A fix: * Fixing compiling MT8195 due to some independent changes that were applied around the same time as MT8195 support was merged. (CI would not have caught this since we didn't have a defconfig until now). And few small features: * New defconfig for MT8395/Genio 1200 EVK. * pinctrl support for MT8189-compatible SoCs.
2026-03-12board/raspberrypi: add bcm2712d0-rpi-5-b for Raspberry Pi 5Filip Kokosiński
This commit adds an FDT entry for the d0 stepping of the BCM2712 SoC. This entry is used by the v1.1 revision of the board (revision & 0x0f == 1). Signed-off-by: Filip Kokosiński <[email protected]> Reviewed-by: Peter Robinson <[email protected]> Tested-by: Peter Robinson <[email protected]>
2026-03-12board/raspberrypi: add multi-FDT supportFilip Kokosiński
This patch adds support for multiple FDT files per board model. This is done by adding the FDTFILES macro, which initializes two rpi_model struct members: fdtfiles and fdtcount. The new-style revision codes designate LSB bits as board revision; this value is used to choose between provided FDTs. The first element of the fdtfiles list is used should no revision match. Signed-off-by: Filip Kokosiński <[email protected]> Reviewed-by: Peter Robinson <[email protected]> Tested-by: Peter Robinson <[email protected]>
2026-03-12rpi: pass the Video Core logs DT parameter throughPeter Robinson
Pass the VC logs DT parameter through to the kernel device tree. This is used by the vclog tool and is a useful debugging tool. Signed-off-by: Peter Robinson <[email protected]> Acked-by: Matthias Brugger <[email protected]>
2026-03-12pinctrl: bcm283x: Fix GPIO pull state register values for BCM2711Cibil Pankiras
BCM2711 has different pull-up/down register values compared to BCM2835 - BCM2835: NONE=0, DOWN=1, UP=2 - BCM2711: NONE=0, UP=1, DOWN=2 This patch fixes the pull state register values for BCM2711. Fixes: 2c39d975f87c ("pinctrl: bcm283x: Add GPIO pull-up/down control for BCM2835 and BCM2711") Signed-off-by: Cibil Pankiras <[email protected]> Reviewed-by: Matthias Brugger <[email protected]> Reviewed-by: Peter Robinson <[email protected]> Tested-by: Peter Robinson <[email protected]>
2026-03-12net: airoha: pcs: improve/fix building rulesMikhail Kshevetskiy
pcs-airoha-common.o should not build unconditionally, also make building rules looks better. Signed-off-by: Mikhail Kshevetskiy <[email protected]>