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The V4 and V5 controllers have quite varied register layouts. Inherit
the register offsets and naming from the Linux driver. More version
specific offsets can be inherited from Linux as needed.
Fixes: 364c22a ("mmc: msm_sdhci: Add SDCC version 5.0.0 support")
Reviewed-by: Neil Armstrong <[email protected]>
Signed-off-by: Caleb Connolly <[email protected]>
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Enable three new clock drivers.
Signed-off-by: Caleb Connolly <[email protected]>
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Add a clock driver for the SM8250 SoC. This driver can enable necessary
clocks for UART, UFS, USB, and MMC.
Signed-off-by: Caleb Connolly <[email protected]>
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Add a driver for the clock controller in the SM6115 SoC, this is used in
the QRB4210 RB2 board.
Signed-off-by: Caleb Connolly <[email protected]>
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Add a clock driver for the QCM2290 SoC which is used in the QRB2210 RB1
board.
Signed-off-by: Caleb Connolly <[email protected]>
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Finally add the entries for the qcom,pmk8350-pwrkey and qcom,pmk8350-resin
found on PMICs used with SM8350 and later SoCs.
Signed-off-by: Neil Armstrong <[email protected]>
Signed-off-by: Caleb Connolly <[email protected]>
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Move node name checks to a proper data struct with all information
for the supported subnodes.
Replace the key offset defines with the Linux driver ones.
Signed-off-by: Neil Armstrong <[email protected]>
Signed-off-by: Caleb Connolly <[email protected]>
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Add support for PM8550 GPIO controller variant, keep read-only
until the GPIO and Pinctrl setup is fixed for new PMICs.
Signed-off-by: Neil Armstrong <[email protected]>
Signed-off-by: Caleb Connolly <[email protected]>
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Enable the clock and pinctrl drivers for qcm2290, sm6115, and sm8250.
Reviewed-by: Neil Armstrong <[email protected]>
Acked-by: Sumit Garg <[email protected]>
Signed-off-by: Caleb Connolly <[email protected]>
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This SoC features a pinctrl block with north, south, and west tiles
accessible to the AP.
Reviewed-by: Neil Armstrong <[email protected]>
Acked-by: Sumit Garg <[email protected]>
Signed-off-by: Caleb Connolly <[email protected]>
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This SoC features a pinctrl block with west, east, and south tiles.
Reviewed-by: Neil Armstrong <[email protected]>
Acked-by: Sumit Garg <[email protected]>
Signed-off-by: Caleb Connolly <[email protected]>
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This SoC has a basic pinctrl block with no tiles.
Reviewed-by: Neil Armstrong <[email protected]>
Acked-by: Sumit Garg <[email protected]>
Signed-off-by: Caleb Connolly <[email protected]>
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Enable the SM8550 & SM8650 pinctrl drivers for Qualcomm defconfig.
Signed-off-by: Neil Armstrong <[email protected]>
Acked-by: Sumit Garg <[email protected]>
Reviewed-by: Caleb Connolly <[email protected]>
Signed-off-by: Caleb Connolly <[email protected]>
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Add pinctrl driver for the TLMM block found in the SM8650 SoC.
This driver only handles the gpio and qup2_se7 pinmux, and makes sure
the pinconf applies on SDC2 pins.
Signed-off-by: Neil Armstrong <[email protected]>
Acked-by: Sumit Garg <[email protected]>
Reviewed-by: Caleb Connolly <[email protected]>
Signed-off-by: Caleb Connolly <[email protected]>
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Add pinctrl driver for the TLMM block found in the SM8550 SoC.
This driver only handles the gpio and qup1_se7 pinmux, and makes sure
the pinconf applies on SDC2 pins.
Signed-off-by: Neil Armstrong <[email protected]>
Acked-by: Sumit Garg <[email protected]>
Reviewed-by: Caleb Connolly <[email protected]>
Signed-off-by: Caleb Connolly <[email protected]>
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Enable the Qualcomm Synopsys eUSB2 PHY driver in Qualcomm defconfig.
Signed-off-by: Neil Armstrong <[email protected]>
Acked-by: Sumit Garg <[email protected]>
Signed-off-by: Caleb Connolly <[email protected]>
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Add a driver for the new Synopsys eUSB2 PHY found in the SM8550
and SM8650 SoCs.
Signed-off-by: Neil Armstrong <[email protected]>
Acked-by: Sumit Garg <[email protected]>
Signed-off-by: Caleb Connolly <[email protected]>
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Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <[email protected]>
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Signed-off-by: Tom Rini <[email protected]>
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Janne Grunau <[email protected]> says:
This series contains a few misc config changes for Apple silicon
systems:
- switch from the deprecated distro boot scripts to standard boot
- allows EFI console resizing based on the video console size
- enables 16x32 bitmap fonts as Apple devices come with high DPI
displays
- enables 64-bit LBA addressing
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The bootflow list is only seen briefly and is probably more confusing
than helpful.
Signed-off-by: Janne Grunau <[email protected]>
Reviewed-by: Neal Gompa <[email protected]>
Reviewed-by: Mark Kettenis <[email protected]>
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Use standard boot instead of the distro boot scripts. Use
BOOTSTD_FULL instead of BOOTSTD_DEFAULTS for easier interactive use.
Signed-off-by: Janne Grunau <[email protected]>
Reviewed-by: Mark Kettenis <[email protected]>
Reviewed-by: Neal Gompa <[email protected]>
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Apple devices have high DPI displays so the larger fonts are preferable
for improved readability. This does not yet change the used font based
on the display's pixel density so the standard 8x16 font is still used
by default.
Reviewed-by: Mark Kettenis <[email protected]>
Reviewed-by: Neal Gompa <[email protected]>
Signed-off-by: Janne Grunau <[email protected]>
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The display size querying in efi_console relies on this order. The
display should be the primary output device and should be used to
display more than 80x25 chars.
Reviewed-by: Mark Kettenis <[email protected]>
Reviewed-by: Neal Gompa <[email protected]>
Signed-off-by: Janne Grunau <[email protected]>
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This makes USB HDDs >2TiB work. The only reason this hasn't bitten us
for the internal NVMe yet is the 4K sector size, because the largest SSD
Apple sells is 8TB and we can handle up to 16TiB with that sector size.
Close call.
Signed-off-by: Hector Martin <[email protected]>
Reviewed-by: Mark Kettenis <[email protected]>
Reviewed-by: Neal Gompa <[email protected]>
Signed-off-by: Janne Grunau <[email protected]>
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Michal Simek <[email protected]> says:
I looked as cleaning up some dependencies and I found that qconfig is
reporting some issues. This series is fixing some of them. But there are
still some other pending. That's why please go and fix them if they are
related to your board.
UTF-8: I am using uni2ascii -B < file to do conversion. When you run it in
a loop you will find some other issue with copyright chars or some issues
in files taken from the Linux kernel like DTs. They should be likely fixed
in the kernel first.
Based on discussion I am ignoring names too.
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Convert UTF-8 chars to ASCII in cases where make sense. No Copyright or
names are converted.
Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Acked-by: Marek Behún <[email protected]>
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Some of Kconfigs are using utf-8 encoding because of used chars. Convert
all of them to ascii enconging. Based on discussion ASCII should be used in
general with the exception of names.
Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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All errors are generated by ./tools/qconfig.py -b -j8 -i whatever.
Error look like this:
warning: style: quotes recommended around default value for string symbol
EFI_VAR_SEED_FILE (defined at lib/efi_loader/Kconfig:130)
Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Ilias Apalodimas <[email protected]>
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All errors are generated by ./tools/qconfig.py -b -j8 -i whatever.
Error look like this:
drivers/crypto/Kconfig:9: warning: style: quotes recommended around
'drivers/crypto/nuvoton/Kconfig' in 'source drivers/crypto/nuvoton/Kconfig'
Signed-off-by: Michal Simek <[email protected]>
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All errors are generated by ./tools/qconfig.py -b -j8 -i whatever.
Error look like this:
warning: SPL_CLK_CCF (defined at drivers/clk/Kconfig:59) has leading or
trailing whitespace in its prompt
Signed-off-by: Michal Simek <[email protected]>
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While I have said this in various release emails, it should be
documented here as well that the next branch opens with the second
release candidate.
Signed-off-by: Tom Rini <[email protected]>
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Not many and nothing really exciting this time: there are more patches
in fly, but they are not ready yet. I will also send some DT updates
and new board defconfig files later, once they have seen the list. I am
aware of the USB rebasing repo efforts, but would like to see how this
plays out, also we have one compatibility issue that I painstakingly
work around in the U-Boot tree for the last three years or so. So for
now I stick to the previous approach.
So now just some easy changes: support for USB peripheral mode on the
Allwinner F1C100s, T113-s3 SPI boot support, and some SPL cleanup
patches.
The branch passed the gitlab CI run, and brief boot testing on some
boards didn't turn up any issues.
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Use recently added ability to assign commands to buttons via env.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Of all T30 transformers, only the TF700T has a FullHD DSI panel,
which is connected via tc358768 RGB to DSI bridge. Since the
bridge driver is available now, TF700T can have video support.
Tested-by: Andreas Westman Dorcsak <[email protected]> # ASUS TF700T
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Of all T30 transformers, only the TF700T uses GPIO i2c muxing
for one of the i2c lines and needs this driver to properly work.
Disable this configuration for all transformers except tf700t
in their fragments.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Of all T30 transformers, only the TF600T uses SPI flash and
needs SLINK driver to work with it. Move this configuration
to the tf600t fragment from common defconfig.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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T20 and T30 have 5 UARTs, while T114+ have only 4. Fix this by
adding missing UARTE Kconfig for T20/T30.
Signed-off-by: Jonas Schwöbel <[email protected]>
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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For lock and io-reset pins 0 is the default value, while 1 is disabled
and 2 is enabled. This should be corrected to avoid regressions.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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TF600T is pretty picky in terms of LV pinmux configuration.
The wrong setup will cause issues with eMMC and video.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Unlike all other transformers, TF600T has an SPI flash to store
boot firmware and requires precise SPI pinmux configuration.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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CONFIG_SYS_L2CACHE_OFF is not affecting these devices in any way.
Signed-off-by: Jonas Schwöbel <[email protected]>
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Switch transformer, endeavoru, grouper and x3_t30 boards
to bootflow scan.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Drop the distro-boot scripts and use standard boot instead.
Inspired by:
'commit 7755dc58af7b ("rockchip: Move to standard boot")'
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Paz00 can have multiple panels with different timings, but they
all share common feature - panel exposes EDID.
Tested-by: Agneli <[email protected]> # Toshiba AC100 T20
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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In clock_sun9i.c, responsible for (mostly early) clock setup on the
Allwinner A80 SoC, many functions are only needed by the SPL, and are
thus already guarded by CONFIG_SPL_BUILD.
Over the years drivers like for the UART or I2C were converted to DM, and
they care about clock setup themselves now, by using a proper DM clock
driver.
This means those devices need the clock setup functions here for the SPL
only. Move some functions around, to group all SPL-only function within
one #ifdef guard. Some functions were exported, but never used outside
of this file, so remove their prototypes from the header file and mark
them as static.
This avoids unnecessary code in U-Boot proper and helps further
refactoring. Add some comments on the way to help understanding of the
file.
Signed-off-by: Andre Przywara <[email protected]>
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In clock_sun8i_a83t.c, responsible for (mostly early) clock setup on the
Allwinner A83T SoC, many functions are only needed by the SPL, and are
thus already guarded by CONFIG_SPL_BUILD.
Over the years drivers like for the UART or I2C were converted to DM,
so they care about clock setup themselves now, by using a proper DM clock
driver.
This means those devices need the clock setup functions here for the SPL
only. Include those functions into the existing CONFIG_SPL_BUILD guards,
so they are compiled for the SPL only.
This avoids unnecessary code in U-Boot proper and helps further
refactoring. Add some comments on the way to help understanding of the
file.
Signed-off-by: Andre Przywara <[email protected]>
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