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Heavily based on Linux kernel Samsung clock framework, with some changes
to accommodate the differences in U-Boot CCF implementation. It's also
quite minimal as compared to the Linux version.
Signed-off-by: Sam Protsenko <[email protected]>
Reviewed-by: Chanho Park <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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PLL utilities code is only used by clk-exynos7420 driver at the moment.
Move it into clk-exynos7420 to make clk-pll.c file available for CCF PLL
clocks implementation, which is coming in the next patches.
Signed-off-by: Sam Protsenko <[email protected]>
Reviewed-by: Chanho Park <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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Add basic Power Management Unit (PMU) driver for Exynos SoCs. For now
it's only capable of changing UART path in PMU, which is needed for
E850-96 board. The driver's structure resembles the exynos-pmu driver
from Linux kernel, and although it's very basic and slim at the moment,
it can be easily extended in future if the need arises.
UCLASS_NOP is used, as there are no benefits in using more elaborate
classes like UCLASS_MISC in this case. The DM_FLAG_PROBE_AFTER_BIND flag
is added in bind function, as the probe function must be always called
for this driver.
Signed-off-by: Sam Protsenko <[email protected]>
Reviewed-by: Chanho Park <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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USIv2 IP-core is found on modern ARM64 Exynos SoCs (like Exynos850) and
provides selectable serial protocol (one of: UART, SPI, I2C). USIv2
registers usually reside in the same register map as a particular
underlying protocol it implements, but have some particular offset. E.g.
on Exynos850 the USI_UART has 0x13820000 base address, where UART
registers have 0x00..0x40 offsets, and USI registers have 0xc0..0xdc
offsets. Desired protocol can be chosen via SW_CONF register from System
Register block of the same domain as USI.
Before starting to use a particular protocol, USIv2 must be configured
properly:
1. Select protocol to be used via System Register
2. Clear "reset" flag in USI_CON
3. Configure HWACG behavior (e.g. for UART Rx the HWACG must be
disabled, so that the IP clock is not gated automatically); this is
done using USI_OPTION register
4. Keep both USI clocks (PCLK and IPCLK) running during USI registers
modification
This driver implements the above behavior. Of course, USIv2 driver
should be probed before UART/I2C/SPI drivers. It can be achieved by
embedding UART/I2C/SPI nodes inside of the USI node (in Device Tree);
driver then walks underlying nodes and instantiates those. Driver also
handles USI configuration on PM resume, as register contents can be lost
during CPU suspend.
This driver is designed with different USI versions in mind. So it
should be relatively easy to add new USI revisions to it later.
Driver's code was copied over from Linux kernel [1] and adapted
correspondingly for U-Boot API. UCLASS_MISC is used, and although no
misc operations are implemented, it makes it easier to probe the driver
this way (as compared to UCLASS_NOP) and keep the code compact.
[1] drivers/soc/samsung/exynos-usi.c
Signed-off-by: Sam Protsenko <[email protected]>
Reviewed-by: Chanho Park <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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Add bindings documentation and the header file for Exynos850 clock
controller. It was taken from Linux kernel [1,2].
[1] Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml
[2] include/dt-bindings/clock/exynos850.h
Signed-off-by: Sam Protsenko <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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Add bindings documentation for Exynos PMU hardware block. It was taken
from Linux kernel [1], but minimized and modified to reflect features
that will be actually supported in U-Boot soon. For example,
the "samsung,uart-debug-1" property is not available in Linux kernel
bindings and only present in U-Boot.
[1] Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml
Signed-off-by: Sam Protsenko <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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Add USI bindings documentation and header file. Those are taken from
Linux kernel [1,2], but the documentation was reworked a bit to only
describe the compatibles that will be supported in U-Boot soon.
[1] Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
[2] include/dt-bindings/soc/samsung,exynos-usi.h
Signed-off-by: Sam Protsenko <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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This series results in making it such that with CONFIG_MTD disabled we
then do not prompt the user for a number of memory technology device
related options and so clean up our configuration menu / display.
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The help for CONFIG_MTD explains that it needs to be enabled for various
things like NAND, etc to be available. It however then doesn't enforce
this dependency and so if you have none of these systems present you
still need to disable a number of options. Fix this by making places
that select/imply one type of flash, but did not do the same, also do
this for "MTD". Make boards which hadn't been enabling MTD already but
need it now, do so. In a few places, disable CONFIG_CMD_MTDPARTS as it
wasn't previously enabled but was now being implied.
Signed-off-by: Tom Rini <[email protected]>
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This command is only useful on CFI and NOR type flashes and not others.
Update the dependency so that it's not enabled by default in other
cases. This will lead to a number of platforms no longer building this
command, where it was not useful.
Signed-off-by: Tom Rini <[email protected]>
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In order for our environment to be present on SPI flash we need to
depend not on the symbol for a SPI controller but rather that SPI flash
of some sort is present. Update the dependencies.
Signed-off-by: Tom Rini <[email protected]>
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Rather than rely on someone selecting or implying this hidden symbol
that the command requires, select it explicitly.
Signed-off-by: Tom Rini <[email protected]>
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This specific bit logic is used to determine what NAND chip is present
on a board in order to then know what revision of the board we have and
so what DDR chips are present. We can only do this if we have a NAND
chip, and so we will have NAND_OMAP_GPMC enabled.
Signed-off-by: Tom Rini <[email protected]>
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Currently when a hub is turned on, all the ports are powered on.
This works well for hubs which have individual power control.
For the hubs without individual power control this has no effect.
Mostly in these scenarios the hub port is powered before the USB
controller is enabled, this can lead to some devices in unexpected
state.
With this patch, we explicitly reset the port while powering up hub
This resets the port for hubs without port power control and has
no effect on hubs with port power control as the port is still off.
Before this patch AMicro AM8180 based NVME to USB adapter won't be
detected as a USB3.0 Mass Storage device but with this it works as
expected.
Tested working after this patch:
1. AMicro AM8180 based NVME to USB Adapter
2. Kingston DataTraveler 3.0
3. GenesysLogic USB3.0 Hub
The drives were tested while connected directly and via the hub.
Signed-off-by: Shantur Rathore <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
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- solidrun: clearfog gtr: add serdes configuration (Josua)
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https://gitlab.denx.de/u-boot/custodians/u-boot-imx
- Allow i.MX8M Plus DHCOM to operate in overdrive mode.
- Allow i.MX8M Plus eDM SBC to operate in overdrive mode.
- Enable the 'kaslrseed' command on DH i.MX8M Plus DHCOM.
- Select LTO by default on i.MX8M.
- Convert pico-dwarf/hobbit-imx6ul to CONFIG_DM_SERIAL.
- Fix 'reset' command on wandboard.
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https://github.com/tienfong/uboot_mainline
A few small SoCFPGA updates
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Clearfog GTR connects eth2 / serdes 1 to a 2.5Gbps capable ethernet
switch port. Linux already configures a fixed-link at speed 2500 from
device-tree.
Upgrade serdes 1 rate to 3.125Gbps to support a 2.5Gbps link.
Additionally add comments documenting each serdes' function of clearfog
gtr, which are shared with clearfog pro.
Signed-off-by: Josua Mayer <[email protected]>
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Clearfog GTR has an assembly option for a SATA connector, CON18.
It shares the serdes with mini-pcie connector CON3.
Add new kconfig option to select betweenata and pci, defaulting to pci
as it was previously configured in board-file.
Clearfog GTR connects eth2 / serdes 1 to a 2.5Gbps capable ethernet
switch port. Linux already configures a fixed-link at speed 2500 from
device-tree.
Upgrade serdes 1 rate to 3.125Gbps to support a 2.5Gbps network link on
Clearfog GTR.
Signed-off-by: Josua Mayer <[email protected]>
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Linux 6.6.y with KASLR enabled would print the following message on boot:
"
KASLR disabled due to lack of seed
"
Enable the 'kaslrseed' command so a random number seed can be pulled
from CAAM and inserted into the /chosen node 'kaslr-seed' property of
Linux kernel DT before boot, thus letting KASLR work properly.
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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The conversion to CONFIG_DM_SERIAL is mandatory, so select
this option.
Signed-off-by: Fabio Estevam <[email protected]>
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Commit 68dcbdd594d4 ("ARM: imx: Add weak default reset_cpu()") caused
the 'reset' command in U-Boot to not cause a board reset.
Fix it by switching to the watchdog driver model via sysreset, which
is the preferred method for implementing the watchdog reset.
Signed-off-by: Fabio Estevam <[email protected]>
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The CONFIG_SPL_BOARD_INIT lets SPL common code call spl_board_init()
during the SPL start up. On this particular system, spl_board_init()
is used to reconfigure GIC clock parent to PLL2 500M, which is the
configuration expected by the Linux kernel. Enable SPL_BOARD_INIT
and fill in the GIC clock configuration code.
Set GIC clock to 500 MHz for OD VDD_SOC. Kernel driver does not
allow to change it. Should set the clock after PMIC setting done.
Default is 400 MHz (system_pll1_800m with div = 2) set by ROM for
ND VDD_SOC.
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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The CONFIG_SPL_BOARD_INIT lets SPL common code call spl_board_init()
during the SPL start up. On this particular system, spl_board_init()
is used to reconfigure GIC clock parent to PLL2 500M, which is the
configuration expected by the Linux kernel. Enable SPL_BOARD_INIT .
Set GIC clock to 500 MHz for OD VDD_SOC. Kernel driver does not
allow to change it. Should set the clock after PMIC setting done.
Default is 400 MHz (system_pll1_800m with div = 2) set by ROM for
ND VDD_SOC.
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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In an attempt to select ARMV8_SPL_EXCEPTION_VECTORS, the SPL size
could not fit into the internal SRAM of some imx8m targets:
aarch64: + imx8mm_phg
+aarch64-linux-ld.bfd: u-boot-spl section `__u_boot_list' will not fit in region `.sram'
+aarch64-linux-ld.bfd: region `.sram' overflowed by 1824 bytes
Select LTO to prevent that.
Signed-off-by: Fabio Estevam <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
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The reserved space is extended to 32MB in Linux kernel because
additional space is needed for authorization execution of JIC/RBF file.
U-Boot required to align with Linux.
Signed-off-by: Dinesh Maniyam <[email protected]>
Reviewed-by: Tien Fong Chee <[email protected]>
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MEMCLKMGR_EXTCNTRST_C0CNTRST register defined as BIT[0] in documentation
but it is wrongly defined as BIT[7] in u-boot code. This register is used
to hold associated pingpong counter in reset
while PLL and 5:1 mux configuration is changed.
Signed-off-by: Dinesh Maniyam <[email protected]>
Reviewed-by: Tien Fong Chee <[email protected]>
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This patch is to add SPI clock support for stratix10. Get clock rate
function always returning 0 because the DW-SPI driver get the rate
from clock node in dts but Stratix10 does not support device tree
clock node.To overcome this spi will get the clock_rate directly
from spi clock controller override the weaker function.
Signed-off-by: Dinesh Maniyam <[email protected]>
Reviewed-by: Tien Fong Chee <[email protected]>
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These removed definitions were specific to some sam9 SoCs, but not
generic over all at91 SoCs. The correct SoC specific definitions for
ATMEL_BASE_PMECC are spread over different header files in
arch/arm/mach-at91/include/mach directory.
Fixes a build error on a custon board based on SAMA5D2:
Building current source for 73 boards (16 threads, 1 job per thread)
arm: + vera2
+drivers/mtd/nand/raw/atmel/pmecc.c:819: warning: "ATMEL_BASE_PMECC" redefined
+ 819 | #define ATMEL_BASE_PMECC 0xffffe000
+ |
+In file included from include/configs/vera2.h:11,
+ from include/config.h:3,
+ from include/linux/mtd/rawnand.h:16,
+ from drivers/mtd/nand/raw/atmel/pmecc.c:44:
+include/asm/arch/sama5d2.h:171: note: this is the location of the previous definition
+ 171 | #define ATMEL_BASE_PMECC (ATMEL_BASE_HSMC + 0x70)
+drivers/mtd/nand/raw/atmel/pmecc.c:820: warning: "ATMEL_BASE_PMERRLOC" redefined
+ 820 | #define ATMEL_BASE_PMERRLOC 0xffffe600
+include/asm/arch/sama5d2.h:172: note: this is the location of the previous definition
+ 172 | #define ATMEL_BASE_PMERRLOC (ATMEL_BASE_HSMC + 0x500)
Fixes: a490e1b7c017 ("nand: atmel: Add pmecc driver")
Signed-off-by: Alexander Dahl <[email protected]>
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Port from Linux v6.7-rc4. Should not hurt U-Boot but makes diffing
easier and allows referencing node names in board dts.
Signed-off-by: Alexander Dahl <[email protected]>
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Required for using the new DM based atmel nand driver.
Ported from Linux v6.7-rc4.
Signed-off-by: Alexander Dahl <[email protected]>
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Nodes are ordered by register offset.
Fixes: 56246d1e8705 ("ARM: dts: at91: sama5: Add the sfr node")
Signed-off-by: Alexander Dahl <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request efi-2024-04-rc1-3
Documentation:
* correct documentation of part_get_bootable()
* remove duplicate word "has" in UEFI documentation
UEFI:
* rename check_disk_has_default_file function
* auto-generate boot option for each blkio device
* auto-generate removable media boot option first
* avoid pointer access after calling efi_delete_handle
* create common function to free struct efi_disk_obj
* return immediately in UCLASS_EFI_LOADER removal
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In case of UCLASS_EFI_LOADER, EFI handles are managed by
EFI application/driver, we must not delete EFI handles.
Signed-off-by: Masahisa Kojima <[email protected]>
Reviewed-by: Heinrich Schuchardt <[email protected]>
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Current error handling of creating raw disk/partition has
following issues.
- duplicate free for EFI handle, EFI handle is already freed
in efi_delete_handle()
- missing free for struct efi_device_path and
struct efi_simple_file_system_protocol in some error paths
To address those issues, this commit creates the common function
to free the struct efi_disk_obj resources and calls it in case
of error.
Signed-off-by: Masahisa Kojima <[email protected]>
Reviewed-by: Ilias Apalodimas <[email protected]>
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efi_delete_handle() calls efi_purge_handle(), then it finally
frees the EFI handle.
Both diskobj and handle variables in efi_disk_remove() have
the same pointer, we can not access diskobj->dp after calling
efi_delete_handle().
This commit saves the struct efi_device_path pointer before
calling efi_delete_handle(). This commit also fixes the
missing free for volume member in struct efi_disk_obj.
This commit also removes the container_of() calls, and
adds the TODO comment of missing efi_close_protocol() call
for the parent EFI_BLOCK_IO_PROTOCOL.
Signed-off-by: Masahisa Kojima <[email protected]>
Reviewed-by: Ilias Apalodimas <[email protected]>
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This commit auto-generates the boot option for removable
block io devices followed by fixed block io devices.
This is what EDK II reference implementation does.
Signed-off-by: Masahisa Kojima <[email protected]>
Reviewed-by: Heinrich Schuchardt <[email protected]>
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Current efibootmgr auto-generates the boot option for all
disks and partitions installing EFI_SIMPLE_FILE_SYSTEM_PROTOCOL,
while EDK II reference implementation auto-generates the boot option
for all devices installing EFI_BLOCK_IO_PROTOCOL with
eliminating logical partitions.
This commit modifies the efibootmgr to get aligned to EDK II.
Signed-off-by: Masahisa Kojima <[email protected]>
Reviewed-by: Heinrich Schuchardt <[email protected]>
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check_disk_has_default_file() function checks if the
architecture-specific default file exists on the block
device, and fills the default file device path if it exists.
Rename the function name to fill_default_file_path().
Signed-off-by: Masahisa Kojima <[email protected]>
Reviewed-by: Heinrich Schuchardt <[email protected]>
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We have to use 'Return:' to render the description of the return value in
the HTML documentation.
Fixes: f55aa4454ac3 ("part: Add a fallback for part_get_bootable()")
Fixes: dcffa4428d03 ("part: Add a function to find the first bootable partition")
Signed-off-by: Heinrich Schuchardt <[email protected]>
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There should be only one "has" instead of "has has"
Signed-off-by: Wei Ming Chen <[email protected]>
Reviewed-by: Heinrich Schuchardt <[email protected]>
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Roger Quadros <[email protected]> says:
Hi,
This series fixes USB operation on k3-j721e based boards.
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This is required for USB Super-Speed operation.
Signed-off-by: Roger Quadros <[email protected]>
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Without correct SERDES MUX and Lane control settings
USB0 will be broken. Set the MUX and Lane control devices
to be auto probed so they are configured correctly.
Signed-off-by: Roger Quadros <[email protected]>
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Without correct SERDES MUX and Lane control settings
USB0 will be broken. Set the MUX and Lane control devices
to be auto probed so they are configured correctly.
Fixes: 69b19ca67bcb ("arm: dts: k3-j721e: Sync with v6.6-rc1")
Signed-off-by: Roger Quadros <[email protected]>
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The phys property is optional so don't complain
if it doesn't exist in device tree.
Signed-off-by: Roger Quadros <[email protected]>
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Since commit 69b19ca67bcb ("arm: dts: k3-j721e: Sync with v6.6-rc1"),
the following error message is seen at u-boot
"Sierra init failed:-19"
Probing and initializing the SERDES PHY from
board file is not a clean solution so drop it.
Proper use case should be via PHY_UCLASS APIs.
Signed-off-by: Roger Quadros <[email protected]>
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We need BOOTSTD_DEFAULT when BOOTSTD_FULL is selected.
Signed-off-by: Shantur Rathore <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-stm
Add CMDLINE dependecy for CMD_STM32KEY
STM32MP1:
---------
Set stdio to serial on DH STM32MP15xx DHSOM
Fix reset for usart1 in scmi configuration
STM32MP2:
---------
Add BSEC and OTP support for STM32MP25
Fix CONFIG_STM32MP25X flag usage
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"#if" was used instead of "#ifdef"
Fixes: 01a701994b05 ("stm32mp2: initial support")
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
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