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Clean up the tree and prepare for DM PMIC migration.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Clean up the tree and prepare for DM PMIC migration.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Clean up the tree and prepare for DM PMIC migration.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Clean up the tree and prepare for DM PMIC migration.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Convert refresh USB to enter console. Transformers have full size
USB and a dock keyboard so access to U-Boot console would be handy.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Default configuration matches values which are set in the board
so this configuration is not required.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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TF201 unlike other transformers uses non-fused xcvr value for
its dock USB port. With out it dock USB and SD reader will not
work.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Change boot logic to primary try to boot from USB in dock, then
from microSD and lastly from eMMC.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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TF600T has significant differences (Tegra DSI and DSI panel,
own power supply system) which makes use of common transformer
device tree complicated.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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P1801-T has significant differences (hdmi panel and backlight,
own power supply system) which makes use of common transformer
device tree complicated.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Default-tap and default-trim values are used for eMMC setup
mostly on T114+ devices. As for now, those values are hardcoded
for T210 and ignored for all other Tegra generations. Fix this
by passing tap and trim values from dts.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Tegra MMC driver has hardcoded tap and trim values as for now.
Set default-tap and default-trim values in sdhci nodes to avoid
regressions in case Tegra MMC driver is upated to use dts values.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-snapdragon
As discussed, here is the maintainers update for Snapdragon. Sumit Garg
who maintains a few of the Qualcomm platforms in U-boot has also been
added as a reviewer.
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https://source.denx.de/u-boot/custodians/u-boot-dfu
u-boot-dfu-20231103
- Fix CRC chunk size in fastboot
- Make size optional for dfu on mmc
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As Ramon has been inactive for some time now, add myself and Neil
Armstrong to maintain Qualcomm efforts going forwards.
Add Sumit Garg who maintains several Qualcomm platforms as reviewer.
Signed-off-by: Caleb Connolly <[email protected]>
Acked-by: Neil Armstrong <[email protected]>
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Just various bugfixes, apart from the TI one
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It isn't clear why we need to have two different paths for closing down
the pipe. Unify them and use the Python to avoid this warning:
subprocess.py:1127: ResourceWarning: subprocess 83531 is still running
Note that this code appears to originally have come from [1] and was
committed into the ChromeOS chromiumos/platform/crosutils repo in the
bin/cros_image_to_target.py file. The addition of the extra code path
came later, so that is chosen for the fixes tag.
[1] https://codereview.chromium.org/3391008
Signed-off-by: Simon Glass <[email protected]>
Fixes: a10fd93cbc patman: Make command methods return a CommandResult
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Buildman assumes that branch names do not have a slash in them, since
slash is used to delimit remotes, etc. This means that a branch called
'WIP/tryme' in remote dm ends up being 'tryme'.
Adjust the logic a little, to try to accommodate this.
For now, no tests are added for this behaviour.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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The sandbox should closely mimic other architectures.
Place each function or data in a separate section and let the linker
eliminate unused ones. This will reduce the binary size.
In the linker script mark that u_boot_sandbox_getopt are to be kept.
Signed-off-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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According to the TRMs of K3 platform of devices, the ROM boot image
format specifies a "Core Options Field" that provides the capability to
set the boot core in lockstep when set to 0 or to split mode when set
to 2. Add support for providing the same from the binman DTS. Also
modify existing test case for ensuring future coverage.
Signed-off-by: Neha Malcom Francis <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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When symbols switch between the inited data section and the read-only
data section their visbility changes, at present, with the -B option.
This is confusing, since adding 'const' to a variable declaration can
make it look like a significant improvement in bloat. But in fact
nothing has changed.
Add 'r' to the list of symbols types that are recorded, to correct this
problem. Add a constant to make it easier to find this code next time.
Signed-off-by: Simon Glass <[email protected]>
Reported-by: Tom Rini <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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on Peach-pi console every key press is echoed with message
'cros_ec_command: Returned status 1'
this is not proper fix, just hack to disable this message
Signed-off-by: Milan P. Stanić <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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cbfsutil completely changed the way that stages are formatted in CBFS.
Adjust the binman implementation to do the same.
This mirrors commit 81dc20e744 in coreboot.
Signed-off-by: Simon Glass <[email protected]>
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In preparation for changing how stages are stored, rename the existing
stage tag.
Signed-off-by: Simon Glass <[email protected]>
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cbfsutil changed to 4-byte alignment for filenames instead of 16.
Adjust the binman implementation to do the same.
This mirrors commit 5779ca718c in coreboot.
Signed-off-by: Simon Glass <[email protected]>
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cbfsutil changed to write zero bytes instead of 0xff when a small
padding must be added. Adjust the binman implementation to do the same.
Drop the code which looks for an unused attribute tag, since it is not
used. A future patch moves the attributes to the end of the header in
any case, so no data will follow the attributes.
This mirrors commit f0cc7adb2f in coreboot.
Signed-off-by: Simon Glass <[email protected]>
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cbfsutil changed to skip adding a compression attribute if there is no
compression. Adjust the binman implementation to do the same.
This mirrors commit 105cdf5625 in coreboot.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Neha Malcom Francis <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-sh
- Remove common.h usage
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For tests which fake bintools being missing, we need to reset the list
afterwards, to ensure that future tests do not also see the bintools as
missing.
Reset the list when processing is complete.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Neha Malcom Francis <[email protected]>
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A Change-Id can be useful for traceability purposes, and some projects
may wish to have them preserved. This change makes it configurable
via a new 'keep_change_id' setting.
Signed-off-by: Maxim Cournoyer <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-i2c
i2c updates for v2024.01-rc2
- nuvoton: support standard/fast/fast plus mode
- bootcount: remove legacy i2c driver and implement
DM based version
Bugfixes:
- designware_i2c: adjust timing calculation
SPL probing failed on the StarFive VisionFive 2 board
Heinrich fixed this, by syncing timing calculation with
linux implementation.
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+ CI: Use OpenSBI 1.3.1 release for testing
+ riscv: Support resume after exception
+ rng: Support RNG provided by RISC-V Zkr ISA extension
+ board: starfive VF2: Support jtag
+ board: starfive VF2: Support TRNG driver
+ board: sifive unmatched: Move kernel load address
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In line with changes elsewhere, drop inclusion of the common header.
Signed-off-by: Paul Barker <[email protected]>
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In line with changes elsewhere, drop inclusion of the common header.
Signed-off-by: Paul Barker <[email protected]>
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In line with changes elsewhere, drop inclusion of the common header.
Signed-off-by: Paul Barker <[email protected]>
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In line with changes elsewhere, drop inclusion of the common header.
Signed-off-by: Paul Barker <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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In line with changes elsewhere, drop inclusion of the common header.
Signed-off-by: Paul Barker <[email protected]>
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In line with changes elsewhere, drop inclusion of the common header.
Signed-off-by: Paul Barker <[email protected]>
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For most source files we can just drop <common.h>. We need to add an
include for <asm/u-boot.h> in a couple of places. Also sort the include
list in memmap-gen3.c while we're here.
Signed-off-by: Paul Barker <[email protected]>
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If <common.h> won't be included before <asm/armv8/mmu.h>, we need to
ensure that we have the required type definitions.
Signed-off-by: Paul Barker <[email protected]>
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Enables JH7110 RNG driver to visionfive2 board.
Signed-off-by: Chanho Park <[email protected]>
Reviewed-by: Heinrich Schuchardt <[email protected]>
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Adds jh7110 trng device tree node.
Signed-off-by: Chanho Park <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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Adds to support JH7110 TRNG driver which is based on linux kernel's
jh7110-trng.c. This can support to generate 256-bit random numbers and
128-bit but this makes 256-bit default for convenience.
Signed-off-by: Chanho Park <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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Add STGCLK_SEC_HCLK and STGCLK_SEC_MISCAHB clocks for JH7110 TRNG
device.
Signed-off-by: Chanho Park <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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This imports mmio functions from Linux's arch/riscv/include/asm/mmio.h
to use read/write[b|w|l|q]_relaxed functions.
Signed-off-by: Chanho Park <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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The Zkr ISA extension (ratified Nov 2021) introduced the seed CSR. It
provides an interface to a physical entropy source.
A RNG driver based on the seed CSR is provided. It depends on
mseccfg.sseed being set in the SBI firmware.
Signed-off-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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If CSRs like seed are readable by S-mode, may not be determinable by
S-mode. For safe driver probing allow to resume via a longjmp after an
exception.
Signed-off-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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JTAG pins are mapped as below. To access the JTAG pins, we need to
control the GPIO pins from SPL which seems to be the earliest stage for
JTAG.
- JTAG nTRST: GPIO36 / Input
- JTAG TDI: GPIO61 / Input
- JTAG TMS: GPIO63 / Input
- JTAG TCK: GPIO60 / Input
- JTAG TDO: GPIO44 / Output
Signed-off-by: Chanho Park <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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Add gpio.h header file that includes JH7110 helper macros. The file is
imported from StarFive github[1] with small changes such as alignment.
[1]: https://github.com/starfive-tech/u-boot
Signed-off-by: Chanho Park <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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Some RISC-V CPUs, such as the T-HEAD XuanTie series, have a
vendor-specific way to invalidate a portion of the instruction cache.
Allow them to override invalidate_icache_range().
Signed-off-by: Samuel Holland <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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