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Several boards enable SPL_FS_FAT and SPL_LIBDISK_SUPPORT when they can't be
used (as there is no block device support enabled). Disable these configs.
The list of boards was generated with the following command:
$ tools/qconfig.py -f SPL SPL_FS_FAT ~SPL_MMC ~SPL_BLK_FS ~SPL_SATA \
~SPL_USB_STORAGE ~ENV_IS_IN_FAT ~EFI
LIBDISK was left enabled for the am* boards, since it seems to result in
actual size reduction, indicating that partitions are being used for
something.
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Michal Simek <[email protected]>
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Initialize ret to avoid returning garbage if blk_get_devnum_by_uclass_id
fails.
Fixes: 8ce6a2e1757 ("spl: blk: Support loading images from fs")
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Several AT91 boards are quite close to their SPL size limit. For example,
sama5d27_wlsom1_ek_mmc is just 173 bytes short of its limit and doesn't
even fit with older GCCs.
All AT91 processors should have thumb support. Enable SYS_THUMB_BUILD. This
shrinks SPL by around 30%.
Signed-off-by: Sean Anderson <[email protected]>
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Add a SPL test for the NAND load method. We use some different functions to
do the writing from the main test since things like nand_write_skip_bad
aren't available in SPL.
We disable BBT scanning, since scan_bbt is only populated when not in SPL.
We use nand_spl_loaders.c as it seems to be common to at least a few boards
already. However, we do not use nand_spl_simple.c because it would require
us to implement cmd_ctrl. The various nand load functions are adapted from
omap_gpmc. However, they have been modified for simplicity/correctness.
Signed-off-by: Sean Anderson <[email protected]>
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Add a sandbox NAND flash driver to facilitate testing. This driver supports
any number of devices, each using a single chip-select. The OOB data is
stored in-band, with the separation enforced through the API.
For now, create two devices to test with. The first is a very small device
with basic ECC. The second is an 8G device (chosen to be larger than 32
bits). It uses ONFI, with the values copied from the datasheet. It also
doesn't need too strong ECC, which speeds things up.
Although the nand subsystem determines the parameters of a chip based on
the ID, the driver itself requires devicetree properties for each
parameter. We do not derive parameters from the ID because parsing the ID
is non-trivial. We do not just use the parameters that the nand subsystem
has calculated since that is something we should be testing. An exception
is made for the ECC layout, since that is difficult to encode in the device
tree and is not a property of the device itself.
Despite using file I/O to access the backing data, we do not support using
external files. In my experience, these are unnecessary for testing since
tests can generally be written to write their expected data beforehand.
Additionally, we would need to store the "programmed" information somewhere
(complicating the format and the programming process) or try to detect
whether block are erased at runtime (degrading probe speeds).
Information about whether each page has been programmed is stored in an
in-memory buffer. To simplify the implementation, we only support a single
program per erase. While this is accurate for many larger flashes, some
smaller flashes (512 byte) support multiple programs and/or subpage
programs. Support for this could be added later as I believe some
filesystems expect this.
To test ECC, we support error-injection. Surprisingly, only ECC bytes in
the OOB area are protected, even though all bytes are equally susceptible
to error. Because of this, we take care to only corrupt ECC bytes.
Similarly, because ECC covers "steps" and not the whole page, we must take
care to corrupt data in the same way.
Signed-off-by: Sean Anderson <[email protected]>
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When working with sparse data buffers that may be larger than the address
space, it is convenient to work with files instead. Add a function to create
temporary files of a certain size.
Signed-off-by: Sean Anderson <[email protected]>
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NAND devices are destroyed in between unit tests. Provide a function to
reinitialize the subsystem at the beginning of each test.
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Dario Binacchi <[email protected]>
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This performs the opposite of nand_register, allowing drivers to unregister
nand devices. This is probably unnecessary for most regular drivers, but we
expect sandbox drivers to get repeatedly bound/unbound, so this will help
avoid dangling pointers.
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Dario Binacchi <[email protected]>
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This allows using these functions without ifdefs. OneNAND depends on MTD,
so this ifdef was redundant in the first place.
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Dario Binacchi <[email protected]>
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Rename SPL_MTD_SUPPORT to SPL_MTD in order to match MTD. This allows using
CONFIG_IS_ENABLED to test for MTD support.
Signed-off-by: Sean Anderson <[email protected]>
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In sandbox we must map memory before accessing it. Do so for the NAND load
method.
Signed-off-by: Sean Anderson <[email protected]>
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In sandbox, all memory must be mapped before accessing it. Do so for the
nand command.
Signed-off-by: Sean Anderson <[email protected]>
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Since commit 34793598c83 ("mtd: nand: mxs_nand_spl: Remove the page aligned
access") there are no longer any users of nand_get_mtd. However, it is
still important to know what the page size is so we can allocate a
large-enough buffer. If the image size is not page-aligned, we will go off
the end of the buffer and clobber some memory.
Introduce a new function nand_page_size which returns the page size. For
most drivers it is easy to determine the page size. However, a few need to
be modified since they only keep the page size around temporarily.
It's possible that this patch could cause a regression on some platforms if
the offset is non-aligned and there is invalid address space immediately
before the load address. spl_load_legacy_img does not (except when
compressing) respect bl_len, so only boards with SPL_LOAD_FIT (8 boards) or
SPL_LOAD_IMX_CONTAINER (none in tree) would be affected.
defconfig CONFIG_TEXT_BASE
======================= ================
am335x_evm 0x80800000
am43xx_evm 0x80800000
am43xx_evm_rtconly 0x80800000
am43xx_evm_usbhost_boot 0x80800000
am43xx_hs_evm 0x80800000
dra7xx_evm 0x80800000
gwventana_nand 0x17800000
imx8mn_bsh_smm_s2 0x40200000
All the sitara boards have DDR mapped at 0x80000000. gwventana is an i.MX6Q
which has DDR at 0x10000000. I don't have the IMX8MNRM handy, but on the
i.MX8M DDR starts at 0x40000000. Therefore all of these boards can handle a
little underflow.
Signed-off-by: Sean Anderson <[email protected]>
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When allocating a buffer to load compressed data into, we need to ensure we
have enough space for over- and under-flow due to alignment. Otherwise we
will clobber the malloc bookkeeping data. Calculate the correct amount of
overhead and use it when determining the size.
Signed-off-by: Sean Anderson <[email protected]>
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All other implementations of nand_spl_load_image only read as many pages as
are necessary to load the image. However, nand_spl_loaders.c loads the full
block. Align it with other load functions so that it is easier to
determine how large of a load buffer we need.
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Michael Trimarchi <[email protected]>
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Contrary to what the help message says, this is the number of pages per
block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and
SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to
SYS_NAND_BLOCK_PAGES.
Signed-off-by: Sean Anderson <[email protected]>
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When no manufacturer is matched, manufacturer_desc is NULL. Avoid
dereferencing it in that case.
Fixes: 4e67c571252 ("mtd,ubi,ubifs: sync with linux v3.15")
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Michael Trimarchi <[email protected]>
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spl_nand_fit_read unconditionally accesses load->priv. Ensure it is set.
Fixes: 00e180cc513 ("spl: nand: support loading i.MX container format file")
Signed-off-by: Sean Anderson <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-dm
patman correct import of u_boot_pylib
correct long-standing EFI framebuffer bug
minor test refactor
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Correct this typo in the warning message shown when no more bootstage
records can be added.
Signed-off-by: Simon Glass <[email protected]>
Signed-off-by: Patrick Delaunay <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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After opening pathname, we must close ifd once we are done with it.
Fixes: b9274095c2c ("sandbox: Add a way to map a file into memory")
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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CONFIG_DM_WARN has a text indicating that these messages should only
provided when debugging. This implies that the setting must be default no.
We should still create debug messages.
Reported-by: Andre Przywara <[email protected]>
Signed-off-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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The importlib_resources import is not actually used. Fix this so that
patman can run on Python 3.6 to some extent, once
'pip3 install importlib-resources' has been run.
Signed-off-by: Simon Glass <[email protected]>
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Import this only when it is needed, since it is not present when
installed via 'pip install'.
Signed-off-by: Simon Glass <[email protected]>
Fixes: https://source.denx.de/u-boot/u-boot/-/issues/26
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Tidy up the code a little to reduce the number of pylint warnings.
Signed-off-by: Simon Glass <[email protected]>
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Add a new run_patman() function to hold the main logic.
Signed-off-by: Simon Glass <[email protected]>
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Move this code into a separate cmdline module, as is done with the
other tools.
Use the same HAS_TESTS check as buildman
Signed-off-by: Simon Glass <[email protected]>
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Use the correct background colour when using white-on-black.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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Return an error when the user does not select an OS, so we know whether
to boot or not.
Move calling of bootflow_menu_run() into a separate function so we can
call it from other places.
Expand the test to cover these cases.
Add some documentation also, while we are here.
Signed-off-by: Simon Glass <[email protected]>
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Adjust scan_mmc4_bootdev() and related function so that the caller can
do its own 'bootflow scan' command. This allows it to change the flags
if needed.
Signed-off-by: Simon Glass <[email protected]>
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The efi_gop driver uses private fields from the video uclass to obtain a
pointer to the frame buffer. Use the platform data instead.
Check the VIDEO_COPY setting to determine which frame buffer to use. Once
the next stage is running (and making use of U-Boot's EFI boot services)
U-Boot does not handle copying from priv->fb to the hardware framebuffer,
so we must allow EFI to write directly to the hardware framebuffer.
We could provide a function to read this, but it seems better to just
document how it works. The original change ignored an explicit comment
in the video.h file ("Things that are private to the uclass: don't use
these in the driver") which is why this was missed when the VIDEO_COPY
feature was added.
Signed-off-by: Simon Glass <[email protected]>
Fixes: 8f661a5b662 ("efi_loader: gop: Expose fb when 32bpp")
Reviewed-by: Bin Meng <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-stm into next
Introduce STM32MP2 SoCs family support
Add STM32MP257F-EV1 board
[trini: Adjust some includes]
Signed-off-by: Tom Rini <[email protected]>
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Add initial support for STM32MP2 SoCs family.
SoCs information are available here :
https://www.st.com/content/st_com/en/campaigns/microprocessor-stm32mp2.html
Migrate all MP1 related code into stm32mp1/ directory
Create stm32mp2 directory dedicated for STM32MP2 SoCs.
Common code to MP1, MP13 and MP25 is kept into
arch/arm/mach-stm32/mach-stm32mp directory :
- boot_params.c
- bsec
- cmd_stm32key
- cmd_stm32prog
- dram_init.c
- syscon.c
- ecdsa_romapi.c
For STM32MP2, it also :
- adds memory region description needed for ARMv8 MMU.
- enables early data cache before relocation.
During the transition before/after relocation, the MMU, initially setup
at the beginning of DDR, must be setup again at a correct address after
relocation. This is done in enables_caches() by disabling cache, force
arch.tlb_fillptr to NULL which will force the MMU to be setup again but
with a new value for gd->arch.tlb_addr. gd->arch.tlb_addr has been
updated after relocation in arm_reserve_mmu().
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
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Add STM32MP257F Evaluation board support. It embeds a STM32MP257FAI SoC,
with 4GB of DDR4, TSN switch (2+1 ports), 2*USB typeA, 1*USB2 typeC,
SNOR OctoSPI, mini PCIe, STPMIC2 for power distribution ...
Sync device tree with kernel v6.6-rc1.
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
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Add stm32mp2 compatible.
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
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When building with AARCH64 defconfig, we got warnings, fix them
by using registers base address defined as void __iomem * instead of
fdt_addr_t.
Signed-off-by: Patrice Chotard <[email protected]>
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
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When building with AARCH64 defconfig, we got warnings, fix them.
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
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Limit DDR usage under 4GB boundary on STM32MP regardless of
memory size declared in device tree.
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
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When building with AARCH64 defconfig, we got warnings for debug
message
- format '%x' expects argument of type 'unsigned int',
but argument 3 has type 'size_t' {aka 'long unsigned int'}).
- format '%lx' expects argument of type 'long unsigned int',
but argument 2 has type 'phys_addr_t' {aka 'long long unsigned
int'}
Signed-off-by: Patrick Delaunay <[email protected]>
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
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In case there is no RAM driver retrieve RAM size from DT as fallback.
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
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This fixes the following compilation error in ARM64:
arch/arm/mach-stm32mp/dram_init.c: In function ‘board_get_usable_ram_top’:
arch/arm/mach-stm32mp/dram_init.c:59:45: error: ‘DCACHE_DEFAULT_OPTION’ undeclared (first use in this function)
59 | mmu_set_region_dcache_behaviour(reg, size, DCACHE_DEFAULT_OPTION);
| ^~~~~~~~~~~~~~~~~~~~~
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
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The clk-pll.h is going to be included in multiple files soon. Add
missing header guard to prevent possible build errors in future.
Signed-off-by: Sam Protsenko <[email protected]>
Fixes: 166097e87753 ("clk: exynos: add clock driver for Exynos7420 Soc")
Reviewed-by: Sean Anderson <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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clk_get_by_index() returns negative number on error. Assigning it to
unsigned int makes the subsequent "ret < 0" check always false, leading
in turn to possible unhandled errors. Change 'ret' variable type to
signed int so the code checks and handles clk_get_by_index() return code
properly.
Signed-off-by: Sam Protsenko <[email protected]>
Fixes: cf75cdf96ef2 ("serial: s5p: use clock api to get clock rate")
Signed-off-by: Minkyu Kang <[email protected]>
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The sysreset uclass unconditionally provides a definition of the
reset_cpu() function. So does the exynos soc code. Fix the build with
SYSRESET enabled by omitting the function from the soc code in that
case. The code still needs to be kept around for use in SPL.
This commit was inspired by commit 6e19dc84c14b ("sunxi: Avoid duplicate
reset_cpu with SYSRESET enabled").
Signed-off-by: Sam Protsenko <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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s5p watchdog driver calls samsung_get_base_watchdog() function, but its
prototype is not included. That might lead to build warnings like this:
drivers/watchdog/s5p_wdt.c: In function 'wdt_stop':
drivers/watchdog/s5p_wdt.c:16:26:
warning: implicit declaration of function
'samsung_get_base_watchdog' [-Wimplicit-function-declaration]
16 | (struct s5p_watchdog *)samsung_get_base_watchdog();
| ^~~~~~~~~~~~~~~~~~~~~~~~~
Include asm/arch/cpu.h to fix that issue.
Signed-off-by: Sam Protsenko <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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arch/arm/include/asm/arch/gpio.h relies on definitions from cpu.h.
Include it explicitly in gpio.h. Otherwise next build error may occur:
In file included from ./arch/arm/include/asm/gpio.h:7,
from include/cros_ec.h:14,
from board/samsung/common/board.c:8:
./arch/arm/include/asm/arch/gpio.h:1357:4:
error: 'EXYNOS4_GPIO_PART1_BASE' undeclared here
(not in a function); did you mean 'EXYNOS4_GPIO_MAX_PORT'?
1357 | { EXYNOS4_GPIO_PART1_BASE, EXYNOS4_GPIO_MAX_PORT_PART_1 },
| ^~~~~~~~~~~~~~~~~~~~~~~
Signed-off-by: Sam Protsenko <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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samsung_get_base_swreset() is called in soc.c, but corresponding header
with its prototype is not included. Fix this to avoid possible build
errors.
Signed-off-by: Sam Protsenko <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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Currently the renesas_sdhi_reset_tuning() unconditionally leaves SDHI
clock enabled after the tuning reset. This is not always necessary.
After the driver performed tuning reset at the end of probe function,
or in the unlikely case that tuning failed during regular operation,
the SDHI clock can be disabled after the tuning reset. The following
set_ios call would reconfigure the clock as needed.
In case of regular set_ios call which requires a tuning reset, keep
the clock enabled or disabled according to the mmc->clk_disable state.
With this in place, the controllers which have not been accessed via
block subsystem after boot are left in quiescent state. However, if an
MMC device is used e.g. for environment storage, that controller would
be accessed during the environment load and left active, including its
clock which would still be generated. This is due to the design of the
MMC subsystem, which does not deinit a controller after it was started
once, the controller is only deinited in case of mmc rescan, or before
OS boot.
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
Reviewed-by: Paul Barker <[email protected]>
Tested-by: Paul Barker <[email protected]>
Reviewed-by: Yoshihiro Shimoda <[email protected]>
Tested-by: Thuan Nguyen Hong <[email protected]>
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To quote Andre:
The first few patches are some easy refactorings and fixes, most of them
actually don't change the generated binaries at all. Then there is a
defconfig for a new board, for which we just gained the .dts file from
the last kernel DT sync.
On top there is support for a new PMIC (AXP313), and LPDDR4 support for
the Allwinner H616 SoC, both of which are needed to support new devices
that appeared lately, especially cheap TV boxes.
While those are technically new features, they don't affect existing
boards, for instance the LPDDR4 support code is guarded by a new DRAM
type Kconfig variable. So the risk for regressions is very slim.
Gitlab CI passed, and I booted that briefly on some boards, including an
H616 and an H618 one (with LPDDR4).
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The H616 SoC family has support for several types of DRAM: DDR3,
LPDDR3, DDR4 and LPDDR4.
At the moment, the driver only supports DDR3 and LPDDR3 memory.
Let's extend the driver to support the LPDDR4 memory. This type
of memory widely used in device with T507(-H) SoC and new orangepi
zero3 with H618.
The compatibility with T507 is not yet complete, because there
is difference in the phy_init array.
The LPDDR4-2133 timings correspond to DRAM Rayson RS1G32LO4D2BDS-53BT
found on the NOR SPI from the Orangepi Zero 3 4GB.
Signed-off-by: Mikhail Kalashnikov <[email protected]>
Tested-by: Piotr Oniszczuk <[email protected]>
Reviewed-by: Jernej Skrabec <[email protected]>
Acked-by: Andre Przywara <[email protected]>
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