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Use the following regex to make this test compatible with
both 32bit and 64bit systems. The trick is to use %0*lx
format string for the address prefix in the test.
"
s@\(ut_assert_nextline("\)0\+\([^:]\+\)\(:.*"\)\();\)@\1%0*lx\3, IS_ENABLED(CONFIG_PHYS_64BIT) ? 16 : 8, 0x\2UL\4
"
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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The current fdtdec_get_addr() takes into consideration #address-cells
and #size-cells for "ping-expect" property which is clearly neither.
Use fdtdec_get_int() instead and return negative one in case the
property is not in DT or the platform under test is not DT based,
i.e. mimic the current fdtdec_get_addr() behavior.
This fixes ut dm dm_test_bus_children test.
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Align the sandbox64 defconfig with sandbox defconfig. Enable missing
legacy image format support. This fixes ut_bootstd_bootflow_cmd_menu
test.
Suggested-by: Jonas Karlman <[email protected]>
Signed-off-by: Marek Vasut <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-coldfire into next
- Relocation support
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into next
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into next
- rmobile cleanup
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Clean the function up a bit further. Return immediately on match
and return ARRAY_SIZE() - 1 on failure. Add proper comment in that
case.
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Paul Barker <[email protected]>
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- Merge two patches to fix the issues with risc-v building on next after
the merge of v2023.10-rc4 to next.
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With having both an EVENT_SPY_SIMPLE setup for both riscv_cpu_probe and
riscv_cpu_setup we do not need the latter function to call the former
function as it will already have been done in time.
Fixes: 1c55d62fb9cc ("riscv: cpu: make riscv_cpu_probe to EVT_DM_POST_INIT_R callback")
Tested-by: Milan P. Stanić <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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This function should now be a EVENT_SPY_SIMPLE call, update it.
Tested-by: Milan P. Stanić <[email protected]>
Reviewed-by: Heinrich Schuchardt <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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Implement relocation for M68K. Perform all the updates in start.S
relocate_code in assemby, since it is a simple matter of traversing
the dynsym table and adding relocation offset - MONITOR_BASE to all
the items in that table. The necessity to deal with MONITOR_BASE is
a specific of M68K, where the ELF entry point is at offset 0x400,
which is the MONITOR_BASE, while TEXT_BASE is at offset 0 .
This also removes the one last user of NEEDS_MANUAL_RELOC, so that
could be finally cleaned up .
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Marek Vasut <[email protected]>
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Add M68K ELF32 support into this tool, so it can patch static rela
into M68K u-boot-nodtb.bin . This is the first step toward M68K
relocation support, and in turn, removal of NEEDS_MANUAL_RELOC
from the codebase altogether.
Tested-by: Michal Simek <[email protected]> # microblaze, arm64
Signed-off-by: Marek Vasut <[email protected]>
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The symtab contains data in target endianness, convert the data to
native endianness before doing any operations and on them, and back
to target endianness before updating the bin file.
Signed-off-by: Marek Vasut <[email protected]>
Tested-by: Michal Simek <[email protected]> # microblaze, arm64
Reviewed-by: Angelo Dureghello <[email protected]>
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- DWC3 fix on Layerscape
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https://gitlab.denx.de/u-boot/custodians/u-boot-imx
Fixes for release
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- imx9: fix DRAM calculation
- thermal: fixes
- fixed for DM, DH and Gateworks boards
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/17639
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+ Implement OpenSBI DBCN extension for early debug console
+ Fixes for VisionFive2 board
+ Fix timer missing
+ Fix L2 LIM issue
+ Enable PCIE auto enumeration to support USB and NVMe by default
+ Set eth0 mac address properly
+ Add __noreturn attribute to spl_invoke_opensbi
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Use the DBCN SBI extension to implement a debug console.
Make it the default for S-mode RISC-V.
Signed-off-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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The DBCN extension provides a Console Write Byte call.
Implement function sbi_dbcn_write_byte to invoke it.
Signed-off-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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spl_invoke_opensbi function is not returned to SPL. Thus, we need to
set __noreturn function attribute.
Signed-off-by: Chanho Park <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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SPL_SYS_MALLOC_CLEAR_ON_INIT would enable SYS_MALLOC_CLEAR_ON_INIT by
default, but that's not need on JH7110, so disable that.
Signed-off-by: Shengyu Qu <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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Starfive JH7110 needs to clear L2 LIM to zero before use or ECC error
would be triggered. Currently, we use DDR ram for SPL malloc arena on
Visionfive 2 board in defconfig, but it's also possible to use L2 LIM as
SPL malloc arena. To avoid triggering ECC error in this scenario, we
imply SPL_SYS_MALLOC_CLEAR_ON_INIT as default.
Signed-off-by: Bo Gan <[email protected]>
Signed-off-by: Shengyu Qu <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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To support SPL_SYS_MALLOC_CLEAR_ON_INIT, we have to modify
#ifdef CONFIG_SYS_MALLOC_CLEAR_ON_INIT
to #if CONFIG_IS_ENABLED(SYS_MALLOC_CLEAR_ON_INIT)
Signed-off-by: Bo Gan <[email protected]>
Signed-off-by: Shengyu Qu <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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Add SPL version of SYS_MALLOC_CLEAR_ON_INIT, this would help devices
that need to clear ram before use to work correctly.
Signed-off-by: Bo Gan <[email protected]>
Signed-off-by: Shengyu Qu <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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Since PLDA PCIE driver is added and VL805 support is enabled in
defconfig for Starfive Visionfive 2, modify the document to keep
consistent.
Signed-off-by: Shengyu Qu <[email protected]>
Tested-by: Milan P. Stanić <[email protected]>
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Visionfive 2
Although PCIE driver already exists, board defconfig isn't configured to
enable PCIE enum on boot, thus USB storage device and NVME drive are not
supported by default. So modify defconfig to enable PCIE auto enum, then
start USB subsystem and scan nvme drive on boot.
Signed-off-by: Shengyu Qu <[email protected]>
Tested-by: Milan P. Stanić <[email protected]>
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The JH7110 has the arhitectural CPU timer on all 5 rv64 cores.
Note that in the device tree.
Signed-off-by: Torsten Duwe <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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For the architectural timer on riscv, there already is a defined
device tree binding[1]. Allow timer instances to be created from
device tree matches, but for now retain the old mechanism, which
registers the timer biggy-back with the CPU.
[1] linux/Documentation/devicetree/bindings/timer/riscv,timer.yaml
Signed-off-by: Torsten Duwe <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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fdt_fixup_ethernet() sets eth0 mac address from ethaddr. Set
ethaddr to environment instead of eth0addr.
Signed-off-by: Seung-Woo Kim <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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This platform is behind on migrations (it is the sole user of the oldest
legacy version of the USB gadget stack and is long overdue for
migration) and with Pali no longer being a maintainer, we remove this
platform.
Signed-off-by: Tom Rini <[email protected]>
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Remove Pali from his listed maintainer entries due to his publicly
visible actions on the mailing list.
Signed-off-by: Tom Rini <[email protected]>
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Make usage of clock and reset bulk API in order to simplify the code
Reviewed-by: Marek Vasut <[email protected]>
Signed-off-by: Fabrice Gasnier <[email protected]>
Reviewed-by: Xavier Drudis Ferran <[email protected]>
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EHCI is usually used with companion controller (like OHCI) as companion
controller. This information on the companion is missing currently in
companion drivers.
So, if the usb-uclass isn't aware, it may scan busses in any order: OHCI
first, then EHCI.
This is seen on STM32MP1 where DT probing makes the probe order to occur
by increasing address (OHCI address < EHCI address).
When a low speed or full-speed device is plugged in, it's not detected as
EHCI should first detect it, and give ownership (handover) to OHCI.
Current situation on STM32MP1 (with a low speed device plugged-in)
STM32MP> usb start
starting USB...
Bus usb@5800c000: USB OHCI 1.0
Bus usb@5800d000: USB EHCI 1.00
scanning bus usb@5800c000 for devices... 1 USB Device(s) found
scanning bus usb@5800d000 for devices... 1 USB Device(s) found
scanning usb for storage devices... 0 Storage Device(s) found
The "companion" property in the device tree allow to retrieve companion
controller information, from the EHCI node. This allow marking the
companion driver as such.
With this patch (same low speed device plugged in):
STM32MP> usb start
starting USB...
Bus usb@5800c000: USB OHCI 1.0
Bus usb@5800d000: USB EHCI 1.00
scanning bus usb@5800d000 for devices... 1 USB Device(s) found
scanning bus usb@5800c000 for devices... 2 USB Device(s) found
scanning usb for storage devices... 0 Storage Device(s) found
STM32MP> usb tree
USB device tree:
1 Hub (12 Mb/s, 0mA)
| U-Boot Root Hub
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+-2 Human Interface (1.5 Mb/s, 100mA)
HP HP USB 1000dpi Laser Mouse
1 Hub (480 Mb/s, 0mA)
u-boot EHCI Host Controller
This also optimize bus scan when a High speed device is plugged in, as
the usb-uclass skips OHCI in this case:
STM32MP> usb reset
resetting USB...
Bus usb@5800c000: USB OHCI 1.0
Bus usb@5800d000: USB EHCI 1.00
scanning bus usb@5800d000 for devices... 2 USB Device(s) found
scanning usb for storage devices... 1 Storage Device(s) found
STM32MP> usb tree
USB device tree:
1 Hub (480 Mb/s, 0mA)
| u-boot EHCI Host Controller
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+-2 Mass Storage (480 Mb/s, 200mA)
SanDisk Cruzer Blade 03003432021922011407
Signed-off-by: Fabrice Gasnier <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
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Polling every second to check whether the CPU has cooled down is
too frequent.
Allow more time for the CPU to cool down by increasing the polling
interval to 5 seconds by defaut.
This value is used in the absence of the 'polling-delay' devicetree
property.
Signed-off-by: Fabio Estevam <[email protected]>
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The temperature unit is millidegree Celsius, so divide by 1000 to correctly
print the temperature values in Celsius.
While at it, also change a typo: "has beyond" to "is beyond".
Signed-off-by: Fabio Estevam <[email protected]>
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dev_info() message is not printed by default. Increase the log level
to dev_crit(). This allows the critical messages related to the temperature
getting beyong the alert threshold to be displayed.
Signed-off-by: Fabio Estevam <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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When the 'polling-delay' property is not passed via devicetree,
pdata->polling_delay keeps at 0. This causes the imx_tmu driver to get
stuck inside the busy while() loop when the CPU temperature is above
the alert point.
Fix this problem by passing a one second polling interval, which provides
a proper delay to let the system to cool down and exit the while() loop
when the temperature is below the alert point.
Signed-off-by: Fabio Estevam <[email protected]>
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Select the i.MX8MM thermal driver as it is useful for displaying
the CPU temperature and its grading:
CPU: Commercial temperature grade (0C to 95C) at 38C
It also prevents booting when the temperature is above the alert
point.
Signed-off-by: Fabio Estevam <[email protected]>
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After the merge of v2023.10-rc4 to next include/event.h needs to be
fully documented in order for documentation builds to complete. Rewords
two of the event_t descriptions to be docbook style and better match the
rest of this enum. Fix two typos (flag->flags) in other comments.
Signed-off-by: Tom Rini <[email protected]>
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Prepare v2023.10-rc4
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Signed-off-by: Tom Rini <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-raspberrypi
Updates for RPi for 2023.10:
- rpi: Disable DISTRO_DEFAULTS
- arm: rpi: Switch to standard boot
- arm: rpi: Switch to a text environment
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The original logic always enables USB_DR_MODE_HOST operation mode in
dwc3_layerscape_bind() in u-boot. Prevent choosing USB_DR_MODE_HOST
operation mode if USB_HOST is not enabled.
Fixes: 2b0b51d0bed ("usb: dwc3: add layerscape support")
Signed-off-by: Oleksandr Suvorov <[email protected]>
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In the usb/dwc3-layerscape driver the first option should be renamed
to the latter as well. Do it.
Fix original logic in dwc3_layerscape_bind() - do not enable
Fixes: 333e4a621df ("Rename SPL_USB_HOST_SUPPORT to SPL_USB_HOST")
Signed-off-by: Oleksandr Suvorov <[email protected]>
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Use default SAVED_DRAM_TIMING_BASE as that is what upstream TFA expects.
Without this change, the board will fail to suspend/resume e.g. in Linux.
Signed-off-by: Marek Vasut <[email protected]>
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Use default SAVED_DRAM_TIMING_BASE as that is what upstream TFA expects.
Without this change, the board will fail to suspend/resume e.g. in Linux.
Signed-off-by: Marek Vasut <[email protected]>
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Use default SAVED_DRAM_TIMING_BASE as that is what upstream TFA expects.
Without this change, the board will fail to suspend/resume e.g. in Linux.
Signed-off-by: Marek Vasut <[email protected]>
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Add missing imx8mm-venice-gw7904 to CONFIG_OF_LIST
Fixes commit 61e7f9732565 ("board: gateworks: venice: add imx8mm-gw7904 support")
Signed-off-by: Tim Harvey <[email protected]>
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If dram_init_banksize() is called from SPL, the rom_pointer, at that
point, is not correctly initialized. This causes wrong calculation of
DRAM start and size in dram_init_banksize(). The issue became apparent
only in Falcon Mode. Added an extra condition to prevent using
rom_pointer in SPL.
Signed-off-by: Elena Popa <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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U-Boot splits DRAM bank spanning addresses below and above the 32bit
boundary into two DRAM banks. Since this platform may come with 4GiB
of DRAM, increase the DRAM bank count to 2.
Signed-off-by: Marek Vasut <[email protected]>
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This board certainly does use default 'run distro_bootcmd' boot command,
make sure this is set in 'bootcmd' variable.
Fixes: 970bf8603b8 ("Convert CONFIG_USE_BOOTCOMMAND et al to Kconfig")
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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