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The leap year check in rtc_set() passes the loop variable 'i' (month
index, always 1 when the condition is true) to isleap() instead of the
actual year. Since isleap(1) is always false, February 29th is never
accounted for when computing the day count, resulting in the RTC being
set one day behind for any date after February in a leap year.
Pass tmp->tm_year to isleap() so the leap day is correctly included.
Fixes: 8e585f02f82 ("Added M5329AFEE and M5329BFEE Platforms")
Signed-off-by: Naveen Kumar Chaudhary <[email protected]>
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Add a SDRAM controller driver for the AST2700, derived from the
existing AST2700 controller code used by the Ibex SPL but adapted
to run from ARM U-Boot proper on the Cortex-A35 cores.
The DDR4/DDR5 controller and its DesignWare PHY are programmed by
the Ibex SPL before ARM U-Boot proper takes over. This driver
reads back the configuration left by the SPL, probes the
controller, and exposes ram_info (base and size, with the VGA
carve-out subtracted) via UCLASS_RAM so that dram_init() can
populate gd->ram_size.
The PHY firmware-load entry points (dwc_ddrphy_phyinit_userCustom_*)
are kept compiled but call a __weak fmc_hdr_get_prebuilt() stub
when ARM U-Boot proper is the caller; the real implementation is
provided by the Ibex SPL via the same fmc_hdr.h descriptor format
(here added for the ARM build).
Adds the supporting register-layout headers under
arch/arm/include/asm/arch-aspeed/:
- sdram.h: SDRAM controller and DWC PHY register definitions
- scu.h: SCU bits referenced by the SDRAM driver
- fmc_hdr.h: prebuilt-blob descriptor (binary-compatible with
arch/riscv/include/asm/arch-ast2700/fmc_hdr.h used
by the Ibex SPL)
Signed-off-by: Ryan Chen <[email protected]>
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Add reset controller driver for the dual-die AST2700 SoC. The
controller manages module-level reset signals via the modrst
register block at offset 0x200 within each SCU.
Signed-off-by: Ryan Chen <[email protected]>
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Add clock controller driver for the dual-die AST2700 SoC. The chip
has two SCUs (SoC0/CPU at 0x12c02000, SoC1/IO at 0x14c02000), each
with its own PLLs (HPLL/APLL/DPLL/MPLL), clock dividers and clock
gate controls. This commit registers two UCLASS_CLK drivers
matching "aspeed,ast2700-scu0" and "aspeed,ast2700-scu1".
Signed-off-by: Ryan Chen <[email protected]>
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Add initial device tree support for the ASPEED AST27xx family, the
8th-generation Baseboard Management Controller (BMC) SoCs.
AST27xx SOC Family
- https://www.aspeedtech.com/server_ast2700/
- https://www.aspeedtech.com/server_ast2720/
- https://www.aspeedtech.com/server_ast2750/
The AST27xx features a dual-SoC architecture consisting of two ties,
referred to as SoC0 and SoC1 - interconnected through an internal
property bus. Both SoCs share the same address decoding scheme,
while each maintains independent clock and reset domains.
- SoC0 (CPU die): contains a dual-core Cortex-A35 cluster and two
Cortex-M4 cores, along with high-speed peripherals.
- SoC1 (I/O die): includes the BootMCU (responsible for system
boot) and its own clock/reset domains low-speed peripherals.
The device tree describes the SoC0 and SoC1 domains and their peripheral
layouts.
Signed-off-by: Ryan Chen <[email protected]>
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Add initial support for the ASPEED AST2700, an arm64 (Cortex-A35)
Baseboard Management Controller (BMC) SoC. AST2700 is Aspeed's 8th
generation BMC and uses a dual-die architecture: SoC0 (the "CPU"
die) hosts the four Cortex-A35 cores and its own SCU at 0x12c02000,
while SoC1 (the "IO" die) hosts the peripherals and its own SCU at
0x14c02000.
This commit adds:
- ASPEED_AST2700 Kconfig option and the ast2700 mach subdir
(mach Makefile, ast2700/Kconfig, board/aspeed/evb_ast2700/*)
- arm64 MMU map covering the SoC device window and the DRAM
region at 0x4_0000_0000 (up to 8 GiB)
- lowlevel_init.S for early CPU bring-up
- cpu-info: print SoC ID (AST2700/2720/2750 A0/A1/A2 variants)
and reset cause (cold reset, EXT reset, WDT reset)
- board_common: dram_init via UCLASS_RAM, AHBC timeout init
- platform: env_get_location() that selects SPI/eMMC based on
the IO-die HW strap; arch_misc_init() that exposes
${boot_device} and ${verify} to the boot script
- SCU0/SCU1 register layout header (scu_ast2700.h)
- configs/evb-ast2700_defconfig and include/configs/evb_ast2700.h
for the AST2700 EVB board
The defconfig depends on ast2700-evb.dts, which is introduced in
a subsequent patch; this commit must be applied with the
remaining series for evb-ast2700_defconfig to build.
Signed-off-by: Ryan Chen <[email protected]>
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AST2700 is a 64-bit SoC whose flash AHB windows are decoded above
the 32-bit address space, so rework AHB addresses to uintptr_t and
decoded window sizes to size_t.
Signed-off-by: Ryan Chen <[email protected]>
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https://gitlab.denx.de/u-boot/custodians/u-boot-imx into next
CI:https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/30547
- Move environment variables to .env file on imx7ul-evk/imx6ull-evk/mx6-sabre
- imx ipuv3 improvements.
- Initial support for aquila imx95
- Add support for OPTEE on i.MX93
- Allow users to inhibit i.MX trip point setup
- Add support for imx93_frdm 2CS 2GB DRAM support
- Add optee binary to i.MX9 platform types
- Enable booting Image.gz on imx8m-evk/imx9-evk
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https://gitlab.denx.de/u-boot/custodians/u-boot-imx
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/30543
- Fix MAC address representation on i.MX9
- Fix iMX8MQ PLL
- Fix SPL trampoline buffer for 1GB DDR on i.MX9
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The fractional PLL used on iMX8MQ is not pll14xx, it is different
PLL and not exist in u-boot. Add this fractional PLL driver and
update iMX8MQ clock driver to adapt this fraction PLL.
Fixes: 11c8ab01f3ed ("clk: imx8mq: Add a clock driver for the imx8mq")
Signed-off-by: Ye Li <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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Add v2x_status and ele_info commands to print useful information
for development and debug purpose.
Signed-off-by: Ye Li <[email protected]>
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Add V2X Get State API to return V2X states for debug purpose
Signed-off-by: Ye Li <[email protected]>
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The device tree is not stored under freescale directory when booting
Linux, so drop vendor name.
Signed-off-by: Peng Fan <[email protected]>
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Add support for booting compressed kernel Image.gz by defining
kernel_comp_addr_r and kernel_comp_size in the default environment.
Signed-off-by: Peng Fan <[email protected]>
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Add support for booting compressed kernel Image.gz by defining
kernel_comp_addr_r and kernel_comp_size in the default environment.
While at here, set ip_dyn to yes to allow dhcp work properly.
Signed-off-by: Peng Fan <[email protected]>
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Add support for booting compressed kernel Image.gz by defining
kernel_comp_addr_r and kernel_comp_size in the default environment.
Set kernel_comp_addr_r to a high memory region to provide a dedicated
decompression buffer, avoiding overlap between compressed
input and decompressed output.
Also adjust CONFIG_SYS_LOAD_ADDR from 0x40480000 to 0x40400000.
With TEXT_OFFSET=0, the kernel is relocated directly to loadaddr, so
separating decompression and execution regions is required to guarantee
safe decompression without additional copying.
Signed-off-by: Peng Fan <[email protected]>
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Add support for booting compressed kernel Image.gz by defining
kernel_comp_addr_r and kernel_comp_size in the default environment.
Set kernel_comp_addr_r to a high memory region to provide a dedicated
decompression buffer, avoiding overlap between compressed
input and decompressed output.
Also adjust CONFIG_SYS_LOAD_ADDR from 0x40480000 to 0x40400000.
With TEXT_OFFSET=0, the kernel is relocated directly to loadaddr, so
separating decompression and execution regions is required to guarantee
safe decompression without additional copying.
Signed-off-by: Peng Fan <[email protected]>
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Add support for booting compressed kernel Image.gz by defining
kernel_comp_addr_r and kernel_comp_size in the default environment.
Set kernel_comp_addr_r to a high memory region (0x80000000) to provide
a dedicated decompression buffer, avoiding overlap between compressed
input and decompressed output.
Also adjust CONFIG_SYS_LOAD_ADDR from 0x40480000 to 0x40600000.
With TEXT_OFFSET=0, the kernel is relocated directly to loadaddr, so
separating decompression and execution regions is required to guarantee
safe decompression without additional copying.
Signed-off-by: Peng Fan <[email protected]>
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We want the watchdog to be enabled at boot by default so it can
handle emergency situations in any case.
Signed-off-by: Frieder Schrempf <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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Now that non-linear clk divider tables are supported, replace the fixed
factor implementation with the proper divider, which allows more fine
control over clock rates.
Signed-off-by: Brian Ruley <[email protected]>
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The existing clk_register_divider() only supports linear or
power-of-two divider mappings. Some hardware (e.g. i.MX6 PLL5
post_div and video_div) uses non-linear register-value-to-divisor
mappings that require a lookup table.
Add clk_register_divider_table() which accepts a clk_div_table,
and reimplement clk_register_divider() as a wrapper passing
table=NULL.
Signed-off-by: Brian Ruley <[email protected]>
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Obviously, the clock has to be enabled if writing to it's registers.
This was missed because the board I tested on had enabled the clocks in
early init.
Also, remove the completely useless "ipu_clk_enabled" struct member and
use the accurate usecount / enabled_count instead.
Signed-off-by: Brian Ruley <[email protected]>
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A hardware bug prevents LDB clock selectors from being configured later
on non-plus i.MX6QD variants, so let's set the desired configuration in
the probe before we register them. We also have to make the necessary
clock functions available in XPL builds.
Signed-off-by: Brian Ruley <[email protected]>
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The LDB clock sources don't have to be the same, so allow DI1 clock to
be configured separately.
Unlikely to be significant, but the reason will become apparent in the
following commit.
Signed-off-by: Brian Ruley <[email protected]>
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After reset, all PLLs are bypassed by default so unbypass them so that
dependent clocks can function correctly.
Signed-off-by: Brian Ruley <[email protected]>
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Do not touch the video clocks unless explicitly required by the
configuration. This avoids the issue of the binary size increase on SPL
builds that do not enable video. For those that do, they should increase
the size limit to fit the new code and data.
Signed-off-by: Brian Ruley <[email protected]>
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Make it easier to reason about by keeping similar clocks grouped
together. While at it, fix comment spacing.
Signed-off-by: Brian Ruley <[email protected]>
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Add 2CS 2GB DRAM configuration, as revision B2 of the i.MX93 FRDM board
is using it.
This is mostly an import of Tom Zheng work from NXP u-boot git:
https://github.com/nxp-imx/uboot-imx/commit/4c35a6086aed
Acked-by: Peng Fan <[email protected]>
Signed-off-by: Mathieu Dubois-Briand <[email protected]>
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During development or various dangerous experiments, it may
be necessary to override the trip points. Allow users to do
that. However, do keep in mind that this may damage the SoC.
Signed-off-by: Marek Vasut <[email protected]>
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Add initial U-Boot support for Aquila iMX95 SoM.
Link: https://www.toradex.com/computer-on-modules/aquila-arm-family/nxp-imx95
Link: https://www.toradex.com/products/carrier-board/aquila-development-board-kit
Signed-off-by: Franz Schnyder <[email protected]>
Reviewed-by: Francesco Dolcini <[email protected]>
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OPTEE-OS starts correctly when "opteed" is enabled for Secure Payload
Dispatcher in TF-A (tested on OP-TEE version: 4.9.0), however imx93
devices require a patch for OPTEE targets because binman does not see
the tee.bin file when it is available.
Enable conditional OPTEE support for imx93 devices.
Signed-off-by: Krzysztof Drobiński <[email protected]>
Signed-off-by: Mathieu Dubois-Briand <[email protected]>
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OP-TEE tee.bin is generated externally and might be missing during the
build.
Signed-off-by: Mathieu Dubois-Briand <[email protected]>
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Move the shared environment from CFG_EXTRA_ENV_SETTINGS in
mx6sabre_common.h to a common text environment fragment in
include/env/nxp/mx6sabre_common.env. The mx6sabresd and mx6sabreauto
board environments include this fragment and add their own console
setting, which is the only board specific difference between them. The
eMMC firmware update variables remain guarded by CONFIG_SUPPORT_EMMC_BOOT
inside the fragment. The now unused CONSOLE_DEV defines and the
linux/stringify.h include are dropped.
The generated default environment is unchanged for both boards. This was
verified by comparing the output of scripts/get_default_envs.sh before
and after the change, which produced identical results.
Signed-off-by: Aristo Chen <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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Move the board environment from CFG_EXTRA_ENV_SETTINGS in the config
header to board/nxp/mx6ullevk/mx6ullevk.env for better maintainability.
The file is named after CONFIG_SYS_BOARD so it is selected automatically
without setting CONFIG_ENV_SOURCE_FILE. Drop the now unused
linux/stringify.h include.
The generated default environment is unchanged. This was verified by
comparing the output of scripts/get_default_envs.sh before and after the
change, which produced identical results.
Signed-off-by: Aristo Chen <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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Move the board environment from CFG_EXTRA_ENV_SETTINGS in the config
header to board/nxp/mx7ulp_evk/mx7ulp_evk.env for better
maintainability. The file is named after CONFIG_SYS_BOARD so it is
selected automatically without setting CONFIG_ENV_SOURCE_FILE.
The generated default environment is unchanged. This was verified by
comparing the output of scripts/get_default_envs.sh before and after the
change, which produced identical results.
Signed-off-by: Aristo Chen <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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Enable the live DT to reduce the DT parsing time.
Test data on i.MX95-EVK:
Before:
Accumulated time:
26,205 dm_spl
483,991 dm_f
22,977 dm_r
After:
Accumulated time:
26,229 dm_spl
484,772 dm_f
2,667 of_live
1,003 dm_r
Signed-off-by: Peng Fan <[email protected]>
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Enable the live DT to reduce the DT parsing time.
Test data on i.MX8MP shows that boot time is decreased by ~%6
Signed-off-by: Peng Fan <[email protected]>
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Use livetree API, otherwise it will fail to read properties from the device
tree when OF_LIVE is enabled.
Signed-off-by: Peng Fan <[email protected]>
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Use dev_read_addr which supports livetree API, otherwise driver
will fail to get addr when OF_LIVE is enabled.
Signed-off-by: Peng Fan <[email protected]>
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Use dev_read_addr_index which supports livetree API, otherwise driver
will fail to get addr when OF_LIVE is enabled.
Signed-off-by: Peng Fan <[email protected]>
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Use livetree API, otherwise driver will fail to read properties
from the device tree when OF_LIVE is enabled.
Signed-off-by: Peng Fan <[email protected]>
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Update to latest ddr firmware name, otherwise user may use legacy ddr
firmware from linux-firmware-imx release.
Signed-off-by: Peng Fan <[email protected]>
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When CONFIG_CPU is enabled, print_cpuinfo is defined in common/board_f.c
with static property. However in imx cpu.c, print_cpuinfo is not a local
function, so guard it with !CONFIG_IS_ENABLED(CPU).
And all i.MX8M boards has CONFIG_CPU and CONFIG_CPU_IMX set, so remove the
dead code.
However legacy print_cpuinfo also print reset reason, to keep reset
reason printed as before, export get_reset_reason() and invoke it
at arch_misc_init().
Signed-off-by: Peng Fan <[email protected]>
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There is only one SoC and no external user of get_imx_type for i.MX7ULP,
so directly embed the string in print_cpuinfo and drop get_imx_type().
Signed-off-by: Peng Fan <[email protected]>
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There is only one SoC and no external user of get_imx_type for i.MX8ULP,
so directly embed the string in print_cpuinfo and drop get_imx_type().
Signed-off-by: Peng Fan <[email protected]>
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Same to 85319b2e672 ("board: toradex: smarc-imx95: remove gpio1 reg"),
there is no need to use dual base for i.MX952 gpio, so drop the U-Boot
specific reg changes.
Signed-off-by: Peng Fan <[email protected]>
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CONFIG_IMX_TMU depends on CONFIG_DM_THERMAL, so when selecting IMX_TMU,
DM_THERMAL should also be selected.
Update i.MX8M based defconfigs.
Signed-off-by: Peng Fan <[email protected]>
Acked-by: Francesco Dolcini <[email protected]>
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Replace mac[5] += offset with a proper 48-bit MAC address add to avoid
overflow issues when mac[5] was close to 255.
Example:
i.MX95 MAC2: 00:11:22:33:44:FE + 6
Old: 00:11:22:33:44:04 (overflow, wraps to 0)
New: 00:11:22:33:45:04 (correct carry from mac[5] to mac[4])
Signed-off-by: Alice Guo <[email protected]>
Signed-off-by: Ye Li <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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The shutdown checking should use shutdown flags, not bootflags.
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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After supporting get DRAM size from SM, the trampoline buffer address
still depends on PHYS_SDRAM_SIZE. If the real DDR size is less than
PHYS_SDRAM_SIZE, the trampoline buffer address is invalid and SPL will
crash. So use board_phys_sdram_size to get real DDR size to calculate
correct address.
Fixes: e1cc7117b630 ("imx9: scmi: Get DDR size through SM SCMI API")
Signed-off-by: Ye Li <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
Tested-by: Emanuele Ghidoli <[email protected]>
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