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Improve documentation.
Signed-off-by: Christian Hewitt <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
[narmstrong: fixed doc build]
Signed-off-by: Neil Armstrong <[email protected]>
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Improve documentation.
Signed-off-by: Christian Hewitt <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
[narmstrong: fixed doc build]
Signed-off-by: Neil Armstrong <[email protected]>
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Improve documentation.
Signed-off-by: Christian Hewitt <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
[narmstrong: fixed doc build]
Signed-off-by: Neil Armstrong <[email protected]>
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Improve documentation.
Signed-off-by: Christian Hewitt <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
[narmstrong: fixed doc build]
Signed-off-by: Neil Armstrong <[email protected]>
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Improve documentation.
Signed-off-by: Christian Hewitt <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
[narmstrong: fixed doc build]
Signed-off-by: Neil Armstrong <[email protected]>
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Improve documentation.
Signed-off-by: Christian Hewitt <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Neil Armstrong <[email protected]>
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Improve documentation.
Signed-off-by: Christian Hewitt <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Neil Armstrong <[email protected]>
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Improve documentation. Notably we remove all the board names from the
feature matrix to reduce table width. SoC types have been added to the
titles in individual board documents so readers can still correlate a
board against the features. This makes it easier to add new boards to
to the document in the future.
Signed-off-by: Christian Hewitt <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Neil Armstrong <[email protected]>
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Add support for both the BananaPi BPI-CM4 module and the BananaPi
baseboard which is compatible with the RaspberryPi CM4IO baseboard.
The BananaPi BPI-CM4 module follows the CM4 specifications at [1],
but with a single HDMI port and a single DSI output.
The current CM4IO baseboard DT should work fine on the Raspberry CM4
baseboard and other derivatives baseboards, but proper DT should
be written for other baseboards.
[1] https://datasheets.raspberrypi.com/cm4io/cm4io-datasheet.pdf
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Neil Armstrong <[email protected]>
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Import initial support for BPI-CM4 module with BPI-CM4IO baseboard
from the Linux submission applied at [1].
The BananaPi BPI-CM4 module follows the CM4 specifications at [2],
but with a single HDMI port and a single DSI output.
The current CM4IO baseboard DT should work fine on the Raspberry CM4
baseboard and other derivatives baseboards, but proper DT should
be written for other baseboards.
[1] https://git.kernel.org/amlogic/c/0262f2736978b1763363224698f47112a148dab0
[2] https://datasheets.raspberrypi.com/cm4io/cm4io-datasheet.pdf
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Neil Armstrong <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-sh
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https://source.denx.de/u-boot/custodians/u-boot-sh
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Enable Renesas RSwitch driver, matching SERDES PHY driver and Marvell
10G ethernet PHY driver in R8A779F0 S4 Spider board configuration to
make ethernet available via the RSwitch ports.
Signed-off-by: Marek Vasut <[email protected]>
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The current shell prompt '->' interferes with CI matching on 'bdinfo'
output. When CI test.py attempts to locate memory information in the
'bdinfo' output, it matches on '->' prefix which is identical to the
shell prefix. Switch the prompt to default '=>' one to avoid this
interference.
Suggested-by: Tom Rini <[email protected]> # found the CI oddity
Signed-off-by: Marek Vasut <[email protected]>
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This patch adds Ethernet Switch support that found on R-Car S4
(r8a779f0) SoC. This is extracted from multiple patches from
downstream BSP, with additional rework of the network device
registration.
Signed-off-by: Hai Pham <[email protected]>
Signed-off-by: Marek Vasut <[email protected]>
Signed-off-by: Phong Hoang <[email protected]>
Signed-off-by: Takeshi Kihara <[email protected]>
[Marek: Rework the driver to support all ports via subdrivers.
Split the driver up, add generic PHY framework support.
Generic code clean ups.]
Reviewed-by: Ramon Fried <[email protected]>
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Add Renesas Ethernet SERDES driver for R-Car S4-8 (r8a779f0).
The datasheet describes initialization procedure without any information
about registers' name/bits. So, this is all black magic to initialize
the hardware. Especially, all channels should be initialized at once.
This driver is imported and adjusted from Linux 6.3-rc1 commit:
50133cd3e8dd1 ("phy: renesas: r8a779f0-eth-serdes: Remove retry code in .init()")
Signed-off-by: Marek Vasut <[email protected]>
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Use IS_ENABLED() instead of CONFIG_IS_ENABLED() to check for CONFIG_
option which is identical across all of U-Boot and xPL builds.
Fixes: 2769ddc99fd ("mmc: tmio: Replace ifdeffery with IS_ENABLED/CONFIG_IS_ENABLED macros")
Signed-off-by: Marek Vasut <[email protected]>
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Disable fdt_fixup_mtdparts() and pass MTD partition on the command
line. Dynamically editing the fdt with a static partitions configuration
is not required and there is no advantages compared to using the command
line. This change should prevent boot failures as the one in [0].
Cc: Marek Vasut <[email protected]>
Cc: Miquel Raynal <[email protected]>
Link: https://lore.kernel.org/all/[email protected]/ [0]
Link: https://lore.kernel.org/all/20230105123334.7f90c289@xps-13/
Signed-off-by: Francesco Dolcini <[email protected]>
Link: https://lore.kernel.org/all/[email protected]/
Signed-off-by: Dario Binacchi <[email protected]>
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Disable fdt_fixup_mtdparts() and pass MTD partition on the command
line. Dynamically editing the fdt with a static partitions configuration
is not required and there is no advantages compared to using the command
line. This change should prevent boot failures as the one in [0].
Cc: Marek Vasut <[email protected]>
Cc: Miquel Raynal <[email protected]>
Link: https://lore.kernel.org/all/[email protected]/ [0]
Link: https://lore.kernel.org/all/20230105123334.7f90c289@xps-13/
Signed-off-by: Francesco Dolcini <[email protected]>
Link: https://lore.kernel.org/all/[email protected]/
Signed-off-by: Dario Binacchi <[email protected]>
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octeontx_bch_devices and octeontx_pci_nand_deferred_devices are only
referenced in the files where they are defined. Make them static.
Signed-off-by: Bin Meng <[email protected]>
Acked-by: Michael Trimarchi <[email protected]>
Link: https://lore.kernel.org/all/[email protected]/
Signed-off-by: Dario Binacchi <[email protected]>
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Add support for the iproc Broadcom NAND controller,
used in Northstar SoCs for example. Based on the Linux
driver.
Cc: Philippe Reynes <[email protected]>
Cc: Dario Binacchi <[email protected]>
Reviewed-by: Michael Trimarchi <[email protected]>
Signed-off-by: Linus Walleij <[email protected]>
Acked-by: William Zhang <[email protected]>
Link: https://lore.kernel.org/all/[email protected]/
Signed-off-by: Dario Binacchi <[email protected]>
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For BRCMNAND with 1-bit BCH ECC (BCH-1) such as used on the
D-Link DIR-885L and DIR-890L routers, we need to explicitly
select the ECC like this in the device tree:
nand-ecc-algo = "bch";
nand-ecc-strength = <1>;
nand-ecc-step-size = <512>;
This is handled by the Linux kernel but U-Boot core does
not respect this. Fix it up by parsing the algorithm and
preserve the behaviour using this property to select
software BCH as far as possible.
Signed-off-by: Linus Walleij <[email protected]>
Reviewed-by: Michael Trimarchi <[email protected]>
Acked-by: William Zhang <[email protected]>
Link: https://lore.kernel.org/all/[email protected]/
Signed-off-by: Dario Binacchi <[email protected]>
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As there are other types of NAND flashes like SPI NAND, let's be
more specific.
Signed-off-by: Frieder Schrempf <[email protected]>
Link: https://lore.kernel.org/all/[email protected]/
Signed-off-by: Dario Binacchi <[email protected]>
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In [1] Michael agreed on taking patches for SPI NAND through the RAW
NAND tree. Add a dedicated entry to the MAINTAINERS file which adds
Michael and Dario as maintainers and myself as reviewer.
[1] https://lists.denx.de/pipermail/u-boot/2023-February/508571.html
Signed-off-by: Frieder Schrempf <[email protected]>
Cc: Jagan Teki <[email protected]>
Cc: Dario Binacchi <[email protected]>
Cc: Michael Nazzareno Trimarchi <[email protected]>
Cc: Tom Rini <[email protected]>
Link: https://lore.kernel.org/all/[email protected]/
Signed-off-by: Dario Binacchi <[email protected]>
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Add m68k M5208EVBE machine configured to test U-Boot m68k support.
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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Add M5208EVBE board to CI. This does not use default config due to
limitations of QEMU emulation, instead the timer is switched from
DMA timer to PIT timer and RAMBAR accesses are inhibited.
Local QEMU launch command is as follows:
$ qemu-system-m68k -nographic -machine mcf5208evb -cpu m5208 -bios u-boot.bin
Signed-off-by: Marek Vasut <[email protected]>
Acked-by: Angelo Dureghello <[email protected]>
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The QEMU emulation of m68k does not support RAMBAR accesses,
add Kconfig option which inhibits those accesses, so that
U-Boot can be started in m68k QEMU for CI testing purpopses
until QEMU emulation improves.
Signed-off-by: Marek Vasut <[email protected]>
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The QEMU emulation of m68k does not support DMA timer, the only
timer that is supported is the PIT timer. Implement trivial PIT
timer support for m68k.
Signed-off-by: Marek Vasut <[email protected]>
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There is an existing CONFIG_MCFTMR Kconfig symbol,
use it and drop all other instances of CFG_MCFTMR.
This duality is likely a result of bogus conversion
to Kconfig.
Fixes: 7ff7b46e6ce ("m68k: rename CONFIG_MCFTMR to CFG_MCFTMR")
Signed-off-by: Marek Vasut <[email protected]>
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- mvebu: Boot support for 4K Native disks (Pali)
- a38x: Perform DDR training sequence again for 2nd boot (Tony)
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The biggest change is some refactoring of the H616 DRAM driver, which
allows better fine-tuning for each board, and is the base for pending
LPDDR3 and LPDDR4 support, needed by new boards. The sun8i-emac
Ethernet driver sees some refactoring that enables it for the Allwinner
D1 EMAC IP. The sunxi HDMI driver is now using more DT properties. Also
the early SPL code now supports some odd H616 SoC variant.
There are some more patches pending, that require the final review
touches and some testing, I will send a separate PR for them later.
The gitlab CI completed successfully, and I boot tested a few boards
with different SoCs, via FEL and SD card, into Linux.
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- DDR Training sequence happens very fast. The speedup in boot time is
negligible by skipping the training sequence during 2nd boot or after.
So remove the check and skip.
- This change improves the robustness of DDR training. If u-boot crashed
during DDR training, the training could be left in a limbo state, where
the BootROM has recorded that it is already in a 2nd boot. The training
must be repeated in this scenario to get out of this limbo state, but due
to the check it cannot be performed.
Signed-off-by: Tony Dinh <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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Add a new config option CONFIG_MVEBU_SPL_SATA_BLKSZ for specifying block
size of SATA disk. This information is used during building of SATA
kwbimage and must be correctly set, otherwise BootROM does not load SPL.
For 4K Native disks CONFIG_MVEBU_SPL_SATA_BLKSZ must be set to 4096.
Signed-off-by: Pali Rohár <[email protected]>
Tested-by: Martin Rowe <[email protected]>
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Currently kwboot expected that sector size for SATA image is always 512
bytes. If SATA image cannot be parsed with sector size of 512 bytes, try
larger sector sizes which are power of two and up to the 32 kB. Maximal
theoretical value is 32 kB because ATA IDENTIFY command returns sector size
as 16-bit number.
Signed-off-by: Pali Rohár <[email protected]>
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SATA kwbimage contains offsets in block size unit, not in bytes.
Until now kwbimage expected that SATA disk always have block size of 512
bytes. But there are 4K Native SATA disks with block size of 4096 bytes.
New SATA_BLKSZ command allows to specify different block size than 512
bytes and therefore allows to generate kwbimage for disks with different
block sizes.
This change add support for generating SATA images with different block
size. Also it add support for verifying and dumping such images.
Because block size itself is not stored in SATA kwbimage, image
verification is done by checking every possible block size (it is any
power of two value between 512 and 32 kB).
Signed-off-by: Pali Rohár <[email protected]>
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Replace repeated code patterns by generic code.
Signed-off-by: Pali Rohár <[email protected]>
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This allows image type print_header() callback to access struct
image_tool_params *params.
Signed-off-by: Pali Rohár <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Find SATA block device by blk_get_devnum_by_uclass_id() function and read
from it the real block size of the SATA disk. In case of error, fallback
back to 512 bytes.
Signed-off-by: Pali Rohár <[email protected]>
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Find SATA block device by blk_get_devnum_by_uclass_id() function and read
from it the real block size of the SATA disk.
Signed-off-by: Pali Rohár <[email protected]>
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In the early days of the Allwinner A64 U-Boot support, we relied on a
vendor provided "boot0" binary to perform the DRAM initialisation. This
replaced the SPL, and required to equip the U-Boot (proper) binary with
a vendor specific header to be recognised as a valid boot0 payload.
Fortunately these days are long gone (we gained SPL and DRAM support in
early 2017!), and we never needed to use that hack on any later 64-bit
Allwinner SoC.
Since this is highly obsolete by now, remove that option from the
defconfigs of all A64 boards. We leave the code still in here for now,
since some people expressed their interest in this.
Signed-off-by: Andre Przywara <[email protected]>
Reviewed-by: Jernej Skrabec <[email protected]>
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Some SoCs of the H616 family use a die variant, that puts some CPU power
and reset control registers at a different address. There are examples
of two instances of the same board, using different die revisions of the
otherwise same H313 SoC. We need to write to a register in that block
*very* early in the SPL boot, to switch the core to AArch64.
Since the devices are otherwise indistinguishable, let the SPL code read
that die variant and use the respective RVBAR address based on that.
That is a bit tricky, since we need to do that in hand-coded AArch32
machine language, shared by all 64-bit SoCs. To avoid build dependencies
in this mess, we always provide two addresses to choose from, and just
give identical values for all other SoCs. This allows the same code to
run on all 64-bit SoCs, and controls this switch behaviour purely from
Kconfig.
Signed-off-by: Andre Przywara <[email protected]>
Reviewed-by: Jernej Skrabec <[email protected]>
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To switch the ARMv8 Allwinner SoCs into the 64-bit AArch64 ISA, we need
to program the 64-bit start code address into an MMIO mapped register
that shadows the architectural RVBAR register.
This address is SoC specific, with just two versions out there so far.
Now a third address emerged, on a *variant* of an existing SoC (H616).
Change the boot0.h start code to make this address a Kconfig
selectable option, to allow easier maintenance.
Signed-off-by: Andre Przywara <[email protected]>
Reviewed-by: Jernej Skrabec <[email protected]>
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It turns out that some H616 and related SoCs (like H313) need TPR2
parameter for proper working. Add it.
Signed-off-by: Jernej Skrabec <[email protected]>
Reviewed-by: Andre Przywara <[email protected]>
Signed-off-by: Andre Przywara <[email protected]>
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Currently twr2rd, trd2wr and twtp are constants, but according to
vendor driver they are calculated from other values. Do that here too,
in preparation for later introduction of new parameter.
While at it, introduce constant for t_wr_lat, which was incorrectly
calculated from tcl before.
Signed-off-by: Jernej Skrabec <[email protected]>
Reviewed-by: Andre Przywara <[email protected]>
Signed-off-by: Andre Przywara <[email protected]>
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Part of the code, previously known as "unknown feature", also doesn't
have constant values. They are derived from TPR0 parameter in vendor
DRAM code.
Let's move that code to separate function and introduce TPR0 parameter
here too, to ease adding new boards.
Signed-off-by: Jernej Skrabec <[email protected]>
Acked-by: Andre Przywara <[email protected]>
Signed-off-by: Andre Przywara <[email protected]>
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These values are highly board specific and thus make sense to add
parameter for them. To ease adding support for new boards, let's make
them same as in vendor DRAM settings.
Signed-off-by: Jernej Skrabec <[email protected]>
Acked-by: Andre Przywara <[email protected]>
Signed-off-by: Andre Przywara <[email protected]>
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Mentioned function result is always true and result isn't checked
anyway. Let's make it void.
Reviewed-by: Andre Przywara <[email protected]>
Signed-off-by: Jernej Skrabec <[email protected]>
Signed-off-by: Andre Przywara <[email protected]>
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Vendor H616 DRAM code always configure part which we call ODT
configuration. Let's reflect that here too.
Signed-off-by: Jernej Skrabec <[email protected]>
Reviewed-by: Andre Przywara <[email protected]>
Signed-off-by: Andre Przywara <[email protected]>
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Vendor DRAM settings use TPR10 parameter to enable various features.
There are many mores features that just those that are currently
mentioned. Since new will be added later and most are not known, let's
reuse value from vendor DRAM driver as-is. This will also help adding
support for new boards.
Signed-off-by: Jernej Skrabec <[email protected]>
Reviewed-by: Andre Przywara <[email protected]>
Signed-off-by: Andre Przywara <[email protected]>
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