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NXP tested imx8mn-ddr4 with firmware version 201810 only. Use this
version for all imx8mn targets with DRAM DDR4.
Fixes: 93c4c0e4dd1 ("arm: dts: imx8mn-u-boot: Create common imx8mn-u-boot.dtsi")
Signed-off-by: Oleksandr Suvorov <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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The 'commit 864ac2cf383e ("board: imx8mp: Add Engicam
i.Core MX8M Plus EDIMM2.2 Starter Kit")' has changed the imx8mp evk ram
settings from 6GB ram to 2GB.
This changeset reverts the above change.
Signed-off-by: Manoj Sai <[email protected]>
Reported-by : Peter Bergin <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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When routing UART4 using the ECSPI2 pads, register
IOMUXC_UART4_RXD_SELECT_INPUT (offset 0x050C) should be changed only
when dealing with RX, as its name suggests.
Signed-off-by: Arnaud Ferraris <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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SCFW has fixed a overflow issue in sc_rm_is_pad_owned API. This
requires u-boot to update API implementation, since it will cause
compatible issue. Otherwise all pad checking will have problem and
cause pad setting not continue.
Due to the compatible issue, the new u-boot only works with new
SCFW (API version: 1.21 and later).
old scfw + old u-boot: API overflow issue
old scfw + new u-boot, or new scfw + old u-boot: API compatible issue
new scfw + new u-boot: Working
Signed-off-by: Ye Li <[email protected]>
Reviewed-by : Jason Liu <[email protected]>
Signed-off-by: Marcel Ziswiler <[email protected]>
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Add the needed DT overrides and configs to enable UART in SPL.
Cc: Fabio Estevam <[email protected]>
Signed-off-by: Michael Trimarchi <[email protected]>
Tested-by: Suniel Mahesh <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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The imx8mn-beacon SOM has a QSPI part on it connected to the
FlexSPI controller. Add a defconfig option which supports
booting from the QSPI NOR flash instead of sd/mmc.
Signed-off-by: Adam Ford <[email protected]>
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In order to enable HAB, FSL_CAAM, ARCH_MISC_INIT and
SPL_CRYPTO should be enabled in Kconfig like other i.MX8M
boards.
Signed-off-by: Adam Ford <[email protected]>
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In some situations the GSC firmware where the EEPROM containing the
model and DRAM configuration may not be ready by the time the SoC
is ready to talk to it over I2C.
Instead of a hard delay, poll the I2C lines to wait until they are
released to avoid the I2C drivers 'Arbitation lost' error message.
Signed-off-by: Tim Harvey <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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Add I2C GPIO bus recovery support by adding scl-gpios and sda-gpios for the
various I2C busses on Gateworks Venice boards.
Signed-off-by: Tim Harvey <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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Add gpio pins present on new board revision:
* LTE modem support (imx8mm-gw7902 only)
- lte_pwr#
- lte_rst
- lte_int
* M2 power enable
- m2_pwr_en
* off-board 4.0V supply
- vdd_4p0_en
Signed-off-by: Tim Harvey <[email protected]>
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Convert to DM_I2C
Signed-off-by: Peng Fan <[email protected]>
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Convert to DM_I2C
Signed-off-by: Peng Fan <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-amlogic
- jethub j100: add rescue boot from microSD
- move meson sm command to cmd/meson and add efusedump sub-command
- switch dwc2 otg to DM for G12A, GXL & AXG
- Add new boards:
- Odroid Go Ultra
- Odroid-N2L
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As explained in the text at the bottom of the page
https://source.codeaurora.org/external/imx/imx-atf:
"QUIC repositories on this site will not receive any updates after
March 31, 2022, and will be deleted on March 31, 2023."
Point to the NXP ATF github repo instead.
Signed-off-by: Fabio Estevam <[email protected]>
Reviewed-by: Oliver Graute <[email protected]>
Reviewed-by: Marcel Ziswiler <[email protected]>
Reviewed-by: Frieder Schrempf <[email protected]>
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Cleanup some dangling comments left by automated migration
processes that are no longer value.
Signed-off-by: Peter Robinson <[email protected]>
Acked-by: Peng Fan <[email protected]>
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Synchronizing the device tree with linux introduced a regression.
The U-Boot specific dtsi mustn't override the alias settings for
the eMMC/SD interfaces.
Without this U-Boot cannot access the eMMC and boot the kernel.
Fixes: c21b61bff15 ("colibri-imx6ull/-emmc: synchronise device tree with linux")
Signed-off-by: Max Krummenacher <[email protected]>
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All Apalis iMX8 variants have 2nd RGMII on SoC, so add the address
for 2nd ethernet.
Signed-off-by: Andrejs Cainikovs <[email protected]>
Signed-off-by: Francesco Dolcini <[email protected]>
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Implement basic PSCI provider to let OS turn CPU cores off and on,
power off and restart the system and determine PSCI version. This
is sufficient to remove the need for the ATF BL31 blob altogether.
To make use of this functionality, active the following Kconfig options:
# CONFIG_PSCI_RESET is not set
CONFIG_ARMV8_MULTIENTRY=y
CONFIG_ARMV8_SET_SMPEN=y
CONFIG_ARMV8_SPL_EXCEPTION_VECTORS=y
CONFIG_ARMV8_EA_EL3_FIRST=y
CONFIG_ARMV8_PSCI=y
CONFIG_ARMV8_PSCI_CPUS_PER_CLUSTER=4
CONFIG_ARMV8_SECURE_BASE=0x970000
CONFIG_ARM_SMCCC=y
CONFIG_SYS_HAS_ARMV8_SECURE_BASE=y
Signed-off-by: Marek Vasut <[email protected]>
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In case U-Boot is the PSCI provider, it is necessary to correctly
program CSU and TZASC registers. Those are poorly documented, so
push in the correct values.
Signed-off-by: Marek Vasut <[email protected]>
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The common code used to bring up secondary cores requires a final
jump location to be stored in some sort of memory location, define
this memory location to be the start of OCRAM, since it is available.
Signed-off-by: Marek Vasut <[email protected]>
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In case U-Boot is a PSCI provider, map RAM explicitly as NS,
otherwise secondary cores crash with SError when attempting
to access RAM mapped as secure in EL2.
Signed-off-by: Marek Vasut <[email protected]>
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In case U-Boot is a PSCI provider, enable GICv3 support as this
is necessary to bring up secondary cores.
Signed-off-by: Marek Vasut <[email protected]>
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The ROM pointers are in fact populated by the ATF BL31 blob, in case
U-Boot itself if the PSCI provider, there is no ATF BL31 blob, hence
ignore the ROM pointers.
Signed-off-by: Marek Vasut <[email protected]>
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In case U-Boot itself if the PSCI provider on i.MX8M, do not
require the ATF BL31 blob, as at that point the blob is useless
and would interfere with U-Boot operation.
Signed-off-by: Marek Vasut <[email protected]>
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The custom lowlevel_init implementation is no longer necessary, since
it is responsible for routing and trapping SErrors in U-Boot in EL2,
which is implemented in common code since commit:
6c7691edd55 ("armv8: Always unmask SErrors")
Signed-off-by: Marek Vasut <[email protected]>
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The RESET2 hook is a PSCI v1.1 functionality, rename the macro accordinly.
Add missing handler for the RESET2 hook, so it can be implemented by U-Boot.
Signed-off-by: Marek Vasut <[email protected]>
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Add macro representing the PSCI v1.1 .
Signed-off-by: Marek Vasut <[email protected]>
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In commit d0399a46e7cda63c07e3eb8558bef84cfb068028, the device tree was
synchronized from linux and the aliases were dropped.
They need to be kept so that the mmc cards are in the right order.
Without the aliases, u-boot reports:
MMC: FSL_SDHC: 2, FSL_SDHC: 3
With the aliases, u-boot reports:
MMC: FSL_SDHC: 0, FSL_SDHC: 1
The upstream linux device tree does not contain the same aliases than
u-boot (It keeps the devices order with /dev/mmcblk2 and /dev/mmcblk3).
Because this board has been using different aliases in u-boot
and linux, a imx6q-sabrelite-u-boot.dtsi file is added to be
automatically included in imx6q-sabrelite.dts.
This way, linux and u-boot each keep their own aliases and there
is no breakage on current installations.
This should never be done for new boards as we want to keep linux and
u-boot with the same aliases as much as possible.
This patch is only necessary to avoid breaking existing setups.
Signed-off-by: Detlev Casanova <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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SPI NAND read access
The introduction of CONFIG_FSL_QSPI_AHB_FULL_MAP as default in:
def88bce094e ("spi: fsl_qspi: Support to use full AHB space on i.MX")
broke the SPI NAND read access on the Kontron SL i.MX6UL/ULL boards.
Reading data from the flash returns garbage instead of the actual
content. Fix this for now by disabling the introduced option.
In the long run this should be fixed globally.
Fixes: def88bce094e ("spi: fsl_qspi: Support to use full AHB space on i.MX")
Signed-off-by: Frieder Schrempf <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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The highest register on ACT8846 is 0xf5, so set the number of registers
to 0xf6, ensuring that the pmic read/write commands are able to access
all of the supported registers (and many that are not valid, since the
register space is quite sparse).
Signed-off-by: John Keeping <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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Add support for HS400 in mode2timing array.
Add a quirk for Versal NET platform to indicate that HS400 is supported
through bit63 of capability register.
Signed-off-by: Ashok Reddy Soma <[email protected]>
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HS400 is indicated in bit63 of capability register in few IP's.
Add a quirk to check this and add HS400 to host capabilities.
Signed-off-by: Ashok Reddy Soma <[email protected]>
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Check if the low level driver supports config_dll callback function and
call it if it does. Call with dll disable before calling set_clock and
with dll enable after it.
Signed-off-by: Ashok Reddy Soma <[email protected]>
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Add support for eMMC 5.1 for Versal NET platform
- Add new compatible string(xlnx,versal-net-5.1-emmc).
- Add CONFIG_ARCH_VERSAL_NET condition wherever required.
- Add DLL and Delay Chain mode support
- Add input and output tap delays for eMMC.
- Add Strobe select tap for HS400 mode.
Signed-off-by: Ashok Reddy Soma <[email protected]>
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Add more capable "bkops" command which allows enabling and disabling both
manual and automatic bkops. The existing 'mmc bkops-enable' subcommand is
poorly named to cover all the possibilities, hence the new-ish subcommand.
Note that both commands are wrappers around the same common code.
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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Select DM_SERIAL
Signed-off-by: Peng Fan <[email protected]>
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Select DM_SERIAL
Signed-off-by: Peng Fan <[email protected]>
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Select DM_SERIAL
Signed-off-by: Peng Fan <[email protected]>
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Select DM_SERIAL
Signed-off-by: Peng Fan <[email protected]>
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Select DM_SERIAL
Signed-off-by: Peng Fan <[email protected]>
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Select DM_SERIAL
Signed-off-by: Peng Fan <[email protected]>
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The prefix 0 has been dropped in dts, so correct in board file
Signed-off-by: Peng Fan <[email protected]>
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After DM_SERIAL, and set pinctrl_uart1 as pre-reloc, no need initialize
iomux at board file.
Signed-off-by: Peng Fan <[email protected]>
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Select DM_SERIAL
Signed-off-by: Peng Fan <[email protected]>
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Select DM_SERIAL
Signed-off-by: Peng Fan <[email protected]>
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The conversion to DM_I2C is mandatory, so convert to it
and also to DM_PMIC.
Signed-off-by: Fabio Estevam <[email protected]>
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The conversion to CONFIG_DM_SERIAL is mandatory, so select
this option.
Signed-off-by: Fabio Estevam <[email protected]>
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These SoMs may ship with SMSC LAN8740Ai PHYs, enable the SMSC PHY driver.
Signed-off-by: Marek Vasut <[email protected]>
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