| Age | Commit message (Collapse) | Author |
|
Remove xlnx-versal-power.h dt binding header because they should be moved
directly to folder where DTs are. In the Linux kernel this shift already
started by moving xlnx-zynqmp-clk.h to arch/arm64/boot/dts/xilinx/ folder.
U-Boot is using only one PD_DEV_OSPI constact which is moved to
zynqmp_firmware.h header. But handling around it should be fixed anyway
because no driver should be calling xilinx_pm_request() directly.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/a0f0154ef89929517c3217efe025e8021a910b90.1764233963.git.michal.simek@amd.com
|
|
SOC can boot from different boot medias and also different offsets that's
why by default show multiboot value to be aware which image system is
booting out of. It is especially useful for systems with A/B update
enabled.
Also limit zynqmp_pm_get_pmc_multi_boot_reg() usage only for Versal and
Versal Gen 2.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/fd7564ce2f51d965c273e939e98de01beb92e6f5.1764232124.git.michal.simek@amd.com
|
|
Updating the delays for flash reset in the mini u-boot case.
These experimental delay values by looking at different flash device
vendors datasheets.
Signed-off-by: Venkatesh Yadav Abbarapu <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/3fd0641a164a4d628fdf28a94771829f3bf9cb0c.1764181308.git.michal.simek@amd.com
|
|
The commit 6d234a79e9eb ("cadence_qspi: Refactor the flash reset
functionality") introduced two returns in cadence_spi_probe() that's why
remove it.
Fixes: 6d234a79e9eb ("cadence_qspi: Refactor the flash reset functionality")
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/5f6d6db9c301daf10ddb707a9031f1a467d6ebf1.1764180937.git.michal.simek@amd.com
|
|
reset and poweroff are called via hooks in psci driver which is going
around sysreset framework that's why enable sysreset drivers and do
reset and poweroff via this framework.
Signed-off-by: Venkatesh Yadav Abbarapu <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/a0b13b17fbf99fd16341b68b649ec08ef2b3536a.1764170621.git.michal.simek@amd.com
|
|
Update the TEXT_BASE and DTB address as per the new memory map.
Signed-off-by: Venkatesh Yadav Abbarapu <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/6c6eeab25c8bc8739127fb40e1a941920d04fc77.1764170621.git.michal.simek@amd.com
|
|
USB hub is available on the first evaluation board called vek385.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/4cd72e28bc0e2a9720fe5481dcab2e923d708b34.1764170621.git.michal.simek@amd.com
|
|
Enable the new PCA9541 i2c bus arbiter on AMD/Xilinx SOCs by default.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/edfb7e7a6e800484d3ac3bf45a4f83adfcdd1754.1764170621.git.michal.simek@amd.com
|
|
Crashes are occurring due to the number of reserved memory regions
exceeding the current maximum limit of 16. It is recommended to
increase the supported number of memory regions to 64, as newer
platforms may utilize more reserved regions.
Signed-off-by: Venkatesh Yadav Abbarapu <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/d9f73d26af832e19dfd79a4b7bfcf09c498a4873.1764169780.git.michal.simek@amd.com
|
|
Wrap the dm_i2c_read() call is used for FRU EEPROM reads in a
retry loop, attempting up to EEPROM_FRU_READ_RETRY times if a
-ETIMEDOUT error is returned. The loop exits immediately on
success or any error other than -ETIMEDOUT. This improves
robustness against transient I2C timeouts during FRU detection
and decoding.
Signed-off-by: Padmarao Begari <[email protected]>
Reviewed-by: Matthias Brugger <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/9556d204c351d2dc40176a31dab11f789fd1cc7f.1763542221.git.michal.simek@amd.com
|
|
GEMs are using mdio node that's why don't need cells description in the
node.
SPIs should be using partitions subnode that's why don't need to have
cells description in the node
Also no need to specify cells in DT overlay root node when there is no
child which needs it.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/7612a3817480f4089aea3e14cca07d585f8fddb5.1763551956.git.michal.simek@amd.com
|
|
cdns,is-dma is not documented property that's why setup CQSPI_DMA_MODE
quirk to enable DMA mode based on compatible string. And also change
compatible string for mini configurations also with recording compatible
string in the driver (Compatible string is already the part of existing DT
binding).
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/f109829793900e57558d98ed22caf80c1a72b232.1762787994.git.michal.simek@amd.com
|
|
Versal Gen 2 is using enhancement SMC format but in near future SCMI client
should be used. This patch is just bridging this gap till SCMI server is
fully tested.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/e83c665408d1453a464dd02cd2a25bb0ed267131.1762788250.git.michal.simek@amd.com
|
|
Versal Gen 2 is using different SMC format that's why firmware and clock
drivers needs to be align with it.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/16bdee56fd75113c6d531bae7a8a34900b10280d.1762788250.git.michal.simek@amd.com
|
|
Remove unneeded debug messages, parenthesis and fix error message.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/5b6fbcff1025415adc97e3e17eeb18863df4383e.1762778011.git.michal.simek@amd.com
|
|
When CLK_AUTO_ID is enabled 8 higher bits of clk->id is unique clock
identifier in clk uclass that's why it is necessary to mask lower bits
which are clock ID.
Also check that ID not bigger then maximum supported clock.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/647f1d2c7d274c1106558a655386ef92e0baf2c8.1762778011.git.michal.simek@amd.com
|
|
The commit 1b267fe1824e ("firmware: xilinx: Prepare code for new SMC
firmware format") introduce new __data macro that's why use it in clock
driver too.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/eac8d0ab60a018d6c59aa28c49691839a3eec174.1762511327.git.michal.simek@amd.com
|
|
The EFI System Resource Table (ESRT) is updated after the firmware
image GUID is copied to the fw_images structure. This ensures that
the ESRT accurately reflects the current firmware resources.
Signed-off-by: Padmarao Begari <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
|
|
The GitHub dependabot tool has reported a "medium" priority bug
CVE-2025-68146, with this package. Update to the patched version.
Reported-by: GitHub dependabot
Signed-off-by: Tom Rini <[email protected]>
|
|
The option should be 'net_lwip' and not 'net lwip' (see all usage of it
in the test code base).
Fixes: 2bac578c5aba ("test: allow multiple config options in buildconfigspec")
Signed-off-by: Quentin Schulz <[email protected]>
Reviewed-by: Jerome Forissier <[email protected]>
Reviewed-by: Mattijs Korpershoek <[email protected]>
|
|
Avoid NULL pointer dereference in case 'env select' is invoked
without parameters, check the arg count and make sure it is at
least 2, otherwise print usage.
The crash is easy to trigger e.g. in sandbox:
$ ./u-boot -Tc "env select"
Fixes: a97d22ebba23 ("cmd: env: add env select command")
Signed-off-by: Marek Vasut <[email protected]>
Tested-by: Vincent Stehlé <[email protected]>
Reviewed-by: Ilias Apalodimas <[email protected]>
|
|
The alt name for tispl binary is "tispl.bin" and not "tispl", this patch
fixes the documentation to the correct alt name.
Fixes: def64b493748 ("doc: board: Add document for DFU boot on am62x SoCs")
Fixes: 3633fdbb6b90 ("ti: add support for AM6254atl SiP")
Signed-off-by: Anshul Dalal <[email protected]>
Reviewed-by: Mattijs Korpershoek <[email protected]>
|
|
Pull request net-20251218.
net-lwip:
- Avoid NULL dereference in _set_cacert()
- Fix filename handling in TFTP
|
|
Running `wget cacert builtin` leads to a crash in _set_cacert():
Unhandled exception: Load access fault
Function _set_cacert() dereferences variable wget_info.
We must initialize it before executing the cacert sub-command.
Fixes: d3761a31ef09 ("lwip: split net/lwip/wget.c")
Signed-off-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Jerome Forissier <[email protected]>
Reviewed-by: Ilias Apalodimas <[email protected]>
|
|
The code to choose the filename to use does not cope with no name set at
all. Firstly the test for a name in net_boot_file_name tests the pointer
rather than the string it points to. Secondly the cleanup on exit in
this case attempts to free a global variable. Fix both issues.
Signed-off-by: Andrew Goodbody <[email protected]>
Reviewed-by: Jerome Forissier <[email protected]>
|
|
https://source.denx.de/u-boot/custodians/u-boot-socfpga into next
This pull request brings together a set of fixes and enhancements across
the SoCFPGA platform family, with a focus on MMC/SPL robustness, EFI
boot enablement, and Agilex5 SD/eMMC support.
CI: https://source.denx.de/u-boot/custodians/u-boot-socfpga/-/pipelines/28776
Highlights:
*
SPL / MMC:
o
Fix Kconfig handling for
SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
o
Correct raw sector calculations and respect explicit sector values
when loading U-Boot from MMC in SPL
o
Adjust raw MMC loading logic for SoCFPGA platforms
*
EFI boot:
o
Permit EFI booting on SoCFPGA platforms
o
Disable mkeficapsule tool build for Arria 10 where unsupported
*
Agilex5:
o
Upgrade SDHCI controller from SD4HC to SD6HC
o
Enable MMC and Cadence SDHCI support in defconfig
o
Add dedicated eMMC device tree and defconfig for Agilex5 SoCDK
o
Revert incorrect GPIO configuration for SDIO_SEL
o
Refine U-Boot DT handling for SD and eMMC boot variants
*
SPI:
o
Allow disabling the DesignWare SPI driver in SPL via Kconfig
*
Board / configuration fixes:
o
Enable random MAC address generation for Cyclone V
o
Fix DE0-Nano-SoC boot configuration
o
Remove obsolete or conflicting options from multiple legacy
SoCFPGA defconfigs
|
|
Commit f369e1564cf4 turned those off because the SPL size grew too
large. It also argued that those boards would never support EFI booting.
The former is correct, therefore keep CONFIG_SPL_EFI_PARTITION off.
CONFIG_SPL_ISO_PARTITION is default off. What is not correct is that
those boards are limited to legacy boot - you just need a hybrid
partition table to make both the bootrom and UEFI happy.
Signed-off-by: Jan Kiszka <[email protected]>
Reviewed-by: Tien Fong Chee <[email protected]>
|
|
By default, the de0_nano_soc used raw sectors, but the address became
invalid due the raw-mode refactorings. With loading via partition type
fixed, we can switch to that mode which is in line with what the ROM
loader does.
Fixes: 2a00d73d081a ("spl: mmc: Try to clean up raw-mode options")
Signed-off-by: Jan Kiszka <[email protected]>
Reviewed-by: Tien Fong Chee <[email protected]>
|
|
If U-Boot is located on MMC, SPL and U-Boot proper are glued together.
More precisely, SPL is stored 4 times. Take this and its padding into
account and adjust sector number via board_spl_mmc_get_uboot_raw_sector.
This allows loading from a partition, without the need to hard-code the
offset via SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
Signed-off-by: Jan Kiszka <[email protected]>
Reviewed-by: Tien Fong Chee <[email protected]>
|
|
This function and the sector parameter evolved over the time. By now,
sector is influenced by spl_mmc_get_uboot_raw_sector which allows to
adjust the read sector with an offset that U-Boot proper may have inside
the partition. That used to work by chance if both
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR and
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION were enabled. Since
2a00d73d081a they are a choice, and we need to drop the condition to
maintain this feature.
Signed-off-by: Jan Kiszka <[email protected]>
Reviewed-by: Tien Fong Chee <[email protected]>
|
|
choice
Add SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE as condition where so
far SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION was enough - though often
by chance as both options were enabled.
Reorder the #ifdef blocks at this chance to follow the order in the
Kconfig menu.
Fixes: 2a00d73d081a ("spl: mmc: Try to clean up raw-mode options")
Signed-off-by: Jan Kiszka <[email protected]>
Reviewed-by: Tien Fong Chee <[email protected]>
|
|
SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
We need to explicitly select SPL_LOAD_BLOCK when USE_PARTITION_TYPE is
enabled, just like the other choices do.
Fixes: 2a00d73d081a ("spl: mmc: Try to clean up raw-mode options")
Signed-off-by: Jan Kiszka <[email protected]>
Reviewed-by: Tien Fong Chee <[email protected]>
|
|
To reduce SPL size, make it possible to exclude designware driver,
while keeping it enabled in the main u-boot.
Signed-off-by: Ralph Siemsen <[email protected]>
Reviewed-by: Sean Anderson <[email protected]>
|
|
mkeficapsule tool will be built by default if EFI_LOADER is set due to
commit b7a625b1ce49 ("tools: Build mkeficapsule tool by default if
EFI_LOADER is set").
This will cause compilation error on all our SoCFPGA devices, hence we will
be disabling this config as we do not utilize this tool.
Signed-off-by: Alif Zakuan Yuslaimi <[email protected]>
Reviewed-by: Tien Fong Chee <[email protected]>
|
|
Add dedicated device tree support for eMMC configuration on the Agilex5
SoCDK board, providing an alternative to the default SD card setup.
Changes to socfpga_agilex5.dtsi:
-
- Configure always-on regulator for stable eMMC operation
New device tree files:
- socfpga_agilex5_socdk_emmc.dts: Main eMMC device tree configuration
* Configure for eMMC operation (no-sd, no-sdio, non-removable)
* Set 8-bit bus width and high speed capability
* Add timing parameters for legacy and SDR modes
* Configure voltage supplies for eMMC power and I/O
* Add fixed 1.8V regulator for eMMC I/O voltage supply
- socfpga_agilex5_socdk_emmc-u-boot.dtsi: U-Boot specific additions
* Include common Agilex5 U-Boot configurations
* Set SPL boot order with eMMC support
* Enable necessary peripherals for boot-time operation
Configuration files:
- configs/socfpga_agilex5_emmc_defconfig: eMMC-specific configuration
* Inherit from base Agilex5 configuration
* Disable GPIO regulator support (not needed for fixed eMMC setup)
* Set eMMC-specific device tree
Build system integration:
- Add socfpga_agilex5_socdk_emmc.dtb target to Makefile
Signed-off-by: Tanmay Kathpalia <[email protected]>
Reviewed-by: Tien Fong Chee <[email protected]>
|
|
Enable MMC support with Cadence SDHCI controller for both SPL and
U-Boot proper on Agilex5 platform to support SD card operations in
legacy and high speed timing modes.
MMC controller configuration:
- Enable MMC subsystem (CONFIG_MMC=y, CONFIG_DM_MMC=y)
- Add Cadence SDHCI controller support (CONFIG_MMC_SDHCI_CADENCE=y)
- Enable SDHCI with ADMA support for better performance
- Add MMC command support for user interaction
SPL configuration:
- Enable MMC support in SPL (CONFIG_SPL_DM_MMC=y)
- Add SDHCI ADMA support in SPL (CONFIG_SPL_MMC_SDHCI_ADMA=y)
- Enable GPIO support in SPL (CONFIG_SPL_DWAPB_GPIO=y)
Voltage regulator support:
- Add device model regulator framework (CONFIG_DM_REGULATOR=y)
- Enable fixed voltage regulator support for card power
- Add GPIO-controlled regulator for I/O voltage switching
- Include regulator support in SPL for early initialization
These changes enable SD card functionality with legacy and high speed
timing modes, providing proper voltage regulation and GPIO control
for the Agilex5 SoCDK platform.
Signed-off-by: Tanmay Kathpalia <[email protected]>
Reviewed-by: Tien Fong Chee <[email protected]>
|
|
Upgrade the SDHCI Cadence controller from SD4HC to SD6HC for Agilex5
platform to support the newer controller version with enhanced features.
Key changes:
- Remove combophy0 node and associated references as SD6HC doesn't require
separate PHY configuration node
- Upgrade MMC controller compatible from "cdns,sd4hc" to "cdns,sd6hc"
- Add Agilex5-specific compatible string "altr,agilex5-sd6hc" for
platform-specific optimizations
Hardware configuration updates:
- Add voltage regulator support:
* sd_emmc_power: Fixed 3.3V regulator for card power supply
* sd_io_1v8_reg: GPIO-controlled regulator for 1.8V/3.3V I/O switching
- Configure proper reset control with named resets including combophy
reset
- Add GPIO control via portb pin 3 for voltage switching
SD card operation:
- Configure for SD card specific operation (no-mmc, cap-sd-highspeed)
- Set maximum frequency to 200MHz
- Configure timing parameters for SD modes:
* Default Speed (DS) and UHS-I SDR12 mode timing:
* High Speed and UHS-I SDR25 mode timing:
- Add PHY timing delays for optimal signal integrity
Signed-off-by: Tanmay Kathpalia <[email protected]>
Reviewed-by: Tien Fong Chee <[email protected]>
|
|
Remove GPIO hog configuration for SDIO_SEL pin as it is now handled
through the voltage regulator framework for SD ultra high speed mode
support. The GPIO pin 3 on portb controller is used to control the
level shifter for SD card I/O voltage switching.
The regulator-based approach provides proper voltage switching control
for UHS-I modes (SDR50, SDR104) while maintaining compatibility with
the MMC subsystem's voltage switching protocols.
This reverts commit b0dbc9fcb7dfb7522be25ee205997be2fb5e1bdc.
Signed-off-by: Tanmay Kathpalia <[email protected]>
Reviewed-by: Tien Fong Chee <[email protected]>
|
|
Enable CONFIG_NET_RANDOM_ETHADDR to allow U-Boot to assign a random MAC
address during Ethernet initialization when a valid MAC is not programmed
in hardware.
This avoids network initialization failures and MAC address conflicts,
especially on boards used for development or shipped without a
factory-programmed MAC.
Signed-off-by: Tien Fong Chee <[email protected]>
Signed-off-by: Alif Zakuan Yuslaimi <[email protected]>
Reviewed-by: Tien Fong Chee <[email protected]>
|
|
constants"
Quentin Schulz <[email protected]> says:
This does a bit of "cleanup" by reusing constants for some FIT
properties instead of having the same string in multiple places.
Additionally, this adds a new constant for the compatible property in
FIT configuration nodes[1] which is useful for FIT images with multiple
FIT configuration nodes to support multiple devices in the same blob.
U-Boot will try to figure out which node to select based on that
compatible[2].
However, if this property is missing (and the first blob in the fdt
property of the configuration node is uncompressed), the compatible from
the root node of the associated kernel FDT will be used for the
autoselection mechanism. For now, I only print the property if it
exists, but maybe it'd make sense to expose the fallback one if it's
missing. I guess we can implement that later on if desired.
[1] https://fitspec.osfw.foundation/#optional-properties compatible paragraph
[2] https://fitspec.osfw.foundation/#select-a-configuration-to-boot
Link: https://lore.kernel.org/r/[email protected]
|
|
Fit conf node may have a compatible property[1] which stores the
compatible of the first blob in the fdt property of the node. This can
be used to automatically select the proper conf node based on the
compatible from the running U-Boot (matching the former's compatible
with the latter)[2].
This brings the ability to mkimage/dumpimage to print the compatibles of
the configuration node(s). U-Boot CLI commands such as iminfo also see
this addition to their output.
[1] https://fitspec.osfw.foundation/#optional-properties compatible paragraph
[2] https://fitspec.osfw.foundation/#select-a-configuration-to-boot
Signed-off-by: Quentin Schulz <[email protected]>
|
|
Fit conf node may have a compatible property[1] which stores the root
compatible of the first blob in the fdt property of the node. This can
be used to automatically select the proper conf node based on the
compatible from the running U-Boot (matching the former's compatible
with the latter)[2].
This adds (and uses) this constant for FIT node parsing.
Note that this property may also appear in fpga image nodes[3] but that
isn't done in this commit.
[1] https://fitspec.osfw.foundation/#optional-properties compatible paragraph
[2] https://fitspec.osfw.foundation/#select-a-configuration-to-boot
[3] https://fitspec.osfw.foundation/#images-node 2.3.2 Conditionally mandatory property
Signed-off-by: Quentin Schulz <[email protected]>
|
|
Some FIT image properties have their string represented in
include/image.h via constants. FIT_ALGO_PROP does exist and would fit the
bill so let's use it instead of using a hardcoded string.
Signed-off-by: Quentin Schulz <[email protected]>
|
|
Some properties have their string represented in include/image.h via
constants, so let's use those constants instead of using a hardcoded
string.
Signed-off-by: Quentin Schulz <[email protected]>
|
|
We are trying to get rid of the legacy LED API and this is one of the
last users.
As far as I understood from the code, only one LED is controllable and
it is a GPIO led. When initializing the LED, it is always enabled
regardless of the passed argument, same for the mask.
In addition, the LED is used as a BOOT LED.
To keep the same behavior, a GPIO driver should be written, then add a
gpio-leds node which makes use of a GPIO from said driver, add the
/options/u-boot/boot-led property pointing at this new GPIO LED node and
then enable CONFIG_LED as well as CONFIG_LED_BOOT. This should result in
the same behavior using the modern framework.
Signed-off-by: Quentin Schulz <[email protected]>
|
|
Add initial support for the Toradex Aquila AM69 module.
The Aquila AM69 SoM is based on the TI AM69 SoC from the Jacinto 7
family and is designed for high-end embedded computing, featuring up to
32GB of LPDDR4 and 256GB eMMC storage, extensive multimedia support (3x
Quad CSI, 2x Quad DSI, DisplayPort, 5x Audio I2S/TDM), six Ethernet
interfaces (1x 1G, 4x 2.5G SGMII, 1x 10G), USB 3.2 Host/DRD support, and
a Wi-Fi 7/BT 5.3 module, alongside an RX8130 RTC, I2C EEPROM and
Temperature Sensor, and optional TPM 2.0 module.
Link: https://www.toradex.com/computer-on-modules/aquila-arm-family/ti-am69
Link: https://www.toradex.com/products/carrier-board/aquila-development-board-kit
Signed-off-by: Emanuele Ghidoli <[email protected]>
Co-developed-by: Parth Pancholi <[email protected]>
Signed-off-by: Parth Pancholi <[email protected]>
Co-developed-by: Franz Schnyder <[email protected]>
Signed-off-by: Franz Schnyder <[email protected]>
Signed-off-by: Francesco Dolcini <[email protected]>
|
|
The usage of fdt_fixup_reserved is repeated for ATF and OP-TEE for
multiple platforms, this patch creates a single fdt API for fixing up
the reserved-memory node with added error handling.
All k3 platforms already share a common tispl template which ensures
binaries are loaded as per the respective CONFIG_*_LOAD_ADDR. And the
provided new_size for the fixup is overridden by the size from fdt node
anyways. This allows for safe abstraction of the reserved memory fixups
for all current platforms.
fdt_fixup_reserved now abstracts the ATF and OP-TEE fixups by calling
the renamed static fdt_fixup_reserved_memory function with the required
parameters.
Signed-off-by: Anshul Dalal <[email protected]>
|
|
If func->pins could not be allocated, one must also free
func variable that was allocated previously.
Signed-off-by: Francois Berder <[email protected]>
Reviewed-by: Quentin Schulz <[email protected]>
|
|
AM62d previously reused the AM62a DM. Since a dedicated DM is now
available, migrate to device specific DM.
Signed-off-by: Paresh Bhagat <[email protected]>
Reviewed-by: Andrew Davis <[email protected]>
|
|
Signed-off-by: Jonathan GUILLOT <[email protected]>
Fixes: ff6ef4b9093f ("doc: man-page for the part command")
Reviewed-by: Quentin Schulz <[email protected]>
|