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These DT files are synchronized from Linux 5.19.
Signed-off-by: Icenowy Zheng <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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This commit sychronizes the header file for FU740 PRCI clocks with the
one from Linux 5.19.
The constant values are the same, but all constant names are changed
(most are just prefixed with FU740_).
Signed-off-by: Icenowy Zheng <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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If ethernet connected to SFP, like this:
&enetc_port0 {
phy-connection-type = "sgmii";
sfp = <&sfp0>;
managed = "in-band-status";
status = "okay";
};
Then enetc_config_phy returns -ENODEV and the memory containing the mdio interface is freed.
It's better to unregister and free mdio resources.
Signed-off-by: Siarhei Yasinski <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Ramon Fried <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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In both the Freescale DDR controller and the SPD spec, bank address bits
are stored as the number of bank address bits minus 2. For example, if a
chip had 8 banks (3 total bank address bits), the value of
bank_addr_bits would be 1. This is rather surprising for users
configuring their memory manually, since they can't set bank_addr_bits
to the actual number of bank address bits. Rectify this.
There is at least one example of this kind of mistake already, in
board/freescale/t102xrdb/ddr.c. The documented MT40A512M8HX has two bank
address bits, but bank_addr_bits was set to 2, implying 4 bank address
bits. Such a value is reserved in BA_BITS_CS, but I suspect the
controller simply ignores the top bit, making this kind of mistake
harmless, if misleading.
Fixes: e8a7f1c32b5 ("powerpc/t1023rdb: Add T1023 RDB board support")
Signed-off-by: Sean Anderson <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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The interactive mode uses large several tables of options which can be
configured. However, much of the contents of these tables are
repetetive. For example, no struct is larger than half a kilobyte, so
the offset only takes up 9 bits. Similarly, the size is only ever 4 or
8, and printhex is a boolean. Reduce the size of these fields. This
reduces the size of the options tables by around 10 KiB. However, the
largest contributor to the size of the options tables is the use of a
pointer for the strings. A better approach would be to use a separate
array of strings, and store an integer index in the options tables.
However, this would require a large re-architecting of this file.
Signed-off-by: Sean Anderson <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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The frequency of the system counter is static which is given by the
COUNTER_FREQUENCY option. Remove COUNTER_FREQUENCY_REAL.
Signed-off-by: Michael Walle <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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Depending on the boot source, set different CLI prompts. This will help
the user to figure out in which mode the bootloader was started. There
are two special modes: failsafe and SDHC boot.
Signed-off-by: Michael Walle <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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During startup the SPL will print where the u-boot proper is read from.
Instead of using the default names, provide more user friendly names.
Signed-off-by: Michael Walle <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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The board is able to boot from the following source:
- user-updateble SPI flash
- write-protected part of the same SPI flash
- eMMC
- SD card
Implement the needed function hooks to support all of these boot
sources.
Signed-off-by: Michael Walle <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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By default the OCRAM is marked as secure. While the SPL runs in EL3 and
thus can access it, DMA devices cannot. Mark the whole OCRAM as
non-secure.
This will fix MMC and SD card boot on LS1028A when using SPL instead of
TF-A.
Signed-off-by: Michael Walle <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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Signed-off-by: Tom Rini <[email protected]>
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Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <[email protected]>
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This adds the onkey, RTC and watchdog children to the DA9063 PMIC node,
fixes the compatible for qspi0's flash node to match the official DT
schema (it being an is25wp256 is discoverable, hence jedec,spi-nor is
the only compatible that should be present) and exposes the card detect
GPIO.
Note that the device trees still diverge in some places (including
important things like the PCIe controller's clock name) and should be
cleaned up so that a common device tree is used in both projects rather
than having different bindings. This patch does not attempt to do that,
merely expose important functionality present in Linux's that is not in
U-Boot's so that it can be used without the OS providing its own bundled
copy.
Signed-off-by: Jessica Clarke <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-rockchip
- migrate to use binman for U-Boot image generate on rockchip platform;
- Some fixes for rk3399 and rk3308;
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Adding some debug prints I can see:
MMC: mmc@fe320000: Got clock clock-controller@ff760000 76
mmc@fe310000: Got clock clock-controller@ff760000 77
Unknown clock 77
rockchip_dwmmc_get_mmc_clk: err=-2
mmc@fe310000: 3, mmc@fe320000: 1, mmc@fe330000: 0
According to kernel code the SDIO clock is identical to SDMMC clock
except for the con 16->15 change.
Add support for the clock to avoid the error.
Signed-off-by: Michal Suchanek <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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This new image is similar to u-boot-rockchip.bin except that it's
destined to be flashed on SPI-NOR flashes.
Cc: Quentin Schulz <[email protected]>
Signed-off-by: Quentin Schulz <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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This prepares for the creation of a u-boot-rockchip-spi.bin image
similar to u-boot-rockchip.bin to the exception it's destined for
SPI-NOR flashes instead of MMC storage medium.
Cc: Quentin Schulz <[email protected]>
Signed-off-by: Quentin Schulz <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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By factoring SPL check in the first condition, this makes the checks a
bit less convoluted and more readable.
Cc: Quentin Schulz <[email protected]>
Signed-off-by: Quentin Schulz <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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This allows to build u-boot-rockchip.bin binary with binman for Rockchip
ARM64 boards instead of the legacy Makefile way.
Cc: Quentin Schulz <[email protected]>
Signed-off-by: Quentin Schulz <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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for ARM
idbloader.img content - currently created by way of Makefile - can be
created by binman directly.
So let's do that for Rockchip ARM platforms.
Cc: Quentin Schulz <[email protected]>
Signed-off-by: Quentin Schulz <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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Binman mkimage entry generates temporary files so let's remove them
when calling `make clean`.
Fixes: 9b312e26fc77 ("rockchip: Enable building a SPI ROM image on jerry")
Cc: Quentin Schulz <[email protected]>
Reported-by: Johan Jonker <[email protected]>
Signed-off-by: Quentin Schulz <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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mkimage entry currently creates a file whose name is derived from the
section name containing said entry.
Let's allow the user to define a filename for the mkimage-generated
binary by using the 'filename' DT property.
Cc: Quentin Schulz <[email protected]>
Signed-off-by: Quentin Schulz <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Some image types handled by mkimage require the datafiles to be passed
independently (-d data1:data2) for specific handling of each. A
concatenation of datafiles prior to passing them to mkimage wouldn't
work.
That is the case for rkspi for example which requires page alignment
and only writing 2KB every 4KB.
This adds the ability to tell binman to pass the datafiles without
prior concatenation to mkimage, by adding the multiple-data-files
boolean property to the mkimage node.
Cc: Quentin Schulz <[email protected]>
Signed-off-by: Quentin Schulz <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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While technically not a bug, let's have some consistency in paths
returned by u-boot,spl-boot-order look-up and the one saved in
u-boot,spl-boot-device by syncing spl_boot_devices_tbl and boot_devices
node paths.
Cc: Quentin Schulz <[email protected]>
Signed-off-by: Quentin Schulz <[email protected]>
Tested-by: Xavier Drudis Ferran <[email protected]>
Reviewed-by: Xavier Drudis Ferran <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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On RK3399, mmc0 is eMMC and mmc1 is SD card, c.f. console:
MMC: mmc@fe320000: 1, mmc@fe330000: 0
In arch/arm/mach-rockchip/spl-boot-order.c:board_boot_order, the
boot_device (BOOT_DEVICE_*) value is gotten from spl_node_to_boot_device
function. Said function returns BOOT_DEVICE_MMC1 for mmc0 (eMMC) and
BOOT_DEVICE_MMC2 for mmc1 (SD card).
Since the SD card controller is at mmc@fe320000, it should be associated
with BOOT_DEVICE_MMC2 and not BOOT_DEVICE_MMC1. Same applies to eMMC.
Let's fix that by swapping the two BOOT_DEVICEs.
Cc: Quentin Schulz <[email protected]>
Signed-off-by: Quentin Schulz <[email protected]>
Tested-by: Xavier Drudis Ferran <[email protected]>
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Rockchip SoCs need the boot_devices array defined in order to map the
bootloader's value to a U-Boot device. Implement this for rk3308.
Signed-off-by: John Keeping <[email protected]>
Reviewed-by: Philipp Tomsich <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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Commit 6aa4fe3912 ("dm: core: Rename and fix uclass_get_by_name_len()")
changed uclass_get_device_by_name() to an exact match when previously it
behaved as a prefix match.
The roc-cc code relied on this prefix match by only specifying part of
the device name. Fix this by using the full name including the address.
Signed-off-by: John Keeping <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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When idbloader.img is flashed on the eMMC, the SPL still tries to load
from SPI-NOR first.
This is due to an incorrect look-up in the Device Tree. Since commit
822556a93459 ("arm: dts: sync the Rockhip 3399 SoCs from Linux"), the
node name (but not label) changed from sdhci@fe330000 to mmc@fe330000
meaning U-Boot SPL is not looking for the correct node name anymore and
fails to find the "same-as-spl" node when eMMC is the medium from which
the SPL booted.
Fixes: 822556a93459 ("arm: dts: sync the Rockhip 3399 SoCs from Linux")
Cc: Quentin Schulz <[email protected]>
Signed-off-by: Quentin Schulz <[email protected]>
Reviewed-by: Xavier Drudis Ferran <[email protected]>
Reviewed-by: Artem Lapkin <[email protected]>
Tested-by: Artem Lapkin <[email protected]>
Tested-by: Lapkin Artem <[email protected]>
Tested-by: Lapkin Artem <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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Currently the default initialisation frequency is 50MHz. Although
this does appear to be suitable for some LPDDR4 RAM chips, training at
this low frequency has been seen to cause Column errors, leading to
Capacity check errors on others.
Here we force RAM initialisation to happen at 400MHz before ramping up
to the final value running value of 800MHz after everything has been
successfully configured.
Link: https://lore.kernel.org/u-boot/[email protected]/
Suggested-by: YouMin Chen <[email protected]>
Signed-off-by: Lee Jones <[email protected]>
Tested-by: Xavier Drudis Ferran <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
Tested-by: Michal Suchánek <[email protected]>
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Frequency changes to 400MHz are presently reported as:
lpddr4_set_rate_0: change freq to 400000000 mhz 0, 1
This is obviously wrong by 6 orders of magnitude.
Ensure frequency changes are reported accurately.
Signed-off-by: Lee Jones <[email protected]>
Tested-by: Xavier Drudis Ferran <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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Functions pointed to by this op pointer can return non-zero values
indicating an error. Ensure any error value is propagated back up the
call-chain.
Signed-off-by: Lee Jones <[email protected]>
Tested-by: Xavier Drudis Ferran <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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Only add the dram channel when we finally setup it successfully at the
last step.
Signed-off-by: Han Pengfei <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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The boot_devices constants for rk3288 were changed to match the
binding, but the dtsi file was not synced.
Fix by renaming the rk3288 mmc node names.
Also correct the clock name for "ciu-drive".
Signed-off-by: Johan Jonker <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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TPM fixes and state reporting
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Add an option to tell the TPM to commit non-volatile data immediately it
is changed, rather than waiting until later. This is needed in some
situations, since if the device reboots it may not write the data.
Add definitions for the rest of the Cr50 commands while we are here.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Ilias Apalodimas <[email protected]>
Signed-off-by: Ilias Apalodimas <[email protected]>
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Add a vendor-specific TPM2 command for this and implement it for Cr50.
Note: This is not part of the TPM spec, but is a Cr50 extension.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Ilias Apalodimas <[email protected]>
Signed-off-by: Ilias Apalodimas <[email protected]>
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It is useful to read information about the current TPM state, where
supported, e.g. for debugging purposes when verified boot fails.
Add support for this to the TPM interface as well as Cr50. Add a simple
sandbox test.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Ilias Apalodimas <[email protected]>
Signed-off-by: Ilias Apalodimas <[email protected]>
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At present the emulator assumes that the TPM is inited in the same phase
where it is used. But in fact SPL may init the TPM, so we don't want to
complain when U-Boot proper later uses it. Remove this check.
It might be best to save this information into the device state for the
TPM, so that we can make sure the TPM was inited at some point. For now,
this seems good enough.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Ilias Apalodimas <[email protected]>
Signed-off-by: Ilias Apalodimas <[email protected]>
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The message format is incorrect. Fix it.
Signed-off-by: Simon Glass <[email protected]>
Acked-by: Ilias Apalodimas <[email protected]>
Signed-off-by: Ilias Apalodimas <[email protected]>
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The offset here is incorrect. Fix it.
Signed-off-by: Simon Glass <[email protected]>
Acked-by: Ilias Apalodimas <[email protected]>
Signed-off-by: Ilias Apalodimas <[email protected]>
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This feature is used for measured boot, so we can add a log entry to the
TCPA with some information about where the digest comes from. It is not
currently supported in the TPM drivers, but add it to the API so that
code which expects it can signal its request.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Ilias Apalodimas <[email protected]>
Signed-off-by: Ilias Apalodimas <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request of efi-2022-10-rc4-2
UEFI:
* provide EFI Conformance Profile Table
* fix display of NVMe EUI-64
* fixes for Simple Text Input Ex Protocol
* fix exception unit-test on non-x86 sandbox
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UEFI specification 2.9A requires to display the EUI-64 "in hexadecimal
format with byte 7 first (i.e., on the left) and byte 0 last".
This is in contrast to what the NVMe specification wants.
But it is what EDK II has been implementing.
Here is an example with the patch applied:
qemu-system-aarch64 -machine virt -cpu cortex-a72 -nographic \
-bios denx/u-boot.bin \
-device nvme,id=nvme1,serial=9ff81223 \
-device nvme-ns,bus=nvme1,drive=nvme1n0,eui64=0x123456789ABCDEF0 \
-drive file=arm64.img,if=none,format=raw,id=nvme1n0
=> nvme scan
=> efidebug devices
Device Path
====================
/VenHw(…)/NVMe(0x1,f0-de-bc-9a-78-56-34-12)
Signed-off-by: Heinrich Schuchardt <[email protected]>
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Display the EBBRv2.0 conformance in the ECPT table.
The EBBRv2.0 conformance profile is set in the ECPT if
CONFIG_EFI_EBBR_2_0_CONFORMANCE=y.
Signed-off-by: Jose Marinho <[email protected]>
Add dependencies for CONFIG_EFI_EBBR_2_0_CONFORMANCE.
Enable the setting by default.
Reviewed-by: Heinrich Schuchardt <[email protected]>
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The ECPT table will be included in the UEFI specification 2.9+.
The ECPT table was introduced in UEFI following the code-first path. The
acceptance ticket can be viewed at:
https://bugzilla.tianocore.org/show_bug.cgi?id=3591
The Conformance Profiles table is a UEFI configuration table that contains
GUID of the UEFI profiles that the UEFI implementation conforms with.
The ECPT table is created when CONFIG_EFI_ECPT=y.
The config is set by default.
Signed-off-by: Jose Marinho <[email protected]>
Reviewed-by: Heinrich Schuchardt <[email protected]>
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The selftest checking the handling of exceptions in UEFI binaries is using
assembly to provide an undefined instruction. On the sandbox the correct
form of the instruction depends on the host architecture.
Signed-off-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Ilias Apalodimas <[email protected]>
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In the extended text input protocol support input of control letters
0x1c - 0x1f.
Signed-off-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Ilias Apalodimas <[email protected]>
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We cannot expect the buffers passed to the input protocols to be zero
filled. If only modifier keys are pressed, we have to return EFI_NOT_READY
but we still have to fill the key structure.
Signed-off-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Ilias Apalodimas <[email protected]>
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