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2022-06-24xilinx: zynqmp: Merge device listsStefan Herbrechtsmeier
Merge the svd / xck devices into to the common zynqmp device list. Signed-off-by: Stefan Herbrechtsmeier <[email protected]> Link: https://lore.kernel.org/r/20220620163650.18756-6-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek <[email protected]>
2022-06-24xilinx: zynqmp: Reuse shift macros to define masksStefan Herbrechtsmeier
Reuse the shift macros to define the masks. Signed-off-by: Stefan Herbrechtsmeier <[email protected]> Link: https://lore.kernel.org/r/20220620163650.18756-5-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek <[email protected]>
2022-06-24xilinx: zynqmp: Add macro for device type maskStefan Herbrechtsmeier
Add a macro for the device type mask of the id code. Signed-off-by: Stefan Herbrechtsmeier <[email protected]> Link: https://lore.kernel.org/r/20220620163650.18756-4-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek <[email protected]>
2022-06-24xilinx: zynqmp: Replace strncat with strlcatStefan Herbrechtsmeier
Replace strncat with strlcat to always produce a valid null-terminated string. Signed-off-by: Stefan Herbrechtsmeier <[email protected]> Link: https://lore.kernel.org/r/20220620163650.18756-3-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek <[email protected]>
2022-06-24firmware: zynqmp: Probe driver before useStefan Herbrechtsmeier
Probe the driver before use to ensure that the driver is always available and the global data are valid. Initialize the global data with zero and probe the driver if the global data are still zero. This allows a usage of the firmware functions from other drivers with arbitrary order between the drivers. Signed-off-by: Stefan Herbrechtsmeier <[email protected]> Link: https://lore.kernel.org/r/20220620163650.18756-2-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek <[email protected]>
2022-06-24firmware: zynqmp: Check if rx channel dev pointer is validStefan Herbrechtsmeier
Check if rx channel dev pointer is valid and not if the address of the pointer is valid. Signed-off-by: Stefan Herbrechtsmeier <[email protected]> Link: https://lore.kernel.org/r/20220620163650.18756-1-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek <[email protected]>
2022-06-24ARM: zynq: Fix size-cells for pl353 driverAmit Kumar Mahapatra
"size-cells" of the nand controller node should be 0 as the "reg" property of the nand device node contains the chip select number and not address information. The patch fixes the below compilation warning arch/arm/dts/zynq-zc770-xm011.dtb: Warning (reg_format): /axi/memory-controller@e000e000/nand-controller@0,0/nand@0:reg: property has invalid length (4 bytes) (#address-cells == 1, #size-cells == 1) Signed-off-by: Amit Kumar Mahapatra <[email protected]> Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/6e90665a2dad7fe8ade10b8f57101f8144963791.1655288559.git.michal.simek@amd.com
2022-06-24arm64: zynqmp: Fix usb node drive strength and slew rateAshok Reddy Soma
As per design, all input/rx pins should have fast slew rate and 12mA drive strength. Rest all pins should be slow slew rate and 4mA drive strength. Fix usb nodes as per this and remove setting of slow slew rate for all the usb gorup pins. Signed-off-by: Ashok Reddy Soma <[email protected]> Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/b245c165f05845c1f3ab41a92c82b7ec1538cee4.1655288171.git.michal.simek@amd.com
2022-06-24microblaze: Remove interrupt handlerMichal Simek
The primary purpose for this code was timer. By converting it to CONFIG_TIMER there is no code which uses this implementation that's why remove it. If there is a need to handle interrupts this patch can be reverted in future. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/5f2decc5a30a5678490ebde26d8c6f5a5f873cda.1654684731.git.michal.simek@amd.com
2022-06-24microblaze: Convert axi timer to DM driverMichal Simek
Move axi timer driver from Microblaze to generic location. Origin implementation was irq based with counting down timer. CONFIG_TIMER drivers are designed differently that timer is free running up timer with automatic reload without any interrupt. Information about clock rates are find out in timer_pre_probe() that's why there is no need to get any additional information from DT in the driver itself (only register offset). Signed-off-by: Michal Simek <[email protected]> Tested-by: Ovidiu Panait <[email protected]> Link: https://lore.kernel.org/r/6c12fc86bbc1f17d05c25018862e7b7b03346b36.1654684731.git.michal.simek@amd.com
2022-06-24cpu: add CPU driver for microblazeOvidiu Panait
Add a basic CPU driver that retrieves information about the microblaze CPU core. cpu_ops handlers are implemented so that the "cpu" command can work properly: U-Boot-mONStR> cpu list 0: cpu@0 MicroBlaze @ 50MHz, Rev: 11.0, FPGA family: zynq7000 U-Boot-mONStR> cpu detail 0: cpu@0 MicroBlaze @ 50MHz, Rev: 11.0, FPGA family: zynq7000 ID = 0, freq = 50 MHz: L1 cache, MMU Note: cpu_ver_lookup[] and family_string_lookup[] arrays were imported from linux. Signed-off-by: Ovidiu Panait <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2022-06-24microblaze: add support for handling PVR dataOvidiu Panait
Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2022-06-24microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY optionOvidiu Panait
Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2022-06-24microblaze: cache: introduce flush_dcache_range()Ovidiu Panait
Align microblaze with the other architectures and provide an implementation for flush_dcache_range(). Also, remove the microblaze exception in drivers/core/device.c. Signed-off-by: Ovidiu Panait <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2022-06-24microblaze: cache: introduce cpuinfo structureOvidiu Panait
Introduce a minimal cpuinfo structure to hold cache related info. The instruction/data cache size and cache line size are initialized early in the boot to default Kconfig values. They will be overwritten with data from PVR/dtb if the microblaze UCLASS_CPU driver is enabled. The cpuinfo struct was placed in global_data to allow the microblaze UCLASS_CPU driver to also run before relocation (initialized global data should be read-only before relocation). gd_cpuinfo() helper macro was added to avoid volatile "-Wdiscarded-qualifiers" warnings when using the pointer directly. Signed-off-by: Ovidiu Panait <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]> (s/bralid/brlid/)
2022-06-24microblaze: cache: introduce flush_cache_all()Ovidiu Panait
All flush_cache() calls in microblaze code are supposed to flush the entire instruction and data caches, so introduce flush_cache_all() helper to handle this. Also, provide implementations for flush_dcache_all() and invalidate_icache_all() so that icache and dcache u-boot commands can work. Signed-off-by: Ovidiu Panait <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2022-06-24microblaze: cache: introduce Kconfig options for icache/dcache sizesOvidiu Panait
Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]> (s/bralid/brlid/g)
2022-06-24microblaze: cache: split flush_cache() functionOvidiu Panait
Factor out icache/dcache components from flush_cache() function. Call the newly added __flush_icache()/__flush_dcache() functions inside icache_disable() and dcache_disable(), respectively. There is no need to flush both caches when disabling a particular cache type. Signed-off-by: Ovidiu Panait <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2022-06-24microblaze: cache: improve icache Kconfig optionsOvidiu Panait
Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2022-06-24microblaze: cache: improve dcache Kconfig optionsOvidiu Panait
Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2022-06-24microblaze: cache: replace XILINX_USE_DCACHE -> CONFIG_DCACHEOvidiu Panait
XILINX_USE_DCACHE macro was removed in 7556fa09e0e ("microblaze: Simplify cache handling"), but it was still used in a couple of places. Replace those occurences with CONFIG_DCACHE. Signed-off-by: Ovidiu Panait <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2022-06-24microblaze: start.S: remove unused codeOvidiu Panait
in16/out16 routines seem to not be used anywhere in microblaze code, so remove them. Signed-off-by: Ovidiu Panait <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2022-06-24cpu-uclass: relocate ops pointers for CONFIG_NEEDS_MANUAL_RELOCOvidiu Panait
Relocate cpu_ops pointers when CONFIG_NEEDS_MANUAL_RELOC is enabled. The (gd->flags & GD_FLG_RELOC) check was added to make sure the reloc_done logic works for drivers that use DM_FLAG_PRE_RELOC. Signed-off-by: Ovidiu Panait <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2022-06-24cmd: cpu: migrate cpu command to U_BOOT_CMD_WITH_SUBCMDS()Ovidiu Panait
Migrate cpu command to use U_BOOT_CMD_WITH_SUBCMDS() helper macro, to reduce duplicated code. This also fixes the cpu command on boards that enable CONFIG_NEEDS_MANUAL_RELOC. Signed-off-by: Ovidiu Panait <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2022-06-24microblaze: Add support for run time relocationMichal Simek
Microblaze is using NEEDS_MANUAL_RELOC from the beginnging. This is causing issues with function pointer arrays which need to be updated manually after relocation. Building code with -fPIC and linking with -pic will remove this limitation and there is no longer need to run manual update. By default still old option is enabled but by disabling NEEDS_MANUAL_RELOC code will be compiled for full relocation. The patch does couple of things which are connected to each other. - Define STATIC_RELA dependency to call relocate-rela to fill sections. - REMAKE_ELF was already enabled but u-boot file can't be used because sections are empty. relocate-rela will fill them and output file is u-boot.elf which should be used. - Add support for full relocation (u-boot.elf) - Add support for early relocation when u-boot.bin is loaded to different address then CONFIG_SYS_TEXT_BASE - Add rela.dyn and dynsym sections Disabling NEEDS_MANUAL_RELOC U-Boot size increased by 10% of it's original size (550kB to 608kB). Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/a845670b34925859b2e321875f7588a29f6655f9.1655299267.git.michal.simek@amd.com
2022-06-24tools: relocate-rela: Add support for 32bit Microblaze relocationMichal Simek
Microblaze is 32bit that's why it is using elf32 format. Relocation code requires to get information about rela and dynsym senctions and also text base which was used for compilation. Code build with -fPIC and linked with -pic generates 4 relocation types. R_MICROBLAZE_NONE is the easiest one which doesn't require any action. R_MICROBLAZE_REL only requires write addend to r_offset address. R_MICROBLAZE_32/R_MICROBLAZE_GLOB_DAT are the most complicated. There is a need to find out symbol value with adding symbol value and write it to address pointed by r_offset. Calculation with addend is also added but only 0 addend values are generated now. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/9912c3d76933bdf75e1ebb6aab43726cd32cafb5.1655299267.git.michal.simek@amd.com
2022-06-24tools: relocate-rela: Add support for elf32 decodingMichal Simek
Add support for 32bit ELF format which is used by Microblaze. Also check that code runs only for Microblaze. Function finds information about rela.dyn and dynsym which will be used later for relocation. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/7491cc72fe04cbd48db014f1492ce463e91dfb42.1655299267.git.michal.simek@amd.com
2022-06-24tools: relocate-rela: Check that relocation works only for EM_AARCH64Michal Simek
Relocation support is only for EM_AARCH64 that's why check machine type to make sure that the code will never run on any unsupported one. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/36f26c8752335239344b265e5ddedad10e9cac8b.1655299267.git.michal.simek@amd.com
2022-06-24tools: relocate-rela: Extract elf64 reloc to special functionMichal Simek
Adding support for new type requires to change code layout that's why move elf64 code to own function for easier maintenance. It also solves the problem with not calling fclose in case of error. Return value from rela_elf64 is saved to variable that's why fclose() is called all the time. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/21763b80527521c85ca7d4ac64ad6ff4885409c8.1655299267.git.michal.simek@amd.com
2022-06-24microblaze: Create SYM_ADDR macro to deal with symbolsMichal Simek
Symbol handling depends on compilation flags. Right now manual relocation is used that's why symbols can be referenced just by name and there is no need to find them out. But when position independent code (PIC) is used symbols need to be described differently. That's why having one macro change is easier than changing the whole code. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/d704e9a267c8b536452fb999111dbfbc9d652be5.1655299267.git.michal.simek@amd.com
2022-06-24microblaze: Add comment about reset locationMichal Simek
Better to add comment to explain why reset vector points all the time to origin U-Boot location. If reset happens U-Boot should start from it's origin location. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/5ca6341b7487708247fe2948d7e496ea6f7c2e02.1655299267.git.michal.simek@amd.com
2022-06-24microblaze: Remove _start symbol handling at U-Boot startMichal Simek
Right now U-Boot runs all the time from the same address where it is loaded but going to full relocation code starting address doesn't need to be fixed and can be simply discovered from reading PC register. That's why use r20 to get PC address and subtract offset from the beginning to get starting address. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/044b727c33dfbe662f68512d0da0775a4805f360.1655299267.git.michal.simek@amd.com
2022-06-24microblaze: Remove code around r20 in relocate_code()Michal Simek
r20 is not used that's why remove logic around it. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/1b32bab5c050d099b2f6d49bc4896322ed03d788.1655299267.git.michal.simek@amd.com
2022-06-24microblaze: Optimize register usage in relocate_codeMichal Simek
There are additional operations which can be done simpler that's why improve logic around relocation address r7 handling and _start symbol. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/c8b60f72f1605c2ba6b4b7be1893d7e6ec3d8597.1655299267.git.michal.simek@amd.com
2022-06-24microblaze: Change stack protection address to new stack addressMichal Simek
SLR low address is still setup to 0 that's why only high limit should be updated. STACK_SIZE macro is present and could be possible used for low address alignment but it is not done by this patch. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/c00cb843df848703b760a65934ed3ce31fafcf19.1655299267.git.michal.simek@amd.com
2022-06-24microblaze: Separate code end substractionMichal Simek
Follow up patch will convert symbol handling that's why it is necessary to separate logic around symbols to special instruction. It adds 4B for new instruction but it is worth to do it to have code ready for for full relocation. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/030863fa9a9c1ca0a9b082fe498522da09189fbc.1655299267.git.michal.simek@amd.com
2022-06-24microblaze: Enable REMAKE_ELFMichal Simek
Enable u-boot.elf recreation from u-boot.bin to prepare for removing manul relocation. Enable option for big endian configuration but it is not used too much that's why it is completely untested. By supporting this system there is a need to define LITTLE/BIG endian Kconfig options to pass -EL/-EB flags. Full command line for u-boot.elf recreation looks like this: microblazeel-xilinx-linux-gnu-objcopy -I binary -B microblaze \ -O elf32-microblazeel u-boot.bin u-boot-elf.o Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/7e242a519fcd1c693b9103c5599b515af555ca43.1655299267.git.michal.simek@amd.com
2022-06-24mips: Move endianness selection to arch/KconfigMichal Simek
This option will be used by Microblaze that's why move it to generic location to be able to use it. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/ceb39fa615cb5657b66a7b77bab99e86ca7a3346.1655299267.git.michal.simek@amd.com
2022-06-24microblaze: Fix typo in exception.cMichal Simek
Trivial fix. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/c4ede6dc738c5bd7c518f3bb2c9410b15c102e20.1655299267.git.michal.simek@amd.com
2022-06-24microblaze: Remove CONFIG_TEXT_BASE from codeMichal Simek
Use symbol instead macro to find where U-Boot starts. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/d5d4c201bee6171e85b47783d916387d84db0456.1655299267.git.michal.simek@amd.com
2022-06-24microblaze: Fix early stack allocationMichal Simek
CONFIG_SYS_INIT_SP_OFFSET macro place stack to TEXT_BASE - SYS_MALLOC_F_LEN but there is no reason to do it now because board_init_f_alloc_reserve() returns exact location where stack should be. That's why stack location is calculated at run time and there is no need to hardcode it via macro. This change will help with placing U-Boot to any address. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/e9aee69646e022fd8a96cbee2d2a07ab81fb6e05.1655299267.git.michal.simek@amd.com
2022-06-24microblaze: Fix stack protection behaviorMichal Simek
When U-Boot starts stack protection can be already enabled that's why setup the lowest possible SLR value which is address 0. And the highest possible stack in front of U-Boot. That's why you should never load U-Boot to the beginning of DDR. There must be some space reserved. Code is using this location for early malloc space, early global data and stack. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/86b9748bad12142659804d6381bc6bbf20be44f1.1655299267.git.michal.simek@amd.com
2022-06-24microblaze: Switch absolute branches to relativeMichal Simek
There is no reason to use absolute branches and use just relative. This change helps with moving binary to different location and start it from there. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/83a5103b85c1c2220cd3ab4d5365169c6660e40a.1655299267.git.michal.simek@amd.com
2022-06-24tools: relocate-rela: Read rela start/end directly from ELFMichal Simek
There is no need to pass section information via parameters. Let's read text base and rela start/end directly from elf. It will help with reading other information from ELF for others architecture. Input to relocate-rela is u-boot binary and u-boot ELF. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/ab7ae14a6e058722e8c608089729e98edf20a08d.1655299267.git.michal.simek@amd.com
2022-06-24tools: relocate-rela: Use global variablesMichal Simek
Declare rela_start/end and text_base as global variables. It will help with using these variables for ELF decoding. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/7485b163e92f8f3f754c35f7c88c3314f2212efd.1655299267.git.michal.simek@amd.com
2022-06-24Makefile: Fix description for relocate-rela parametersMichal Simek
Numbers in comment are shifter which is visible from command which calls them. Also relocate-rela usage is describing them. "Usage: %s <bin file> <text base> <rela start> <rela end>" Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/bb0287b9071eb33eea0cf914a7128c2603684377.1655299267.git.michal.simek@amd.com
2022-06-24tools: relocate-rela: Open binary u-boot file laterMichal Simek
There is no value to open u-boot binary file so early. Better to check all values first and then open binary file. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/9c2b4ebadbe83497db28af02f6af2623793ffdb6.1655299267.git.michal.simek@amd.com
2022-06-24arm64: zynqmp: Fix tps544/u3007 node descriptionMichal Simek
u3007 is removed in zynqmp-m-a2197-02-revA board and on zynqmp-m-a2197-03-revA it was renamed to v3022 at address 0x18. Signed-off-by: Michal Simek <[email protected]> Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/f477796bcca6fce09168699a0498d792f4a54acf.1655287013.git.michal.simek@amd.com
2022-06-24arm64: zynqmp: Update tps53681 i2c addressMichal Simek
TI manual (https://www.ti.com/lit/gpn/TPS53681) is saying that i2c address is 7bit where c0h is 1100000 which is 0x60. This will fix issues reported by make dtbs that 0xc0 is above 7bit regular i2c address range. Signed-off-by: Michal Simek <[email protected]> Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/2f50c1cd258f6b05deb2a6a9af7fa92952f3f8cb.1655287013.git.michal.simek@amd.com
2022-06-24arm64: zynqmp: Fix i2c addresses for vck190 SCMichal Simek
si570 is normally at 0x5d address and address is not aligned with address in node. 8T49N240 can't be at 0xd8 that's why it is shifter by one bit. Signed-off-by: Michal Simek <[email protected]> Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/4fa86fffa9cb8abe633fbc5a9c55bea249b5edfb.1655287013.git.michal.simek@amd.com
generated by cgit v1.3.1 (git 2.54.0) at 2026-08-05 00:42:53 +0000