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When the board was added, enabling tzc380 was left off by
mistake. The optee was tested with the following configuration
in s2pro
+ firmware {
+ optee {
+ compatible = "linaro,optee-tz";
+ method = "smc";
+ };
+ };
+
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ /* 6MiB */
+ optee_core@5f800000 {
+ reg = <0x00 0x5f800000 0x00 0x600000>;
+ };
+
+ /* 2MiB */
+ optee_shm@5fe00000 {
+ reg = <0x00 0x5fe00000 0x00 0x200000>;
+ };
+ };
+
Signed-off-by: Michael Trimarchi <[email protected]>
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If the fitImage has some bad block in fit image area, the
offset must be recalulcated. This should be done always.
After implementing it in mxs now is possible to call the function
even for that platform.
Cc: Fabio Estevam <[email protected]>
Tested-By: Tim Harvey <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Signed-off-by: Michael Trimarchi <[email protected]>
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The badblock should be skipped properly in reading and writing.
Fix the logic. The bcb struct is written, skipping the bad block,
so we need to read using the same logic. This was tested create
bad block in the area and then flash it and read it back.
Acked-by: Han Xu <[email protected]>
Tested-By: Tim Harvey <[email protected]>
Signed-off-by: Michael Trimarchi <[email protected]>
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The specific implementation was having bug. Those bugs are since
the beginning of the implementation. Some manufactures can already
experience this bug in their SPL code. This bug can be more visible on
architecture that has complicated boot process like imx8mn. Older
version of uboot can be affected if the bad block
appear in correspoding of the beginning of u-boot image. In order to
adjust the function we scan from the first erase block.
The problematic part of old code was in this part:
while (is_badblock(mtd, offs, 1)) {
page = page + nand_page_per_block;
/* Check i we've reached the end of flash. */
if (page >= mtd->size >> chip->page_shift) {
free(page_buf);
return -ENOMEM;
}
}
Even we fix it adding increment of the offset of one erase block size
, we don't fix the problem, because the first erase block where the
image start is not checked. The code was tested on an imx8mn where
the boot rom api was not able to skip it. This code is used by other
architecures like imx6 and imx8mm
Cc: Han Xu <[email protected]>
Cc: Fabio Estevam <[email protected]>
Acked-by: Han Xu <[email protected]>
Tested-By: Tim Harvey <[email protected]>
Signed-off-by: Michael Trimarchi <[email protected]>
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Move the hook after nand_scan_tail is called. The hook must be replaced
to the mxs specific one but those must to be assignment later in the
probe function.
With this fix markbad is working again. Before this change:
nand markbad 0xDEC00
NXS NAND: Writing OOB isn't supported
NXS NAND: Writing OOB isn't supported
block 0x000dec00 NOT marked as bad! ERROR 0
Cc: Han Xu <[email protected]>
Cc: Fabio Estevam <[email protected]>
Acked-by: Han Xu <[email protected]>
Tested-By: Tim Harvey <[email protected]>
Signed-off-by: Michael Trimarchi <[email protected]>
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HW accelerated hash operations are giving incorrect hash output.
so add flush and invalidate for input/output hash buffers.
Fixes: 94e3c8c4fd (crypto/fsl - Add progressive hashing support using hardware acceleration.)
Signed-off-by: Gaurav Jain <[email protected]>
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implement get f/w version api.
print ele f/w version in spl.
Signed-off-by: Gaurav Jain <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
Reviewed-by: Pankaj Gupta <[email protected]>
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If probing caam_jr returns failure, the variable "dev" will not be
initialized, so we can't use dev->name for the error print.
Otherwise it will cause crash.
Signed-off-by: Ye Li <[email protected]>
Reviewed-by: Gaurav Jain <[email protected]>
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Select the CMD_UNZIP option so that the 'gzwrite' command
can be used to flash wic.gz image into the eMMC.
Signed-off-by: Fabio Estevam <[email protected]>
Reviewed-by: Frieder Schrempf <[email protected]>
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When the device tree indicates support for role switching through
the "usb-role-switch" property, take the "role-switch-default-mode"
property into account when deciding which role to put the
controller into.
This makes USB devices work on Apple M1 systems where the device
tree may include a "dr_mode" property that is set to "otg", but
where we need to put the controller into "host" mode to see
devices connected to the type-C ports.
Signed-off-by: Mark Kettenis <[email protected]>
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pinctrl_wdog already marked u-boot,dm-spl, so clean up board code.
The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.
Signed-off-by: Peng Fan <[email protected]>
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pinctrl_wdog already marked u-boot,dm-spl, so clean up board code.
The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.
Signed-off-by: Peng Fan <[email protected]>
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pinctrl_wdog already marked u-boot,dm-spl, so clean up board code.
The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.
Signed-off-by: Peng Fan <[email protected]>
Tested-by: Ariel D'Alessandro <[email protected]>
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pinctrl_wdog as u-boot,dm-spl already marked in imx8mm-verdin-u-boot.dtsi,
The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.
Signed-off-by: Peng Fan <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
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Mark pinctrl_wdog as u-boot,dm-spl to clean up board code,
The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.
Signed-off-by: Peng Fan <[email protected]>
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Mark pinctrl_wdog as u-boot,dm-spl to clean up board code,
The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.
Signed-off-by: Peng Fan <[email protected]>
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Mark pinctrl_wdog as u-boot,dm-spl to clean up board code,
The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.
Signed-off-by: Peng Fan <[email protected]>
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Marked related nodes as u-boot,dm-spl for serial driver model
Enable CONFIG_DM_SERIAL
Signed-off-by: Peng Fan <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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Marked related nodes as u-boot,dm-spl for serial driver model
Enable CONFIG_DM_SERIAL
Signed-off-by: Peng Fan <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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Marked related nodes as u-boot,dm-spl for serial driver model
Enable CONFIG_DM_SERIAL
Signed-off-by: Peng Fan <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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Move some common changes to imx8mq-u-boot.dtsi, so others could reuse it
Signed-off-by: Peng Fan <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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Enable CONFIG_SPL_DM_SERIAL. uart and its pinmux was already
marked with u-boot,dm-spl.
Move preloader_console_init after spl_early_init to make sure driver
model work.
Signed-off-by: Peng Fan <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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Enable CONFIG_DM_SERIAL. uart2 and its pinmux was already
marked with u-boot,dm-spl.
Signed-off-by: Peng Fan <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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commit 61cf22505339 ("board: gateworks: gw_ventana: use comomn GSC driver")
moved to the common GSC driver and moved remaining board-specific
functions to eeprom.c. The functions in gsc.c are no longer used and it
was removed from the Makefile but the file itself was not removed.
Remove it now.
Signed-off-by: Tim Harvey <[email protected]>
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The MaxLinear GPY111 PHY is being used on some boards due to part
availability. Add support for this PHY which requires a longer reset
post-delay and RGMII delay configuration.
Signed-off-by: Tim Harvey <[email protected]>
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The uart2 and its pinmux are already marked with u-boot,dm-spl but we
need to move the call to preloader_console_init() after spl_early_init()
to avoid a board hang as dm can't be used until after spl_early_init()
due to the uart driver not enabling the uart clock.
Remove the manual config of the UART pinmux now that it is no longer
needed.
Signed-off-by: Tim Harvey <[email protected]>
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FEC_QUIRK_ENET_MAC is defined in the imx-regs.h include file and thus
does not need to be defined in the various board config includes.
Signed-off-by: Tim Harvey <[email protected]>
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The IMX8MP SoC FEC needs to have the FEC_QUIRK_ENET_MAC defined.
Fixes: commit 2395625209cc ("board: gateworks: venice: add imx8mp-venice-gw740x support")
Signed-off-by: Tim Harvey <[email protected]>
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The IMX8M based Venice boards all have device-tree fec nodes that
use proper dt with a phy-handle pointing to a phy with reg assigned
to the proper phy address.
There is no need to keep using the CONFIG_FEC_MXC_PHYADDR hack when
a proper dt is used - remove it.
Signed-off-by: Tim Harvey <[email protected]>
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All i.MX8M needs TZASC ID SWAP set and locked, no need the check to
waste cpu cycles.
Signed-off-by: Peng Fan <[email protected]>
Reviewed-by: Andrey Zhizhikin <[email protected]>
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With rpoc_att, bootaux able to kick elf file for M core
Signed-off-by: Peng Fan <[email protected]>
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To i.MX8, M core stack is pre-coded in source code, so need to get it
before kicking M core. The stack pointer is stored in the first word of
the first PT_LOAD section __isr_vector. So use a num to index the
section loading.
Signed-off-by: Peng Fan <[email protected]>
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Add missing newline
Signed-off-by: Peng Fan <[email protected]>
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Use if (CONFIG_IS_ENABLED()) to make code cleaner
Enable elf support for i.MX8M
Signed-off-by: Peng Fan <[email protected]>
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I was trying to employ lpddr4_mr_read() to something similar to what
the imx8mm-cl-iot-gate board is doing for auto-detecting the RAM
type. However, the version in drivers/ddr/imx/imx8m/ddrphy_utils.c
differs from the private one used by that board in how it extracts the
byte value, and I was only getting zeroes. Adding a bit of debug
printf'ing gives me
tmp = 0x00ffff00
tmp = 0x00070700
tmp = 0x00000000
tmp = 0x00101000
and indeed I was expecting a (combined) value of 0xff070010 (0xff
being Manufacturer ID for Micron). I can't find any documentation that
says how the values are supposed to be read, but clearly the iot-gate
definition is the right one, both for its use case as well as my
imx8mp-based board.
So lift the private definition of lpddr4_mr_read() from the
imx8mm-cl-iot-gate board code to ddrphy_utils.c, and add a declaration
in the ddr.h header where e.g. get_trained_CDD() is already declared.
This has only been compile-tested for the imx8mm-cl-iot-gate
board (since I don't have the hardware), but since I've merely moved
its definition of lpddr4_mr_read(), I'd be surprised if it changed
anything for that board.
Signed-off-by: Rasmus Villemoes <[email protected]>
Tested-by: Ying-Chun Liu (PaulLiu) <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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Introduce helper macro UART_BASE_ADDR(n), which returns Nth UART base
address. Convert all board configurations to this new macro. This is the
first step toward switching CONFIG_MXC_UART_BASE to Kconfig. This is a
clean up, no functional change.
The new macro contains compile-time test to verify N is in suitable
range. The test works such that it multiplies constant N by constant
double-negation of size of a non-empty structure, i.e. it multiplies
constant N by constant 1 in each successful compilation case.
The non-empty structure may contain C11 _Static_assert(), make use of
this and place the kernel variant of static assert in there, so that
it performs the compile-time check for N in the correct range. Note
that it is not possible to directly use static_assert in compound
statements, hence this convoluted construct.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Peng Fan <[email protected]>
Cc: Stefano Babic <[email protected]>
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Introduce helper macro UART_BASE_ADDR(n), which returns Nth UART base
address. Convert all board configurations to this new macro. This is the
first step toward switching CONFIG_MXC_UART_BASE to Kconfig. This is a
clean up, no functional change.
The new macro contains compile-time test to verify N is in suitable
range. The test works such that it multiplies constant N by constant
double-negation of size of a non-empty structure, i.e. it multiplies
constant N by constant 1 in each successful compilation case.
The non-empty structure may contain C11 _Static_assert(), make use of
this and place the kernel variant of static assert in there, so that
it performs the compile-time check for N in the correct range. Note
that it is not possible to directly use static_assert in compound
statements, hence this convoluted construct.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Peng Fan <[email protected]>
Cc: Stefano Babic <[email protected]>
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Introduce helper macro UART_BASE_ADDR(n), which returns Nth UART base
address. Convert all board configurations to this new macro. This is the
first step toward switching CONFIG_MXC_UART_BASE to Kconfig. This is a
clean up, no functional change.
The new macro contains compile-time test to verify N is in suitable
range. The test works such that it multiplies constant N by constant
double-negation of size of a non-empty structure, i.e. it multiplies
constant N by constant 1 in each successful compilation case.
The non-empty structure may contain C11 _Static_assert(), make use of
this and place the kernel variant of static assert in there, so that
it performs the compile-time check for N in the correct range. Note
that it is not possible to directly use static_assert in compound
statements, hence this convoluted construct.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Peng Fan <[email protected]>
Cc: Stefano Babic <[email protected]>
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The "mmc dev ${mmcdev}" command is done twice.
Remove one ocurrence to avoid the duplication.
Signed-off-by: Fabio Estevam <[email protected]>
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The "mmc dev ${mmcdev}" command is done twice.
Remove one ocurrence to avoid the duplication.
Signed-off-by: Fabio Estevam <[email protected]>
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rng driver enabled to read random number using caam.
Signed-off-by: Gaurav Jain <[email protected]>
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The I2C2 has SMBus device SMSC USB2514Bi connected to it, the device is
capable of up to 100 kHz operation. Reduce the bus frequency to 100 kHz
to guarantee this I2C device can work correctly.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Peng Fan <[email protected]>
Cc: Stefano Babic <[email protected]>
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When trying to boot via USB on i.MX8MN it is necessary to specify
the U-Boot environment location, otherwise the boot process simply
hangs.
Specify the environment location when booting from USB.
Tested on a imx8mn-evk.
Suggested-by: Michael Nazzareno Trimarchi <[email protected]>
Signed-off-by: Fabio Estevam <[email protected]>
Tested-By: Tim Harvey <[email protected]>
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Add USB Mass Storage support, which is a convenient way to flash
the eMMC card, for example.
Signed-off-by: Fabio Estevam <[email protected]>
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RNG Hardware error is reported due to incorrect entropy delay
rng self test are run to determine the correct ent_dly.
test is executed with different voltage and temperature to identify the
worst case value for ent_dly. after adding a margin value(1000),
ent_dly should be at least 12000.
Signed-off-by: Gaurav Jain <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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Because mxs_nand_spl driver does not support DM, to use the minimum ECC
layout, it needs to handle the CONFIG_NAND_MXS_USE_MINIMUM_ECC.
Signed-off-by: Ye Li <[email protected]>
Reviewed-by: Han Xu <[email protected]>
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Waiting for SR_BUSY bit when receiving a new command is not needed.
SR_BUSY bit is already managed in the previous command treatment.
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
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Currently, SR_TCF flag is checked in case there is data, this criteria
is not correct.
SR_TCF flags is set when programmed number of bytes have been transferred
to the memory device ("bytes" comprised command and data send to the
SPI device).
So even if there is no data, we must check SR_TCF flag.
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
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The Avenger96 board comes in multiple regulator configurations.
- rev.100 or rev.200 have Buck3 preconfigured to 3V3 operation on
boot and contains extra Enpirion EP53A8LQI DCDC converter which
supplies the IO. Reduce Buck3 voltage to 2V9 to not waste power.
- rev.200L have Buck3 preconfigured to 1V8 operation and have no
Enpirion EP53A8LQI DCDC anymore, the IO is supplied from Buck3.
Configure the Buck3 voltage on this board per PMIC NVM settings and
update buck3 voltage limits in DT passed to OS before booting OS to
prevent potential hardware damage.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Patrice Chotard <[email protected]>
Cc: Patrick Delaunay <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
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- Misc Kconfig cleanups (Chris & Pali)
- turris_omnia: Fix hangup in debug UART (this introduces
TPL/SPL_DEBUG_UART_BASE) Pali
- mvebu: uDPU: include fixed-phy support (Robert)
- pinctrl: probe pinctrl drivers during post-bind (Robert)
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