| Age | Commit message (Collapse) | Author |
|---|
|
.interp section is not available in output ELF binary and SIZEOF_HEADERS is
needed at all.
There is no change in generated u-boot.bin binary.
Signed-off-by: Pali Rohár <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
|
|
Signed-off-by: Priyanka Jain <[email protected]>
|
|
mpc85xx SPL NAND linker script u-boot-nand_spl.lds is not used since
Jun 2014 commit 0234446fd171 ("nand_spl: remove MPC8536DS support").
Remove it.
Signed-off-by: Pali Rohár <[email protected]>
[Rebased]
Signed-off-by: Priyanka Jain <[email protected]>
|
|
Currently CONFIG_OF_SEPARATE is completely broken and U-Boot for some
mpc85xx board (e.g. P2020) has to be compiled with CONFIG_OF_EMBED.
Otherwise it crashes during early init.
When debug console is enabled and all debug logging options are turned on
then U-Boot on P2020 with CONFIG_OF_SEPARATE prints following error:
No valid device tree binary found at 110dc300
initcall sequence 110d3560 failed at call 1109535c (err=-1)
### ERROR ### Please RESET the board ###
Problem is with appended DTB. When CONFIG_SYS_MPC85XX_NO_RESETVEC is set
U-Boot binary image without DTB ends immediately after the .u_boot_list
section. At this position is defined _end symbol at which U-Boot expects
start of the appended DTB.
Problem is that after .u_boot_list section are in linker script defined
another sections with 256 byte long padding which are completely empty.
During conversion of U-Boot ELF binary to RAW binary u-boot-nodtb.bin,
objcopy removes trailing zero padding and therefore DTB is appended at
wrong position.
Changing alignment from 256 bytes to 4 bytes fixes this issue. And appended
DTB is finally at he correct position. With this fix U-Boot on P2020 with
CONFIG_OF_SEPARATE option starts working again.
Signed-off-by: Pali Rohár <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
|
|
For compatibility with Linux kernel DTS files and also with other U-Boot
powerpc DTS files, rename esdhc@2e000 node to sdhc@2e000 in p1020-post.dtsi
and p2020-post.dtsi include files.
Linux kernel DTS files which include these dtsi files, expect that esdhc
node has name sdhc@2e000 and do not work with other node names.
Signed-off-by: Pali Rohár <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
|
|
This node is required for NAND and NOR support. Node is taken from the
upstream Linux kernel DTS file.
Signed-off-by: Pali Rohár <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
|
|
QorIQ pre-PBL BootROM scans first 24 SD card sectors (each with fixed 512
bytes length) for boot signature. Implement same redundancy behavior in
fsl_esdhc_spl driver to allow loading proper U-Boot when boot sector is not
the first one.
Signed-off-by: Pali Rohár <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
|
|
Signed-off-by: Pali Rohár <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
|
|
According to Linux kernel DT schema nand-controller.yaml, using DT property
nand-ecc-algo=bch is the correct way for specifying BCH as ECC algorithm.
Signed-off-by: Pali Rohár <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
|
|
Initialize ECC configuration after nand_scan_ident() call and only in case
nand_scan_ident() have not done it. nand_scan_ident() fills ECC
configuration from device tree.
Fixes usage of NAND_ECC_SOFT_BCH when it is specified in device tree.
Signed-off-by: Pali Rohár <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
|
|
This allows boards to specify NAND settings via standard DT properties.
Signed-off-by: Pali Rohár <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
|
|
This is needed for SW ECC.
Signed-off-by: Pali Rohár <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
|
|
Import pq3-duart-0.dtsi device tree include file from upstream Linux kernel
for P2020. This allows U-Boot to use P2020 device tree files from upstream
Linux kernel which reference serial0 or serial1 devices.
Signed-off-by: Pali Rohár <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
|
|
P2020 DTS files in upstream Linux kernel use fsl/p2020si-pre.dtsi and
fsl/p2020si-post.dtsi include device tree files.
Add symlinks for these include device tree files into U-Boot powerpc
directory and points them to U-Boot inline device tree files p2020.dtsi and
p2020-post.dtsi.
This allows to use P2020 DTS files from upstream Linux kernel in U-Boot.
Signed-off-by: Pali Rohár <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
|
|
When env support is disabled then usage of env_init() or env_relocate()
generates linker errors. So do not compile env_init() or env_relocate()
in SPL code when env support is disabled in SPL.
Signed-off-by: Pali Rohár <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
|
|
When env support is disabled then usage of env_get_f() generates linker
errors. So do not compile env_get_f() when env support is disabled (for
example when disabled only in SPL).
Signed-off-by: Pali Rohár <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
|
|
When env support is disabled then usage of env_get() generates linker
errors. So do not compile env_get() when env support is disabled (for
example when disabled only in SPL).
Signed-off-by: Pali Rohár <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
|
|
When CONFIG_LOGLEVEL is set to LOGL_DEBUG or higher then linker throws
error about undefined symbol mmc_mode_name(). So compile mmc_mode_name()
also when CONFIG_LOGLEVEL is set to LOGL_DEBUG or higher.
Signed-off-by: Pali Rohár <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
|
|
If env is stored on SD card then U-Boot SPL automatically calls mmc_init()
before it is going to load proper U-Boot from SD card.
If env is not stored on SD card then U-Boot SPL fails to read proper U-Boot
from SD card due to missing mmc_init() call.
So add missing mmc_init() call into fsl_esdhc_spl's mmc_boot() function.
It fixes booting from SD card on P2020 boards without env support in SPL.
mmc_init() returns early if card was already initialized, so there is no
issue with calling this function more times.
Signed-off-by: Pali Rohár <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
|
|
In pre-PBL header is stored size of code which BootROM copies from SD card
to L2/SRAM. This size has upper limit of L2 cache size. In most cases this
is size of U-Boot SPL or size of L2 cache.
Therefore this size in pre-PBL header cannot be used for determining size
of proper U-Boot.
So always use CONFIG_SYS_MMC_U_BOOT_SIZE for determining size of proper
U-Boot which stored on SD card.
Signed-off-by: Pali Rohár <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
|
|
Pre-PBL BootROMs (MPC8536E, MPC8569E, P2020, P1011, P1012, P1013, P1020,
P1021, P1022) require custom BOOT signature on sector 0 and MBR/DBR
signature is not required at all.
So add check for BOOT signature and remove check for MBR/DBR.
This allows U-Boot SPL to load proper U-Boot on pre-PBL BootROMs platforms
also from SD cards which do not have MBR/DBR signature on sector 0.
Signed-off-by: Pali Rohár <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
|
|
Distinguish between e500v1 and e500v2.
Signed-off-by: Pali Rohár <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
|
|
The real entry point is _start_e500. There is no _start symbol at all. So
rename _start_e500 to _start for convension that _start symbol is used as
entry point.
Signed-off-by: Pali Rohár <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
|
|
_start symbol contains only 32-bit data number 0x27051956 despite it is
marked as text section. This magic number is IH_MAGIC which is used for
marking uboot image header.
mpc85xx start.S code does not define valid uboot image header, so IH_MAGIC
number in _start symbol is useless there.
Moreover this _start symbol is not used at all. Entry point is at symbol
_start_e500.
So because this _start symbol is not used for anything, completely remove
it with IH_MAGIC number. After _start symbol was _start_cont symbol, so
replace all relative address calculations by _start_cont.
Signed-off-by: Pali Rohár <[email protected]>
[Rebased]
Signed-off-by: Priyanka Jain <[email protected]>
|
|
NXP/Freescale Layerscape CPUs support high-speed serial interfaces (SERDES)
that can be configured for the application. Interfaces not used by the
application can be set to protocol 0 to turn them off and save power, but
U-Boot would emit a warning that 0 was invalid for a SERDES protocol on
boot. Replace the warning text with a notice that the SERDES is disabled.
Signed-off-by: Stephen Carlson <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
|
|
Signed-off-by: Yuantian Tang <[email protected]>
Reviewed-by: Andre Przywara <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
|
|
For now, this only provides reset and poweroff functions.
Signed-off-by: Michael Walle <[email protected]>
[Rebased]
Signed-off-by: Priyanka Jain <[email protected]>
|
|
There is an user-selectable SYS_HAS_ARMV8_SECURE_BASE, which has the
same meaning but is just for the ls1043ardb board. As no in-tree config
uses this, drop it and replace it with something more sophiticated:
ARMV8_PSCI_RELOCATE. This option will then enable the ARMV8_SECURE_BASE
option which is used as the base to relocate the PSCI code (or any code
in the secure region, but that is only PSCI). A SoC (or board) can now
opt-in into having such a secure region by enabling
SYS_HAS_ARMV8_SECURE_BASE. Enable it for the LS1043A SoC, where it was
possible to relocate the PSCI code before as well as on the LS1028A SoC
where there will be PSCI support soon.
Additionally, make ARMV8_PSCI and SEC_FIRMWARE_ARMV8_PSCI exclusive.
Signed-off-by: Michael Walle <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
|
|
If we are running in EL2 skip PSCI implementation setup. This avoids an
exception if CONFIG_ARMV8_PSCI is set, but u-boot is started by TF-A.
Signed-off-by: Michael Walle <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
|
|
There are two different implementations to do a secure monitor call:
smc_call() and arm_smccc_smc(). The former is defined in fwcall.c and
seems to be an ad-hoc implementation. The latter is imported from linux.
smc_call() is also only available if CONFIG_ARMV8_PSCI is not defined.
This makes it impossible to have both PSCI calls and PSCI implementation
in one u-boot build. The layerscape SoC code decide at runtime via
check_psci() if there is a PSCI support. Therefore, this is a
prerequisite patch to add PSCI implementation support for the layerscape
SoCs.
Note, for the TFA part, this is only compile time tested with
(ls1028ardb_tfa_defconfig).
Signed-off-by: Michael Walle <[email protected]>
[Rebased]
Signed-off-by: Priyanka Jain <[email protected]>
|
|
psci_update_dt() is also required if CONFIG_ARMV8_PSCI is set, that is,
if u-boot is the PSCI provider.
Guard the check which is intended to call into the PSCI implementation
in the secure firmware, by the proper macro SEC_FIRMWARE_ARMV8_PSCI.
Mark the function as weak because - unfortunately - there is already
a stub of the same function in arch/arm/mach-rmobile/psci-r8a779a0.c
which does not the same as the common one.
Signed-off-by: Michael Walle <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
|
|
This erratum is reported to cause problems on these processors [1-3].
The problem is usually with the clocking, which is supposed to be
configured by the RCW [4]. However, if it is not set, or if the default
clocking is not correct, then this erratum will cause an SError.
However, according to Ran Wang in [1]:
" ... this erratum is used to pass USB compliance test only, you could
disable this workaround on your board if you don't any USB issue on
normal use case, I think it's fine."
So just disable this erratum by default for these processors.
[1] https://lore.kernel.org/all/[email protected]/
[2] https://community.nxp.com/t5/Layerscape/LS1046A-U-BOOT-HALT-AT-ERRATUM-A0090078/m-p/742993
[3] https://community.nxp.com/t5/QorIQ/Why-does-the-LS1043A-U-Boot-hang-at-code-that-fixes-erratum/m-p/644412
[4] https://source.codeaurora.org/external/qoriq/qoriq-components/rcw/tree/ls1046ardb/usb_phy_freq.rcw
Signed-off-by: Sean Anderson <[email protected]>
Acked-by: Ran Wang <[email protected]>
[Rebased]
Signed-off-by: Priyanka Jain <[email protected]>
|
|
Signed-off-by: Vyacheslav Bocharov <[email protected]>
Reviewed-by: Neil Armstrong <[email protected]>
Signed-off-by: Neil Armstrong <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
|
|
The impedance of the QSPI PCB lines on the sama7g5ek is 50 Ohms.
Align the output impedance of the QSPI0 HSIOs by setting a medium drive
strength which corresponds to an impedance of 56 Ohms when VDD is in the
3.0V - 3.6V range. The high drive strength setting corresponds to an
output impedance of 42 Ohms on the QSPI0 HSIOs.
This is just a fine tunning. The memory that we have populated on sama7g5ek
works fine even with high drive strength, but it's better to adjust it and
use medium instead, in case some other flashes with higher frequencies are
tested.
Suggested-by: Mihai Sain <[email protected]>
Signed-off-by: Tudor Ambarus <[email protected]>
|
|
QSPI1 used the clock of QSPI0, fix it.
Fixes: 5eecc37bb1 ("ARM: dts: at91: sama7g5: Add QSPI0 and OSPI1 nodes")
Signed-off-by: Tudor Ambarus <[email protected]>
|
|
Use the spi_mem_default_supports_op() core helper in order to take into
account the buswidth specified by the user in device tree.
Fixes: 24c8ff4684 ("spi: Add Atmel QuadSPI driver")
Signed-off-by: Tudor Ambarus <[email protected]>
|
|
With the commit that moves the BOOTCOMMAND to Kconfig:
970bf8603b ("Convert CONFIG_USE_BOOTCOMMAND et al to Kconfig")
some stray ifdefs have been left in the header files which
are now useless.
Clean up the include files to remove these lines.
Fixes: 970bf8603b ("Convert CONFIG_USE_BOOTCOMMAND et al to Kconfig")
Signed-off-by: Eugen Hristev <[email protected]>
|
|
Add DT node for pit64b support.
Signed-off-by: Durai Manickam KR <[email protected]>
|
|
This commit allows the ATMEL_PIT_TIMER driver to be unselected in SPL and be
selected in u-boot proper. The SPL can use a different timer.
By having a separate Kconfig for ATMEL_TCB in SPL, the size of the SPL
decreases by 0.3 KBytes.
Signed-off-by: Eugen Hristev <[email protected]>
|
|
This commit allows the ATMEL_TCB driver to be unselected in SPL and be
selected in u-boot proper. The SPL can use a different timer.
By having a separate Kconfig for ATMEL_TCB in SPL, the size of the SPL
decreases by 1 KByte.
Signed-off-by: Eugen Hristev <[email protected]>
|
|
This commit removes the default reset driver for armv7, since
it is no longer needed due to the presence of the SYSRESET driver.
Signed-off-by: Sergiu Moga <[email protected]>
|
|
This commit adds a condition to the Makefile so that whenever the SYSRESET
option is chosen in the configuration, the default reset driver is ignored.
Signed-off-by: Sergiu Moga <[email protected]>
|
|
This commit enables SYSRESET in the defconfigs for the
Atmel/Microchip platforms.
Signed-off-by: Sergiu Moga <[email protected]>
|
|
This patch adds a sysreset driver for Atmel/Microchip platforms.
Signed-off-by: Sergiu Moga <[email protected]>
Reviewed-by: Claudiu Beznea <[email protected]>
|
|
Add node for RSTC.
Signed-off-by: Sergiu Moga <[email protected]>
|
|
Add boot from SDMMC (sdcard) support for sam9x60_curiosity.
Signed-off-by: Durai Manickam KR <[email protected]>
|
|
Add dts and dtsi files.
Signed-off-by: Durai Manickam KR <[email protected]>
|
|
Add board files, Kconfig, Makefile and MAINTAINERS.
Signed-off-by: Durai Manickam KR <[email protected]>
|
|
Signed-off-by: Tom Rini <[email protected]>
|
|
Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <[email protected]>
|
