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2022-02-17arm: a37xx: espressobin: Move U-Boot specific partitions node to -u-boot.dtsiPali Rohár
U-Boot specific changes should be in armada-3720-espressobin-u-boot.dtsi DTS file. Signed-off-by: Pali Rohár <[email protected]> Reviewed-by: Stefan Roese <[email protected]>
2022-02-17arm: a37xx: Update sdhci pointers to official DT bindingsPali Rohár
In Linux kernel version of armada-37xx.dtsi file sdhci1 pointer refers to sdhci@d0000 node and sdhci0 pointer to sdhci@d8000 node. Signed-off-by: Pali Rohár <[email protected]> Reviewed-by: Stefan Roese <[email protected]>
2022-02-17arm: mvebu: turris_mox: Remove hardcoded ethernet node namesPali Rohár
Armada 3720 DTS files in upstream kernel use ethernet nodes named 'ethernet@30000' and 'ethernet@40000'. U-Boot have them named 'neta@30000' and 'neta@40000'. To have Turris Mox U-Boot board code independent of ethernet node names, find ethernet node via alias. Signed-off-by: Pali Rohár <[email protected]> Reviewed-by: Stefan Roese <[email protected]>
2022-02-17watchdog: armada_37xx: Convert to official DT bindingsPali Rohár
Official DT bindings have only one reg property: watchdog address space. Convert armada-37xx-wdt.c driver to offical DT bindings and access sel_reg register via MVEBU_REGISTER() macro, as its value (required by U-Boot driver) is not in DT yet. In later stage can be driver cleaned to not use it. This change would allow U-Boot to use A3720 watchdog DTS structure from Linux kernel. Signed-off-by: Pali Rohár <[email protected]> Reviewed-by: Stefan Roese <[email protected]>
2022-02-17usb: ehci: ehci-marvell: Update compatible string to official DT bindingsPali Rohár
Official DT bindings use compatible string marvell,armada-3700-ehci. Update drivers and DTS files. Signed-off-by: Pali Rohár <[email protected]> Reviewed-by: Stefan Roese <[email protected]>
2022-02-17phy: marvell: a3700: Update compatible string to official DT bindingsPali Rohár
In commit d368e1070514 ("phy: marvell: a3700: Convert to official DT bindings in COMPHY driver") was done update to official DT bindings but compatible string of official DT bindings was not updated. Fix it now. Fixes: d368e1070514 ("phy: marvell: a3700: Convert to official DT bindings in COMPHY driver") Signed-off-by: Pali Rohár <[email protected]> Reviewed-by: Stefan Roese <[email protected]>
2022-02-17rtc: ds1307: Add bindings for microchip, mcp7940xPali Rohár
Compatible string microchip,mcp7940x is used by Turris Mox DTS file in Linux kernel and U-Boot ds1307.c driver works fine with it. Signed-off-by: Pali Rohár <[email protected]> Reviewed-by: Stefan Roese <[email protected]>
2022-02-17tools: kwbimage: Fix dumping DATA registers for v0 imagesPali Rohár
End of DATA register section is indicated by zero value in both raddr and rdata. So do not stop dumping registers with non-zero address and zero value. And also print end of DATA registers section. Fixes: 1a8e6b63e24f ("tools: kwbimage: Dump kwbimage config file on '-p -1' option") Signed-off-by: Pali Rohár <[email protected]> Reported-by: Tony Dinh <[email protected]> Tested-by: Tony Dinh <[email protected]> Reviewed-by: Stefan Roese <[email protected]>
2022-02-17arm: a37xx: pci: Ensure that root port is always on root zero busPali Rohár
Writing to the PCI_PRIMARY_BUS register of the root port should not change bus number on which is root port present. This PCI_PRIMARY_BUS register is used only for correct configuration of legacy PCI stuff, like forwarding of PCI special cycles between buses. Aardvark HW does not support PCI special cycles, so it does not have HW register for PCI_PRIMARY_BUS and therefore it does not matter what is stored in this register. So fix this issue and do not use PCI_PRIMARY_BUS register in pci-aardvark.c driver for moving root bus of the root port. After this change there is no reason for storing bus number (zero) into first_busno variable, so remove this variable. Signed-off-by: Pali Rohár <[email protected]> Fixes: cb056005dc67 ("arm: a37xx: pci: Add support for accessing PCI Bridge on root bus") Reviewed-by: Stefan Roese <[email protected]>
2022-02-17arm: a37xx: pci: Use dev_read_addr()Pali Rohár
There is only one base address, so use dev_read_addr() instead of dev_read_addr_index(). Signed-off-by: Pali Rohár <[email protected]> Reviewed-by: Stefan Roese <[email protected]>
2022-02-17arm: a37xx: pci: Cleanup macro namesPali Rohár
Remove "PCI_" prefix from all macros which are aardvark specific to not conflict with macros defined in global include file pci.h. Instead add "ADVK_" prefix for them so it is visible that they are aardvark specific. After "ADVK_" prefix append keyword which describes register group, so it would be clear to which register each macro value belongs. Rename some macros for consistency with other macros. Signed-off-by: Pali Rohár <[email protected]> Reviewed-by: Stefan Roese <[email protected]>
2022-02-17arm: a37xx: pci: Use standard register macros from pci.hPali Rohár
PCI config space of the aardvark PCIe Root Port is available only in internal aardvark memory space starting at offset 0x0. PCI Express registers (PCI_EXP_*) start at offset 0xc0. And Advanced Error Reporting registers (PCI_ERR_*) start at offset 0x100. Replace custom aardvark register macros by standard PCI macros from include/pci.h file with fixed offset. Some DEVCTL and AER macros are not defined in include/pci.h file, so define them in the same way as in linux uapi header file pci_regs.h. Signed-off-by: Pali Rohár <[email protected]> Reviewed-by: Stefan Roese <[email protected]>
2022-02-16Merge branch 'master' of git://source.denx.de/u-boot-usbTom Rini
2022-02-16Merge branch '2022-02-16-add-TI-J721E-SK'Tom Rini
- Add TI J721E SK support
2022-02-16arm: dts: k3-j721e-r5-sk: Update R5 DT to pick the new DDR configSinthu Raja
A new lpddr4 configuration is introduced for J7 SK with 4266 MTs data rate. Therefore, update the R5 DTS file to point to the new DDR config file. Signed-off-by: Sinthu Raja <[email protected]>
2022-02-16arm: dts: k3-j721e-sk: EMIF tool update to 0.6.1 with 4266MTs for lpddr4Sinthu Raja
EMIF tool for J721E SK is now updated to 0.6.1 that includes * Updated write DQ training pattern to enable user pattern and clock pattern (from 0x7 to 0x6). * Updated IO drive strength to 40-80-80 Ohms. J721E SK uses the lpddr4 configuration of 4266 MTs data rate which is the same as J721E EVM but facing random failures. As the tool update is specific to the SK board, add a new lpddr4 config of 4266 MTs. Signed-off-by: Kevin Scholz <[email protected]> Signed-off-by: Sinthu Raja <[email protected]>
2022-02-16include: configs: Update env for selecting right dtbSinthu Raja
Now that single defconfig can be used for booting J721E EVM and SK, default device tree will not work for selecting dtb for kernel. Update the findfdt env to select right dtb based on board_name env variable. Signed-off-by: Sinthu Raja <[email protected]>
2022-02-16configs: j721e_evm: Store env in MMC FAT partitionSinthu Raja
Enable defconfigs relevant for storing env on FAT partion of MMC. Signed-off-by: Sinthu Raja <[email protected]>
2022-02-16configs: j721e_evm_a72: Align OSPI partitions on erase block boundarySinthu Raja
S28HS512T on TI SK has sector size of 256KB, so update OSPI partition to align on 256KB sector size. Since the sector size for MT35XU512ABA on EVM is 128KB, partitions will remain aligned for EVM. Also, now since the sector size is 256KB ospi.env.backup will collide with ospi.sysfw, so move ospi.env.backup to the padding space (0x7C0000) before ospi.rootfs partition. Signed-off-by: Sinthu Raja <[email protected]>
2022-02-16configs: j721e_evm_a72: Add SK dtb as part of DTB FITSinthu Raja
Add k3-j721e-sk dtb along with other dtbs inside DTB FIT image. Signed-off-by: Sinthu Raja <[email protected]>
2022-02-16configs: j721e_evm_r5: Enable support for building multiple dtbs into FITSinthu Raja
Enable configs for building multiple dtbs into a single fit image and load the right dtb for next stage. This will help to use same defconfig for both J721E EVM and SK boards. Signed-off-by: Sinthu Raja <[email protected]>
2022-02-16arm: dts: k3-j721e-r5-sk: Add initial R5 specific dts support for j721e-skSinthu Raja
Add R5 specific dts for J721E-SK Signed-off-by: Sinthu Raja <[email protected]>
2022-02-16arm: dts: k3-j721e-sk: Add initial A72 specific dts supportSinthu Raja
J721E Starter Kit (SK)[1] is a low cost, small form factor board designed for TI’s J721E SoC. TI’s J721E SoC comprises of dual core A72, high performance vision accelerators, video codec accelerators, latest C71x and C66x DSP, high bandwidth real-time IPs for capture and display, GPU, dedicated safety island and security accelerators. The SoC is power optimized to provide best in class performance for industrial and automotive applications. J721E SK supports the following interfaces: * 4 GB LPDDR4 RAM * x1 Gigabit Ethernet interface * x1 USB 3.0 Type-C port * x3 USB 3.0 Type-A ports * x1 PCIe M.2 E Key * x1 PCIe M.2 M Key * 512 Mbit OSPI flash * x2 CSI2 Camera interface (RPi and TI Camera connector) * 40-pin Raspberry Pi GPIO header Add A72 specific dts for J721E-SK. [1] https://www.ti.com/tool/SK-TDA4VM Signed-off-by: Sinthu Raja <[email protected]>
2022-02-16arm: dts: k3-j721e-r5-common-proc-board: Do not use power-domains for I2CSinthu Raja
Board ID I2C EEPROM will be probed before SYSFW is available. So drop the power-domains property for wakup_i2c0 on which board ID EEPROM is connected. Signed-off-by: Sinthu Raja <[email protected]>
2022-02-16arm: j721e: Add support for selecting DT based on board nameSinthu Raja
Enable support for selecting DTB from FIT within SPL based on the board name read from EEPROM. This will help to use single defconfig for both EVM and SK. Signed-off-by: Sinthu Raja <[email protected]>
2022-02-16board: ti: j721e: Add support for detecting multiple device treesSinthu Raja
Update the board_fit_config_name_match() to choose the right dtb based on the board name read from EEPROM. Also restrict multpile EEPROM reads by verifying if EEPROM is already read. Signed-off-by: Sinthu Raja <[email protected]>
2022-02-16board: ti: j721e: Disable probing of daughtercardsSinthu Raja
j721e-sk doesn't have any daughter cards, so disable daughter card probing inside board_late_init() and spl_board_init() for j721e-sk. Signed-off-by: Sinthu Raja <[email protected]>
2022-02-16board: ti: j721e: Add support to update board_name for j721e-skSinthu Raja
Update setup_board_eeprom_env() to choose the right board name for j721e-sk. Signed-off-by: Sinthu Raja <[email protected]>
2022-02-16board: ti: j721e: Enable support for reading EEPROM at next alternate addressSinthu Raja
J721E EVM has EEPROM populated at 0x50. J721E SK has EEPROM populated at next address 0x51 in order to be compatible with RPi. So start looking for TI specific EEPROM at 0x50, if not found look for EEPROM at 0x51. Signed-off-by: Sinthu Raja <[email protected]>
2022-02-16board: ti: j721e: Guard functions with right #ifdef to avoid build warningsSinthu Raja
board_late_init(), setup_board_eeprom_env() and setup_serial() is called only under CONFIG_BOARD_LATE_INIT, so guard these functions with the same. Also, reorder these functions to place it under single #ifdef Signed-off-by: Sinthu Raja <[email protected]>
2022-02-16drivers: power: regulator: tps65941_regulator: Add support for 3Phase buckSinthu Raja
Buck regulator 1, 2 and 3 of TPS6594132 on j721e-sk is in 3 Phase confguration, in-order to support this, add configuring 3 Phase buck in tps65941 while driver probing. Signed-off-by: Sinthu Raja <[email protected]> Acked-by: Jaehoon Chung <[email protected]>
2022-02-16drivers: power: pmic: Add support for tps659412 PMICSinthu Raja
Since TPS659412 and TPS659413 are both software compatible, add a compatible string for the same inside tps65941.c. Signed-off-by: Sinthu Raja <[email protected]> Acked-by: Jaehoon Chung <[email protected]>
2022-02-16fdtdec.h: Remove gurads around fdtdec_resetup functionTom Rini
This function has not been conditionally compiled for some time, so remove the incorrect guards around the declaration. Signed-off-by: Tom Rini <[email protected]>
2022-02-16usb: xhci: reset endpoint on USB stallStefan Agner
There are devices which cause a USB stall when trying to read strings. Specifically Arduino Mega R3 stalls when trying to read the product string. The stall currently remains unhandled, and subsequent retries submit new transfers on a stopped endpoint which ultimately cause a crash in abort_td(): WARN halted endpoint, queueing URB anyway. XHCI control transfer timed out, aborting... Unexpected XHCI event TRB, skipping... (3affe040 00000000 13000000 02008401) BUG at drivers/usb/host/xhci-ring.c:505/abort_td()! BUG! resetting ... Linux seems to be able to recover from the stall by issuing a TRB_RESET_EP command. Introduce reset_ep() which issues a TRB_RESET_EP followed by setting the transfer ring dequeue pointer via TRB_SET_DEQ. This allows to properly recover from a USB stall error and continue communicating with the USB device. Signed-off-by: Stefan Agner <[email protected]>
2022-02-16usb: dwc3: core: stop the core when it's removedAngus Ainslie
If u-boot doesn't stop the core when it's finished with it then linux can't find it. Signed-off-by: Angus Ainslie <[email protected]>
2022-02-16usb: dwc3: dwc3-generic: check the parent nodesAngus Ainslie
The kernel devicetree has definitions for port and hub nodes as subnodes to the USB devices. These subnodes don't contain all of the data required to properly configure the dwc3. Check the parent nodes if the data is not in the port/hub node. Here's an example from the librem5 kernel dts file &usb_dwc3_0 { #address-cells = <1>; #size-cells = <0>; dr_mode = "otg"; snps,dis_u3_susphy_quirk; status = "okay"; port@0 { reg = <0>; typec_hs: endpoint { remote-endpoint = <&usb_con_hs>; }; }; port@1 { reg = <1>; typec_ss: endpoint { remote-endpoint = <&usb_con_ss>; }; }; }; &usb_dwc3_1 { dr_mode = "host"; status = "okay"; #address-cells = <1>; #size-cells = <0>; /* Microchip USB2642 */ hub@1 { compatible = "usb424,2640"; reg = <1>; #address-cells = <1>; #size-cells = <0>; mass-storage@1 { compatible = "usb424,4041"; reg = <1>; }; }; }; Signed-off-by: Angus Ainslie <[email protected]>
2022-02-15microblaze: exception: fix unaligned data access register maskOvidiu Panait
The correct mask for getting the source/destination register from ESR in the case of an unaligned access exception is 0x3E0. With this change, a dummy unaligned store produces the expected info: """ >> swi r5, r0, 0x111 ... Hardware exception at 0x111 address Unaligned data access exception Unaligned word access Unaligned store access Register R5 Return address from exception 0x7f99dfc ### ERROR ### Please RESET the board ### """ Signed-off-by: Ovidiu Panait <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2022-02-15microblaze: exception: move unaligned access printfs inside switch caseOvidiu Panait
The unaligned access messages are only valid in the case of an unaligned data access exception. Do not print them for other types of hw exceptions. Signed-off-by: Ovidiu Panait <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2022-02-15microblaze: exception: fix return address for delay slot exceptionsOvidiu Panait
According to the MicroBlaze reference manual (xilinx2021.2/ug984/page-37): """ If an exception is caused by an instruction in a delay slot (that is, ESR[DS]=1), the exception handler should return execution to the address stored in BTR instead of the normal exception return address stored in R17. """ Adjust the code to print the proper return address for delay slot exceptions. Signed-off-by: Ovidiu Panait <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2022-02-15microblaze: exception: fix delay slot exception handlingOvidiu Panait
The switch statement in _hw_exception_handler() only covers the rightmost 5 bits that encode the exception cause: switch (state & 0x1f) { ... } For this reason, the "0x1000" case will never be reached, because the 13th bit was zeroed out. To fix this, move delay slot exception handling before the switch statement (delay slot (DS) bit in Exception Status Register is independent of the exception cause (EC)). Signed-off-by: Ovidiu Panait <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2022-02-15microblaze: exception: migrate MICROBLAZE_V5 to KconfigOvidiu Panait
Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2022-02-15microblaze: exception: move privileged instruction exception out of v5 ifdefOvidiu Panait
The privileged instruction exception seems to have been introduced in microblaze v7.00 along with MMU support, so having it wrapped in MICROBLAZE_v5 ifdefs seems incorrect. Move it out of the ifdef, since all recent microblaze versions support it. Signed-off-by: Ovidiu Panait <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2022-02-15xilinx: Remove GPIO_EXTRA_HEADER selectionMichal Simek
Platform specific headers are empty that's why there is no need to include them. That's why remove them for Zynq/ZynqMP and Versal. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/625b1be0b813e2b9a5323c0529f9c567bfe13e75.1643960446.git.michal.simek@xilinx.com
2022-02-15video: Add missing dependency for DM_GPIOMichal Simek
Seps driver also requires DM_GPIO to be enabled. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/da8c25c19e5c723ed16a2a6b8494dfb967328567.1643960212.git.michal.simek@xilinx.com
2022-02-15scsi: ceva: Enable PHY and reset supportMichal Simek
Add phy and reset support for ceva sata IP. Phy and reset are optional properties that's why detect if description is available. If not just continue with operation. This code was tested on Xilinx Kria SOM kv260-revA with sata connector populated. Signed-off-by: Michal Simek <[email protected]> Reviewed-by: Vladimir Oltean <[email protected]> Link: https://lore.kernel.org/r/eb3adf649be866aab19fc70ecc0fc8921545b1ac.1644226590.git.michal.simek@xilinx.com
2022-02-15phy: zynqmp: Add support for sata and DP phy initializationMichal Simek
DP is untested but just c&p from Linux driver. Sata is tested on kv260-revA board which has SATA connector populated. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/d231610160e76a2ad1b4a163e0e8db0ddc4733e2.1644226590.git.michal.simek@xilinx.com
2022-02-15arm64: zynqmp: Add command for disabling loading other overlaysMichal Simek
Add command "zynqmp pmufw node close" to disable permission to load additional pmufw config overlays. This command will make sure that any other sw will ask for changing permission. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/cfa5cc7909eb8deb23eb0f11c26954cbaddeb861.1642163135.git.michal.simek@xilinx.com
2022-02-15xilinx: firmware: Introduce zynqmp_pmufw_node() for loading PMU fragmentsMichal Simek
Introduce zynqmp_pmufw_node() for loading PMU configuration fragment for enabling IPs. Firmware driver has small overlay where NODE id is added and config fragment is sent to PMUFW. There is a need to build PMUFW with fragment support. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/636e8150bd4e2b1f988d59795772c685ceeec083.1642163135.git.michal.simek@xilinx.com
2022-02-15power: zynqmp: Add power domain driver for ZynqMPMichal Simek
Driver should be enabled by CONFIG_POWER_DOMAIN=y and CONFIG_ZYNQMP_POWER_DOMAIN=y. Power domain driver doesn't have own DT node but it uses zynqmp firmware DT node that's why there is a need to bind driver when firmware node is found. Driver itself is simple. It is sending pmufw config object overlay for enabling access to device which is done in ...domain_request(). In ...domain_on() capabilities are passed and node is requested. This should be bare minimum of required to get power domain driver working. Signed-off-by: Michal Simek <[email protected]> Reviewed-by: Jaehoon Chung <[email protected]> Link: https://lore.kernel.org/r/f4b9433b91c0b18c375b061c7a4e29d428f70547.1644226055.git.michal.simek@xilinx.com
2022-02-15tools/zynqmp_pm_cfg_obj_convert.py: fix build with Vivado 2021.xLuca Ceresoli
This tool fails with a pm_cfg_obj.c file generated by Vitis 2021.2. This is because that version of Vitis added the PM_CONFIG_OBJECT_TYPE_BASE that was not previously generated, thus the script does not implement it. Reported-by: Neal Frager <[email protected]> [report: https://lists.buildroot.org/pipermail/buildroot/2022-February/636639.html] Signed-off-by: Luca Ceresoli <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
generated by cgit v1.3.1 (git 2.54.0) at 2026-09-01 03:19:59 +0000