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2022-02-08board: ti: j721e: evm.c: Add support for probing SerDes0Aswath Govindraju
Add support for probing, initializing and powering, SerDes0 instance. Signed-off-by: Aswath Govindraju <[email protected]>
2022-02-08phy: ti: phy-j721e-wiz.c: Fix the condition for setting P_ENABLE_FORCEAswath Govindraju
Fix the condition for setting P_ENABLE_FORCE bit, by syncing with the driver in kernel. Signed-off-by: Aswath Govindraju <[email protected]>
2022-02-08phy: cadence: Sierra: Model PLL_CMNLC and PLL_CMNLC1 as a clockAswath Govindraju
Sierra has two PLLs, PLL_CMNLC and PLL_CMNLC1 and each of these PLLs has two inputs, plllc_refclk (input from pll0_refclk) and refrcv (input from pll1_refclk). Model PLL_CMNLC and PLL_CMNLC1 as a clock so that it's possible to select one of these two inputs from device tree. Signed-off-by: Aswath Govindraju <[email protected]>
2022-02-08phy: cadence: Sierra: Add a UCLASS_PHY device for linksAswath Govindraju
Add a driver of type UCLASS_PHY for each of the link nodes in the serdes instance. Signed-off-by: Aswath Govindraju <[email protected]>
2022-02-08phy: cadence: Sierra: Add missing clk_disable_unprepare() in .remove callbackKishon Vijay Abraham I
Add missing clk_disable_unprepare() in cdns_sierra_phy_remove(). Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Aswath Govindraju <[email protected]>
2022-02-08phy: cadence: Sierra: Add array of input clocks in "struct cdns_sierra_phy"Kishon Vijay Abraham I
Instead of having separate structure members for each input clock, add an array for the input clocks within "struct cdns_sierra_phy". This is in preparation for adding more input clocks required for supporting additional clock combination. Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Aswath Govindraju <[email protected]>
2022-02-08phy: cadence: Sierra: Move all reset_control_get*() to a separate functionKishon Vijay Abraham I
No functional change. Group devm_reset_control_get() and devm_reset_control_get_optional() to a separate function. Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Aswath Govindraju <[email protected]>
2022-02-08phy: cadence: Sierra: Move all clk_get_*() to a separate functionKishon Vijay Abraham I
No functional change. Group all devm_clk_get_optional() to a separate function. Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Aswath Govindraju <[email protected]>
2022-02-08phy: cadence: Sierra: Create PHY only for "phy" or "link" sub-nodesKishon Vijay Abraham I
Cadence Sierra PHY driver registers PHY using devm_phy_create() for all sub-nodes of Sierra device tree node. However Sierra device tree node can have sub-nodes for the various clocks in addtion to the PHY. Use devm_phy_create() only for nodes with name "phy" (or "link" for old device tree) which represent the actual PHY. Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Aswath Govindraju <[email protected]>
2022-02-08phy: cadence: Sierra: Fix PHY power_on sequenceKishon Vijay Abraham I
Commit 39b823381d9d ("phy: cadence: Add driver for Sierra PHY") de-asserts PHY_RESET even before the configurations are loaded in phy_init(). However PHY_RESET should be de-asserted only after all the configurations has been initialized, instead of de-asserting in probe. Fix it here. Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Aswath Govindraju <[email protected]>
2022-02-08phy: cadence: sierra: Fix for USB3 U1/U2 stateSanket Parmar
Updated values of USB3 related Sierra PHY registers. This change fixes USB3 device disconnect issue observed while enternig U1/U2 state. Signed-off-by: Sanket Parmar <[email protected]> Signed-off-by: Aswath Govindraju <[email protected]>
2022-02-08dts: am57xx*: Add ipu early boot DT changesKeerthy
Add support for ipu early boot. Signed-off-by: Keerthy <[email protected]> Signed-off-by: Amjad Ouled-Ameur <[email protected]>
2022-02-08arm: dts: dra7*/am57xx-idk-evm-u-boot: Add ipu early boot DT changesKeerthy
Add support for ipu early boot. Signed-off-by: Keerthy <[email protected]> Signed-off-by: Amjad Ouled-Ameur <[email protected]>
2022-02-08arm: dts: dra7: Add ipu and related nodesKeerthy
Add ipu and the associated nodes. Signed-off-by: Keerthy <[email protected]> Signed-off-by: Amjad Ouled-Ameur <[email protected]>
2022-02-08dts: dra7-ipu-common-early-boot.dtsi: Add all the ipu early boot related nodesKeerthy
Add all the ipu early boot related nodes Signed-off-by: Keerthy <[email protected]> Signed-off-by: Amjad Ouled-Ameur <[email protected]>
2022-02-08remoteproc: ipu: Add driver to bring up ipuKeerthy
The driver enables IPU support. Basically enables the clocks, timers, watchdog timers and bare minimal MMU and supports loading the firmware from mmc. Signed-off-by: Keerthy <[email protected]> [Amjad: fix compile warnings] Signed-off-by: Amjad Ouled-Ameur <[email protected]>
2022-02-08remoteproc: uclass: Add remoteproc resource handling helpersKeerthy
Add remoteproc resource handling helpers. These functions are primarily to parse the resource table and to handle different types of resources. Carveout, devmem, trace & vring resources are handled. Signed-off-by: Keerthy <[email protected]> [Amjad: fix redefinition of "struct resource_table" and compile warnings ] Signed-off-by: Amjad Ouled-Ameur <[email protected]>
2022-02-08linux: bitmap.h: Add find_next_zero_area functionKeerthy
Add find_next_zero_area to fetch the next zero area in the map. Signed-off-by: Keerthy <[email protected]> Signed-off-by: Amjad Ouled-Ameur <[email protected]>
2022-02-08drivers: misc: Makefile: Enable fs_loader compilation at SPL LevelKeerthy
Enable fs_loader compilation at SPL Level. Signed-off-by: Keerthy <[email protected]> [Amjad: fix compilation failures for J721e platform] Signed-off-by: Amjad Ouled-Ameur <[email protected]>
2022-02-08arm: mach-omap2: load/start remoteproc IPU1/IPU2Keerthy
First check the presence of the ipu firmware in the boot partition. If present enable the ipu and the related clocks & then move on to load the firmware and eventually start remoteproc IPU1/IPU2. do_enable_clocks by default puts the clock domains into auto which does not work well with reset. Hence adding do_enable_ipu_clocks function. Signed-off-by: Keerthy <[email protected]> [Amjad: fix IPU1_LOAD_ADDR and compile warnings] Signed-off-by: Amjad Ouled-Ameur <[email protected]>
2022-02-08reset: dra7: Add a reset driverKeerthy
Add a reset driver to bring IPs out of reset. Signed-off-by: Keerthy <[email protected]> [Amjad: reset_ops structure member "free" has been renamed to "rfree", use the latter instead] Signed-off-by: Amjad Ouled-Ameur <[email protected]>
2022-02-08configs: dra7xx_evm: Increase the size of SPL_MULTI_DTB_FITAmjad Ouled-Ameur
Expand SPL_MULTI_DTB_FIT to accommodate new SPL IPU nodes. Signed-off-by: Amjad Ouled-Ameur <[email protected]>
2022-02-08soc: soc_ti_k3: update j721e revision numberingBryan Brattlof
There is a 4 bit VARIANT number inside the JTAGID register that TI increments any time a new variant for a chip is produced. Each family of TI's SoCs uses a different versioning scheme based off that VARIANT number. CC: Dave Gerlach <[email protected]> Signed-off-by: Bryan Brattlof <[email protected]>
2022-02-08configs: j721s2_evm_a72_defconfig: Add A72 specific defconfigDavid Huang
Enable A72 specific configs for J721S2 Signed-off-by: David Huang <[email protected]> Signed-off-by: Aswath Govindraju <[email protected]> Signed-off-by: Vignesh Raghavendra <[email protected]> Signed-off-by: Hari Nagalla <[email protected]>
2022-02-08configs: j721s2_evm_r5_defconfig: Add R5 SPL specific defconfigDavid Huang
Enable R5 SPL specific configs for J721S2. Signed-off-by: David Huang <[email protected]> Signed-off-by: Aswath Govindraju <[email protected]> Signed-off-by: Vignesh Raghavendra <[email protected]> Signed-off-by: Hari Nagalla <[email protected]>
2022-02-08arm: dts: k3-j721s2-ddr: Add DDR supportAswath Govindraju
J721S2 can support two instances for DDR. Therefore, add the device support for the same and use 4266MT/s as DDR frequency. Signed-off-by: Aswath Govindraju <[email protected]>
2022-02-08arm: dts: k3-j721s2: Add r5 specific dt supportAswath Govindraju
Add initial support for device tree that runs on R5. Signed-off-by: Aswath Govindraju <[email protected]>
2022-02-08arm: dts: Add support for A72 specific J721S2 Common Processor BoardAswath Govindraju
The EVM architecture for J721S2 is similar to that of J721E and J7200. It is as follows, +------------------------------------------------------+ | +-------------------------------------------+ | | | | | | | Add-on Card 1 Options | | | | | | | +-------------------------------------------+ | | | | | | +-------------------+ | | | | | | | SOM | | | +--------------+ | | | | | | | | | | | Add-on | +-------------------+ | | | Card 2 | | Power Supply | | Options | | | | | | | | | +--------------+ | <--- +------------------------------------------------------+ Common Processor Board Common Processor board is the baseboard that contains most of the actual connectors, power supply etc. The System on Module (SoM) is plugged on to the common processor baord. Therefore, add support for peripherals brought out in the common processor board. Link to Common Processor Board: https://www.ti.com/lit/zip/sprr439 Signed-off-by: Aswath Govindraju <[email protected]>
2022-02-08arm: dts: Add initial support for J721S2 System on ModuleAswath Govindraju
A System on Module (SoM) contains the SoC, PMIC, DDR and basic high speed components necessary for functionality. Therefore, add support for the components present on the SoM. Signed-off-by: Aswath Govindraju <[email protected]>
2022-02-08arm: dts: Add initial support for J721S2 SoCAswath Govindraju
The J721S2 SoC belongs to the K3 Multicore SoC architecture platform, providing advanced system integration in automotive ADAS applications and industrial applications requiring AI at the network edge. This SoC extends the Jacinto 7 family of SoCs with focus on lowering system costs and power while providing interfaces, memory architecture and compute performance for single and multi-sensor applications. Some highlights of this SoC are: * Dual Cortex-A72s in a single cluster, three clusters of lockstep capable dual Cortex-R5F MCUs, Deep-learning Matrix Multiply Accelerator(MMA), C7x floating point Vector DSP. * 3D GPU: Automotive grade IMG BXS-4-64 * Vision Processing Accelerator (VPAC) with image signal processor and Depth and Motion Processing Accelerator (DMPAC) * Two CSI2.0 4L RX plus one eDP/DP, two DSI Tx, and one DPI interface. * Two Ethernet ports with RGMII support. * Single 4 lane PCIe-GEN3 controllers, USB3.0 Dual-role device subsystems, * Up to 20 MCANs, 5 McASP, eMMC and SD, OSPI/HyperBus memory controller, QSPI, I3C and I2C, eCAP/eQEP, eHRPWM, MLB among other peripherals. * Hardware accelerator blocks containing AES/DES/SHA/MD5 called SA2UL management. See J721S2 Technical Reference Manual (SPRUJ28 – NOVEMBER 2021) for further details: http://www.ti.com/lit/pdf/spruj28 Introduce basic support for the J721S2 SoC. Signed-off-by: Aswath Govindraju <[email protected]> Signed-off-by: Vignesh Raghavendra <[email protected]> Signed-off-by: Nishanth Menon <[email protected]>
2022-02-08dt-bindings: pinctrl: k3: Introduce pinmux definitions for J721S2Aswath Govindraju
Add pinctrl macros for J721S2 SoC. These macro definitions are similar to that of J721E, but adding new definitions to avoid any naming confusions in the soc dts files. checkpatch insists the following error exists: ERROR: Macros with complex values should be enclosed in parentheses However, we do not need parentheses enclosing the values for this macro as we do intend it to generate two separate values as has been done for other similar platforms. Signed-off-by: Aswath Govindraju <[email protected]>
2022-02-08dt-bindings: ti-serdes-mux: Add defines for J721S2 SoCAswath Govindraju
There are 4 lanes in the single instance of J721S2 SERDES. Each SERDES lane mux can select upto 4 different IPs. Define all the possible functions. Signed-off-by: Aswath Govindraju <[email protected]>
2022-02-08board: ti: j721s2: Add board support for J721S2David Huang
Add board support for J721S2 SoC. Signed-off-by: David Huang <[email protected]> Signed-off-by: Aswath Govindraju <[email protected]>
2022-02-08soc: ti: k3-socinfo: Add entry for J721S2 SoCDavid Huang
Add support for J721S2 SoC identification. Signed-off-by: David Huang <[email protected]> Signed-off-by: Aswath Govindraju <[email protected]>
2022-02-08ram: k3-ddrss: Add support for J721S2 SoCDavid Huang
Add support for DDR subsystem in J721S2 SoC. Signed-off-by: David Huang <[email protected]> Signed-off-by: Aswath Govindraju <[email protected]>
2022-02-08power: domain: ti: Add support for J721S2 SoCDavid Huang
Add support for J721S2 SoC. Signed-off-by: David Huang <[email protected]> Signed-off-by: Aswath Govindraju <[email protected]> Reviewed-by: Jaehoon Chung <[email protected]>
2022-02-08clk: clk-k3: Add support for J721S2 SoCDavid Huang
Add support for J721S2 SoC. Signed-off-by: David Huang <[email protected]> Signed-off-by: Aswath Govindraju <[email protected]>
2022-02-08drivers: dma: Add support for J721S2David Huang
Add support for DMA in J721S2 SoC. Signed-off-by: David Huang <[email protected]> Signed-off-by: Aswath Govindraju <[email protected]>
2022-02-08arm: K3: Add basic support for J721S2 SoC definitionDavid Huang
Add basic support for J721S2 SoC definition Signed-off-by: David Huang <[email protected]> Signed-off-by: Aswath Govindraju <[email protected]> Signed-off-by: Dave Gerlach <[email protected]> Signed-off-by: Nishanth Menon <[email protected]> Signed-off-by: Hari Nagalla <[email protected]>
2022-02-08ram: k3-ddrss: Add support for configuring MSMC subsystem in case of ↵Aswath Govindraju
Multiple DDR subsystems In Multi DDR subystems with interleaving support, the following needs to configured, - interleaving granular size and region - EMIFs to be enabled - EMIFs with ecc to be enabled - EMIF separated or interleaved - number of cycles of unsuccessful EMIF arbitration to wait before arbitrating for a different EMIF port, by default set to 3 Add support for configuring all the above by using a MSMC device Signed-off-by: Aswath Govindraju <[email protected]>
2022-02-08ram: k3-ddrss: Add support for multiple instances of DDR subsystemsAswath Govindraju
The current driver only supports single instance of DRR subsystem. Add support for probing multiple instances of DDR subsystem. Signed-off-by: Aswath Govindraju <[email protected]>
2022-02-08ram: k3-ddrss: lpddr4_structs_if.h: Add a pointer to ddr instanceAswath Govindraju
Add a pointer to ddr instance int the lpddr4_privatedata_s structure for supporting mutliple instances of DDR in the drivers. Signed-off-by: Aswath Govindraju <[email protected]>
2022-02-08remoteproc: k3_system_controller: Support optional boot_notification channelNishanth Menon
If there is an optional boot notification channel that an SoC uses separate from the rx path, use the same. Signed-off-by: Nishanth Menon <[email protected]>
2022-02-07Merge tag 'u-boot-imx-20220207' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-imx u-boot-imx-20211022 ------------------- CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/10887 - imx8 : Toradex Verdin MX8M Plus Kontron pitx-imx8m - imx8ulp: several fixes and improvements - imx6ull fixes - switching to binman
2022-02-07apalis/colibri_imx6: move setting bootcmd to defconfigOleksandr Suvorov
Move setting the default boot command to the apalis/colibri_imx6_defconfig. It allows replacing the command without code modification. Signed-off-by: Oleksandr Suvorov <[email protected]> Reviewed-by: Peng Fan <[email protected]> Reviewed-by: Igor Opaniuk <[email protected]> Acked-by: Marcel Ziswiler <[email protected]>
2022-02-07board: toradex: add verdin imx8m plus supportMarcel Ziswiler
This adds initial support for the Toradex Verdin iMX8M Plus Quad 4GB WB IT V1.0B module. They are strapped to boot from eFuses which are factory fused to properly boot from their on-module eMMC. U-Boot supports booting from the on-module eMMC only, SDP support is disabled for now due to missing i.MX 8M Plus USB support. Functionality wise the following is known to be working: - eMMC, 8-bit and 4-bit MMC/SD card slots - Ethernet both on-module eQoS and FEC (requires PHY on carrier board) - GPIOs - I2C Boot sequence is: SPL ---> ATF (TF-A) ---> U-boot proper ATF, U-boot proper and u-boot.dtb images are packed into a FIT image, loaded by SPL. Boot: U-Boot SPL 2022.04-rc1-00164-g21a0312611-dirty (Feb 07 2022 - 11:34:04 +0100) Quad die, dual rank failed, attempting dual die, single rank configuration. Normal Boot WDT: Started watchdog@30280000 with servicing (60s timeout) Trying to boot from BOOTROM Find img info 0x&48025a00, size 872 Need continue download 1024 Download 779264, Total size 780424 NOTICE: BL31: v2.2(release):rel_imx_5.4.70_2.3.2_rc1-5-g835a8f67b NOTICE: BL31: Built : 16:52:37, Aug 26 2021 U-Boot 2022.04-rc1-00164-g21a0312611-dirty (Feb 07 2022 - 11:34:04 +0100) CPU: Freescale i.MX8MP[8] rev1.1 at 1200 MHz Reset cause: POR DRAM: 8 GiB Core: 78 devices, 18 uclasses, devicetree: separate WDT: Started watchdog@30280000 with servicing (60s timeout) MMC: FSL_SDHC: 1, FSL_SDHC: 2 Loading Environment from MMC... OK In: serial Out: serial Err: serial Model: Toradex Verdin iMX8M Plus Quad 4GB Wi-Fi / BT IT V1.0B, Serial# 06817281 Carrier: Toradex Verdin Development Board V1.1A, Serial# 10807609 Setting variant to wifi Net: Hard-coding pdata->enetaddr eth1: ethernet@30be0000, eth0: ethernet@30bf0000 [PRIME] Hit any key to stop autoboot: 0 Verdin iMX8MP # Signed-off-by: Marcel Ziswiler <[email protected]> Reviewed-by: Fabio Estevam <[email protected]>
2022-02-07arm64: zynqmp: Remove SOM *u-boot.dtsiMichal Simek
Disable mmc from u-boot.dtsi file because it was there only for kv260 board. With kr260 this is not needed because we will switch to full DT per board with SD/EMMC there too. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/3440d9f94361b4800658f313a5785f43ee84ecf3.1642590109.git.michal.simek@xilinx.com
2022-02-05Merge tag 'efi-2022-04-rc2-2' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-efi Pull request for efi-2022-04-rc2-2 UEFI * add unit test for RISCV_EFI_BOOT_PROTOCOL * disable UEFI for Colibri VF610 * add handle for UART * fix printing of Unicode strings * simplify enumeration of block devices
2022-02-05tools: mkeficapsule: dont use malloc.hHeinrich Schuchardt
malloc() functions are declared via stdlib.h. Including malloc.h can lead to build errors e.g. on OS-X. Signed-off-by: Heinrich Schuchardt <[email protected]>
2022-02-05efi: Drop unnecessary calls to blk_find_device()Simon Glass
When we have the block descriptor we can simply access the device. Drop the unnecessary function call. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Heinrich Schuchardt <[email protected]>
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