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Alphabetically re-order properties.
Signed-off-by: Marcel Ziswiler <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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With the move to using binman to generate SPL aka u-boot-spl-ddr.bin and
U-Boot proper aka u-boot.itb every board now covers such configuration
in its own U-Boot specific device tree include. Move the comon part of
that configuration to the common imx8mm-u-boot.dtsi include file.
Signed-off-by: Marcel Ziswiler <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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Use common imx8mm-u-boot.dtsi.
Signed-off-by: Marcel Ziswiler <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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Alphabetically re-order nodes and properties.
Signed-off-by: Marcel Ziswiler <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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This fixes the following build time issue:
...
BINMAN all
binman: Error 1 running 'mkimage -d ./mkimage.spl.mkimage -n
spl/u-boot-spl.cfgout -T imx8mimage -e 0x7e1000
./mkimage-out.spl.mkimage': mkimage.flash.mkimage: Can't open: No such
file or directory
make: *** [Makefile:1094: all] Error 1
Signed-off-by: Marcel Ziswiler <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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Update doc after using binman to pack images
Signed-off-by: Peng Fan <[email protected]>
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After all these board switch to binman, we could use common imximage.cfg
Signed-off-by: Peng Fan <[email protected]>
Reviewed-by: Patrick Wildt <[email protected]>
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Switch to use binman to pack images
Signed-off-by: Peng Fan <[email protected]>
Reviewed-by: Patrick Wildt <[email protected]>
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Switch to binman to pack images
Signed-off-by: Peng Fan <[email protected]>
Reviewed-by: Patrick Wildt <[email protected]>
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Switch to use binman to pack images
Signed-off-by: Peng Fan <[email protected]>
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The standard 1GB Nano was converted to binman, but the 2G version
was neglected. Convert it to binman as well.
Reviewed-by: Fabio Estevam <[email protected]>
Signed-off-by: Adam Ford <[email protected]>
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Somewhere along the line, the board stopped being able to boot.
Rather than just fixing the issue, let's fix the issue and migrate
to binman to eliminate a warning when using custom imx tools for
generating the binary.
Signed-off-by: Adam Ford <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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To eliminate a warning when using custom imx tools for generating
a binary, use binman to generate flash.bin.
Signed-off-by: Adam Ford <[email protected]>
Signed-off-by: Marcel Ziswiler <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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While converting to binman for an imx8mq board, it has been found that
building in the u-boot CI fails. This is because an imx8mq requires an
external binary (signed_hdmi_imx8m.bin). If this file cannot be found
mkimage fails.
To be able to build this board in the u-boot CI a binman option
(--fake-ext-blobs) is introduced that can be switched on via the u-boot
makefile option BINMAN_FAKE_EXT_BLOBS. With that the needed dummy files are
created.
Signed-off-by: Heiko Thiery <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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- Assorted updates for vexpress64, apple m1, iot2050 and stemmy
platforms.
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- Revert a clk change, to enable some platforms to work again
- Updates to the udoo NEO family of boards to work correctly
- Fix SiFive Unleashes/Unmatched boards booting
- Update rockchip maintainer entry
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This reverts commit 92f1e9a4b31c0bf0f4f61ab823a6a88657323646.
The aforementioned patch causes massive breakage on all platforms which
have 'assigned-clock' DT property in their DT which references any clock
that are not supported by the platform clock driver. That can easily
happen either in SPL, or because the clock driver is reduced. Currently
it seems all iMX8M are affected and fail to boot altogether.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Peng Fan <[email protected]>
Cc: Simon Glass <[email protected]>
Reviewed-by: Sean Anderson <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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By default the Model information from DT is printed:
CPU: Freescale i.MX6SX rev1.2 996 MHz (running at 792 MHz)
CPU: Extended Commercial temperature grade (-20C to 105C) at 63C
Reset cause: POR
Model: UDOO Neo Basic
Board: UDOO Neo FULL
I2C: ready
As the udoo basic DT is used, such output may be confusing.
Improve it by only printing the Board model instead, which is
read from the board identification GPIOs.
Signed-off-by: Fabio Estevam <[email protected]>
Acked-by: Tommaso Merciai <[email protected]>
Tested-by: Tommaso Merciai <[email protected]>
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Currently, the board model is not printed correctly:
Board: UDOO Neo UNDEFINED
Read the model type in SPL and store it the internal OCRAM, so that
U-Boot proper can retrieve it correctly.
Signed-off-by: Fabio Estevam <[email protected]>
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Enable support for USB and USB storage on the UDOO Neo.
Signed-off-by: Peter Robinson <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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The ethernet has a RMII not RGMII, also needs DM_MDIO and finally
initialise it later in the process as it's not needed that early on
and not everything is ready so it locks up the device.
Signed-off-by: Peter Robinson <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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This fixes booting from the mSD card from both SPL and when
using it for the OS booting. It also cleans up a few mmc
booting bits that are no longer needed.
Signed-off-by: Peter Robinson <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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Calling gpio_request() prior to its usage is now mandatory.
This fixes the following GPIO errors:
gpio@20a8000: set_dir_flags: error: gpio GPIO4_16 not reserved
gpio@20a8000: set_dir_flags: error: gpio GPIO4_13 not reserved
gpio@20a8000: set_dir_flags: error: gpio GPIO4_0 not reserved
gpio@20a8000: get_value: error: gpio GPIO4_13 not reserved
gpio@20a8000: get_value: error: gpio GPIO4_0 not reserved
gpio@20a0000: set_dir_flags: error: gpio GPIO2_1 not reserved
gpio@20a0000: set_value: error: gpio GPIO2_1 not reserved
Fixes: 191840ae99 ("ARM: imx: udoo_neo: Enable OF_CONTROL and DM gpio/pin control")
Signed-off-by: Peter Robinson <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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When using QEMU to have a quick test of booting U-Boot S-mode payload
directly without the needs of preparing the SPI flash or SD card images
for SiFive Unleashed board, as per the instructions [1], it currently
does not boot any more.
This was caused by the OF_PRIOR_STAGE removal, as gd->fdt_blob no longer
points to a valid DTB. OF_BOARD is supposed to replace OF_PRIOR_STAGE,
hence we need to add the OF_BOARD logic in board_fdt_blob_setup().
[1] https://qemu.readthedocs.io/en/latest/system/riscv/sifive_u.html#running-u-boot
Fixes: 2e8d2f88439d ("riscv: Remove OF_PRIOR_STAGE from RISC-V boards")
Fixes: d6f8ab30a2af ("treewide: Remove OF_PRIOR_STAGE")
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Ilias Apalodimas <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Philipp does not work at Theobroma Systems anymore so let's swap
Philipp's address with mine.
Cc: Philipp Tomsich <[email protected]>
Cc: Quentin Schulz <[email protected]>
Signed-off-by: Quentin Schulz <[email protected]>
Reviewed-by: Philipp Tomsich <[email protected]>
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meson64_android.h also relies on CMD_AB_SELECT so enable that as well.
Signed-off-by: Guillaume La Roque <[email protected]>
Signed-off-by: Mattijs Korpershoek <[email protected]>
Signed-off-by: Neil Armstrong <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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In AOSP, both VIM3 and VIM3L have 2 bootloader flavors,
depending on A/B enablement.
For example, for vim3l, the naming is:
- u-boot_kvim3l_noab.bin : legacy support
- u-boot_kvim3l_ab.bin : A/B support
Prepare a defconfig to support u-boot_kvim3_ab.bin and
u-boot_kvim3l_ab.bin.
This is identical to khadas-vim3{l}_ab_android but will be updated in
the next commit.
Also update partitioning tables for A/B support.
Signed-off-by: Mattijs Korpershoek <[email protected]>
Signed-off-by: Neil Armstrong <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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The Khadas VIM3 and VIM3L board are well supported in AOSP[1].
However, there is no mainline U-Boot support for it.
The U-Boot used in AOSP is based on a vendor tree [2]
Add all the necessary bits to flash and boot Android for both Khadas
VIM3 and VIM3L boards.
For Android instructions, refer to [1]
[1] https://source.android.com/setup/build/devices#vim3_and_vim3l_boards
[2] https://gitlab.com/baylibre/amlogic/atv/u-boot
Signed-off-by: Guillaume La Roque <[email protected]>
Signed-off-by: Mattijs Korpershoek <[email protected]>
Signed-off-by: Neil Armstrong <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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This allows us to define extra board variables, such as "board" and
"board_name".
Signed-off-by: Guillaume La Roque <[email protected]>
Signed-off-by: Mattijs Korpershoek <[email protected]>
Signed-off-by: Neil Armstrong <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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On Meson GXL, GXM, AXG, G12A, G12B & SM1 SoCs, we can generate an unique
MAC address if none valid found in the eFuses storage.
Only the GXBB based boards doesn't have a fallback way to generate an
unique MAC address, so we rely on CONFIG_NET_RANDOM_ETHADDR to have
a valid one.
An exception is the Radxa Zero board who doesn't have Ethernet on board
so depends on an (or multiple) eventual USB adapters, so leaving the
CONFIG_NET_RANDOM_ETHADDR configs seems safer.
Suggested-by: Tom Rini <[email protected]>
Reviewed-by: Vyacheslav Bocharov <[email protected]>
Signed-off-by: Neil Armstrong <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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- kwbimage: Fix checksum calculation for v1 images (Pierre)
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Recent changes caused fields in the image main header to be modified
after the header checksum had already been computed. Move the checksum
computation to once again be the last operation performed on the header.
Fixes: 2b0980c24027 ("tools: kwbimage: Fill the real header size into the main header")
Signed-off-by: Pierre Bourdon <[email protected]>
Reviewed-by: Pali Rohár <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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Timeout for checking mdio phy idle status is 20seconds. In case of errors
this timeout will be too much. Reduce it to 100ms.
Signed-off-by: Ashok Reddy Soma <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Ramon Fried <[email protected]>
Link: https://lore.kernel.org/r/1b73aa57b77587391e1bcd6d9f0480163367ed1b.1637237121.git.michal.simek@xilinx.com
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SGMII configuration depends on proper GT setting that's why when node has
phys property call PSGTR driver to configure it properly.
Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Sean Anderson <[email protected]>
Link: https://lore.kernel.org/r/bbc8d7ed9d308199168e4455c7a3e3a5ac0890e7.1639562397.git.michal.simek@xilinx.com
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Perform reset before core initialization.
Standard flow which close to 99% users are using getting all IPs out of
reset that there is no need to reset IP again. This is because of all low
level initialization is done in previous bootloader stage.
In SOM case these IPs are not touched by previous bootloader stage that's
why reset needs to be called before IP is accessed to make sure that it is
in correct state.
Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Ramon Fried <[email protected]>
Link: https://lore.kernel.org/r/5ae1c85b282d632bb62030f1f24a0065661b9153.1638804318.git.michal.simek@xilinx.com
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Xilinx DTS files are using two way how to describe ethernet phy.
The first (already supported) has phy as subnode of gem node.
eth {
phy-handle = <&phy0>;
phy0: ethernet-phy@21 {
...
};
};
The second has mdio subnode (with mdio name) which has phy subnode. This
structure allow hadling MDIO reset signal (based on Linux mdio.yaml)
eth {
phy-handle = <&phy0>;
mdio {
phy0: ethernet-phy@21 {
...
};
};
};
This patch adds support for the second case where mdio subnode
is found driver will look at its parent to find out which gem is handling
MDIO bus.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/6748007f0b6db9554d7a4b52352dce23ca403f9d.1638798796.git.michal.simek@xilinx.com
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Add new macro for PMC I2C power domain.
Signed-off-by: Sandeep Gundlupet Raju <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/0bf164f937df551d689dda2a35f9489c2e46b4ab.1638277017.git.michal.simek@xilinx.com
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The system fails to boot without any environment location, so return
ENVL_NOWHERE when there's nowhere to store the environment instead
of ENVL_UNKNOWN.
The same change was also done by commit 50918d0df5cb ("xilinx: Return
ENVL_NOWHERE instead of ENVL_UNKNOWN") for zynq and zynqmp.
Signed-off-by: T Karthik Reddy <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/e4ed36408f10159677ed8060bfd5289f3e0691fa.1637752614.git.michal.simek@xilinx.com
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The xilinx board_fdt_blob_setup() implementation makes use of
XILINX_OF_BOARD_DTB_ADDR, but no default value is currently defined for
microblaze. Add one so that microblaze could also work with
CONFIG_OF_SEPARATE.
Signed-off-by: Ovidiu Panait <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
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Current code assumes that the vector base address is always at 0x0.
However, this value is configurable for MicroBlaze using the
CONFIG_XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option. Update the
reset routines to branch to this location instead.
Signed-off-by: Ovidiu Panait <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
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Current code assumes that the vector base address is always at 0x0.
However, this value is configurable for MicroBlaze, so update the
__setup_exceptions routine to work with any vector base address.
The r4 register is reserved for the vector base address inside
__setup_exceptions and the function prologe/epilogue are also updated to
save and restore r4.
Signed-off-by: Ovidiu Panait <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
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MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS
configuration parameter). Current code assumes that the reset vector
location is always 0x0.
Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user
can adjust the reset vector address.
Signed-off-by: Ovidiu Panait <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
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Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to
XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of
microblaze-generic Kconfig options.
Signed-off-by: Ovidiu Panait <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
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Microblaze is one the last two users of the CONFIG_SYS_RESET_ADDRESS
macro (the other is arch/powerpc/cpu/mpc8xx/cpu.c, but the macro is not
defined anywhere in powerpc code, so it should be removed there too).
Replace CONFIG_SYS_RESET_ADDRESS usage in start.S with
CONFIG_SYS_TEXT_BASE. If the reset address should really be
user-configurable, a new Kconfig option could be added.
Signed-off-by: Ovidiu Panait <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
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To simpify the code, use stack space as scratch memory for endian offset
calculation, rather than saving/restoring the first unused MB vector.
Signed-off-by: Ovidiu Panait <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
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Enable SPL_LIBCOMMON_SUPPORT and SPL_LIBGENERIC_SUPPORT if CONFIG_SPL=y, in
order to fix the following link failures:
common/spl/spl.o: in function `board_init_r':
common/spl/spl.c:755: undefined reference to `puts'
...
common/spl/spl.o: in function `board_init_r':
common/spl/spl.c:756: undefined reference to `hang'
common/spl/spl.c:740: undefined reference to `memset'
Signed-off-by: Ovidiu Panait <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
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Microblaze has three boot modes defined in microblaze/include/asm/spl.h,
but only booting from NOR flash is currently useable. Add a custom
board_boot_order() implementation so that RAM and SPI boot modes can also
be selected if the corresponding load-image support is present.
Signed-off-by: Ovidiu Panait <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
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board_fdt_blob_setup() uses the _end symbol to find the dtb in the non-spl
case. In order to allow microblaze builds to compile successfully with
CONFIG_OF_SEPARATE, the _end symbol must be defined. Align microblaze with
the other architectures and use _end symbol rather than __end to mark the
end of the u-boot binary.
Signed-off-by: Ovidiu Panait <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
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Core function should make sure that data is stored properly that's why move
cache operations directly to zynqmp_pmufw_load_config_object() to be able
to call it from other functions.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/8c92edd3650ce34a3cfd1c1e4e9103980830b1fa.1637236800.git.michal.simek@xilinx.com
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Previous psu init was targeting SOM + KV260 carrier card and also contain
configurations for other devices on carrier card. This config is removing
all expected configurations for CC and let U-Boot to handle all of it self.
This configuration is designed for SOM itself (and I would bet without
eMMC).
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/5782131058dc372befd3fdb4dceabeea5ba56606.1637236693.git.michal.simek@xilinx.com
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