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Add new clk subcommand "clk setfreq", for setting up a clock rate
directly from u-boot cmdline. This is handy for any debugging purposes
towards clocks.
Acked-by: Lukasz Majewski <[email protected]>
Signed-off-by: Tero Kristo <[email protected]>
Signed-off-by: Tero Kristo <[email protected]>
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Bail out early if device returned for the parent clock is null.
This avoids warning prints like this when doing clk dump:
dev_get_uclass_priv: null device
Signed-off-by: Tero Kristo <[email protected]>
Signed-off-by: Tero Kristo <[email protected]>
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Some clocks are not associated to a DM node, so just parsing the DM is not
enough. This is especially true for root clocks, which typically don't have
any parents. Instead, fetch every registered UCLASS_CLK instance, and dump
these out.
Signed-off-by: Tero Kristo <[email protected]>
Signed-off-by: Tero Kristo <[email protected]>
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Current driver only supports registering fixed rate clocks from DT. Add
new API which makes it possible to register fixed rate clocks directly
from e.g. platform specific clock drivers.
Reviewed-by: Peng Fan <[email protected]>
Signed-off-by: Tero Kristo <[email protected]>
Signed-off-by: Tero Kristo <[email protected]>
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board_fit_image_post_process() passes only start and size of the image,
but type of the image is not passed. So pass fit and node_offset, to
derive information about image to be processed.
Signed-off-by: Lokesh Vutla <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Signed-off-by: Tero Kristo <[email protected]>
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With the sysfw rearch, sysfw PM calls are no longer available from SPL
level. To properly support this, remove the is_on checks and the reset
assertion from the R5 remoteproc driver as these are not supported.
Attempting to access unavailable services will cause the device to hang.
Signed-off-by: Tero Kristo <[email protected]>
Signed-off-by: Tero Kristo <[email protected]>
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On J7 family of SoCs (J721E and J7200), sysfw is being split to be run
under two cores, TIFS portion on DMSC core, and DM firmware under MCU
R5. As MCU R5 is also used to run one phase of the bootloader, we must
prevent access from here towards sysfw services. To support this, add
new config option which can be used to detect presence of RM/PM sysfw
services.
Signed-off-by: Tero Kristo <[email protected]>
Signed-off-by: Tero Kristo <[email protected]>
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Copy the best rational approximation calculation routines from Linux.
Typical usecase for these routines is to calculate the M/N divider
values for PLLs to reach a specific clock rate.
This is based on linux kernel commit:
"lib/math/rational.c: fix possible incorrect result from rational
fractions helper"
(sha1: 323dd2c3ed0641f49e89b4e420f9eef5d3d5a881)
Signed-off-by: Tero Kristo <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Signed-off-by: Tero Kristo <[email protected]>
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Sata/scsi and usb based devices are not started at this stage that's why
disks are not found and early update can't happen.
It is because of deficiency in the UEFI implementation which is not able to
deal with block devices which are added or removed after initialization.
EFI capsule on disk early feature needs to be fixed first to be able to
enable this feature properly.
Signed-off-by: Michal Simek <[email protected]>
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Enable manual start in zynqmp_qspi_fill_gen_fifo().
Also enable GQSPI_IXR_GFNFULL_MASK and check for it instead of
GQSPI_IXR_GFEMTY_MASK.
Add dummy write to genfifo register in chipselect.
Signed-off-by: Ashok Reddy Soma <[email protected]>
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The default register configuration after powerup for PSSYSMON_ANALOG_BUS
register is incorrect. Hence, fix this in SPL by writing correct fixed
value. It follows UG1085 chapter 'PS SYSMON Analog_Bus' and reflects commit
sw_apps:zynq ("056ca65d44549ce27f716d423e8dfdefeee7440c")
in Xilinx:embeddedsw[1].
[1] https://github.com/Xilinx/embeddedsw
Signed-off-by: Adrian Fiergolski <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
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- mvebu: Turris MOX misc updates (cmds, rescue mode, LED's etc)
(Marek)
- mvebu: correct Armada 8K addresses (Heinrich)
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0x04000000- 0x06000000 is reserved memory. We cannot load to anything here.
Signed-off-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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Enable configuration options to support Turris network boot. This
includes FIT support and some crypto commands.
Signed-off-by: Marek Behún <[email protected]>
Reviewed-by: Pali Rohár <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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Add nodes for SPI NOR partitions to the device tree of Turris MOX, as
are in Linux' device tree.
Signed-off-by: Marek Behún <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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Add default fdtfile environment variable with value
marvell/armada-3720-turris-mox.dtb.
This can be useful for some boot scenarios.
Signed-off-by: Marek Behún <[email protected]>
Reviewed-by: Pali Rohár <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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Configure blinking on ethernet PHY LEDs on the MOX A board when entering
rescue mode via reset button.
Signed-off-by: Marek Behún <[email protected]>
Reviewed-by: Pali Rohár <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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Add necessary config options and board code to support board factory
reset / rescue mode on Turris MOX.
In order to also support invoking rescue mode from U-Boot console,
without having to press the factory reset button, put the rescue command
into `bootcmd_rescue` default environment variable. When factory reset
button is pressed, invoke rescue mode via distroboot by setting
`boot_targets` to `rescue`.
Rescue boot from console can be invoked by running
run bootcmd_rescue
Signed-off-by: Marek Behún <[email protected]>
Reviewed-by: Pali Rohár <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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Add nodes for indicator LED and reset button so that board code can
implement board factory reset mechanism.
Signed-off-by: Marek Behún <[email protected]>
Reviewed-by: Pali Rohár <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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The fragmented files were not correctly read because of two issues:
- The squashfs_file_info struct has a field named 'comp', which tells if
the file's fragment is compressed or not. This field was always set to
'true' in sqfs_get_regfile_info and sqfs_get_lregfile_info. It should
actually take sqfs_frag_lookup's return value. This patch addresses
these two assignments.
- In sqfs_read, the fragments (compressed or not) were copied to the
output buffer through a for loop which was reading data at the wrong
offset. Replace these loops by equivalent calls to memcpy, with the
right parameters.
I tested this patch by comparing the MD5 checksum of a few fragmented
files with the respective md5sum output in sandbox, considering both
compressed and uncompressed fragments.
Signed-off-by: Joao Marcos Costa <[email protected]>
Tested-by: Richard Genoud <[email protected]>
Reviewed-by: Miquel Raynal <[email protected]>
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On reset, the RTC loads the 2000-01-01 date with a wrong day of the
week (Sunday instead of Saturday).
Signed-off-by: Dario Binacchi <[email protected]>
Signed-off-by: Lokesh Vutla <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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Update the driver to support the device tree and the driver model.
The read / write helpers in rtc_ops allow access to scratch registers
only. The offset parameter is added to the address of the scratch0
register.
Support for non-DM has been removed as there were no users.
Signed-off-by: Dario Binacchi <[email protected]>
Signed-off-by: Lokesh Vutla <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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There have been some changes to the am335x-<board> DTs related to the
rtc node, so let's re-syncs them with Linux.
Signed-off-by: Dario Binacchi <[email protected]>
Signed-off-by: Lokesh Vutla <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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The RTC module contains a kicker mechanism to prevent any spurious
writes from changing the register values. To set the time, you must
first unlock the TC registers, update them and then lock.
Signed-off-by: Dario Binacchi <[email protected]>
Signed-off-by: Lokesh Vutla <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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To write correct data to the TC registers, the STATUS register must be
read until the BUSY bit is equal to zero. Once the BUSY flag is zero,
there is a 15 μs access period in which the TC registers can be
programmed.
The rtc_wait_not_busy() has been inspired by the Kernel.
Signed-off-by: Dario Binacchi <[email protected]>
Signed-off-by: Lokesh Vutla <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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Use 32-bit access only where it is needed. Most of the RTC registers
contain useful information in the 8 least significant bits, the others
are reserved.
Signed-off-by: Dario Binacchi <[email protected]>
Signed-off-by: Lokesh Vutla <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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Fix errors raised by module compilation.
Signed-off-by: Dario Binacchi <[email protected]>
Signed-off-by: Lokesh Vutla <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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The Davinci's onchip RTC is also present on TI OMAP1, AM33XX, AM43XX and
DRA7XX SOCs. So, let's enable compilation for these architectures too.
Signed-off-by: Dario Binacchi <[email protected]>
Signed-off-by: Lokesh Vutla <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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Also convert CONFIG_HW_WATCHDOG to CONFIG_WATCHDOG.
Signed-off-by: Pali Roh?r <[email protected]>
Signed-off-by: Lokesh Vutla <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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Enable config options required to add support for USB Mass storage boot,
USB DFU boot, host and device modes in U-Boot.
Signed-off-by: Aswath Govindraju <[email protected]>
Signed-off-by: Lokesh Vutla <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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max size
Due to a limitation for USB DFU boot mode, SPL load address has to be less
than or equal to 0x70001000. So, load address of SPL and ATF have been
moved to 0x70000000 and 0x701a0000 respectively.
Also, the maximum size of ATF has been increased to 0x1c000 [1].
Therefore, update ATF's location and maximum size accordingly in the device
tree file.
[1] - https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git/commit/?id=2fb5312f61a7de8b7a70e1639199c4f14a10b6f9
Signed-off-by: Aswath Govindraju <[email protected]>
Signed-off-by: Lokesh Vutla <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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the limitations for USB DFU boot mode
For USB DFU boot mode there is a limitation on the load address of boot
images that they have to be less than 0x70001000. Therefore, move the
SPL_TEXT_BASE address to 0x70000000.
Currently ATF is being loaded at 0x70000000, if the SPL is being loaded at
0x70000000 then ATF would overwrite SPL image when loaded. Therefore, move
the location of ATF to a latter location in SRAM, past the SPL image. Also
rearrange the EEPROM and BSS data on top of ATF.
Given below is the placement of various data sections in SRAM
┌──────────────────────────────────────┐0x70000000
│ │
│ │
│ │
│ SPL IMAGE (Max size 1.5 MB) │
│ │
│ │
│ │
├──────────────────────────────────────┤0x7017FFFF
│ │
│ SPL STACK │
│ │
├──────────────────────────────────────┤0x70192727
│ GLOBAL DATA(216 B) │
├──────────────────────────────────────┤0x701927FF
│ │
│ INITIAL HEAP (32 KB) │
│ │
├──────────────────────────────────────┤0x7019A7FF
│ │
│ BSS (20 KB) │
├──────────────────────────────────────┤0x7019F7FF
│ EEPROM DATA (2 KB) │
├──────────────────────────────────────┤0x7019FFFF
│ │
│ │
│ ATF (123 KB) │
│ │
│ │
├──────────────────────────────────────┤0x701BEBFB
│ BOOT PARAMETER INDEX TABLE (5124 B)│
├──────────────────────────────────────┤0x701BFFFF
│ │
│SYSFW FIREWALLED DUE TO A BUG (128 KB)│
│ │
├──────────────────────────────────────┤0x701DFFFF
│ │
│ DMSC CODE AREA (128 KB) │
│ │
└──────────────────────────────────────┘0x701FFFFF
Signed-off-by: Aswath Govindraju <[email protected]>
Signed-off-by: Lokesh Vutla <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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peripheral for USB subsystem
Add U-Boot tags and fix the dr_mode as peripheral in U-Boot to support DFU
by default.
Signed-off-by: Aswath Govindraju <[email protected]>
Signed-off-by: Lokesh Vutla <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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AM64 EVM board has a micro USB 2.0 AB connector and the USB0_VBUS is
connected with a resistor divider in between. USB0_DRVVBUS pin is muxed
between USB0_DRVVBUS and GPIO1_79 signals.
Add the corresponding properties and set the pinmux mode for USB subsystem
in the evm dts file.
Signed-off-by: Aswath Govindraju <[email protected]>
Signed-off-by: Lokesh Vutla <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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Add DT node for the single USB subsystem in main dtsi file.
Signed-off-by: Aswath Govindraju <[email protected]>
Signed-off-by: Lokesh Vutla <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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Set the core voltage of USB PHY in AM64x to 0.85V in spl_board_init().
Signed-off-by: Aswath Govindraju <[email protected]>
Signed-off-by: Lokesh Vutla <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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U-Boot either supports USB host or device mode for a node at a time in the
device tree nodes. To support both host and dfu bootmodes, dr_mode is set
to "peripheral" by default and then fixed based on the mode selected by
the boot mode config dip switches on the board.
This needs to happen before the cdns3 generic layer binds the usb device
to a host or a device driver. Therefore, use fdtdec_setup_board()
implementation to fixup the device tree property.
Signed-off-by: Aswath Govindraju <[email protected]>
Signed-off-by: Lokesh Vutla <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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Add support for identifying USB host and device boot modes
Signed-off-by: Aswath Govindraju <[email protected]>
Signed-off-by: Lokesh Vutla <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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Kconfig symbol
Add support for providing ATF load address with a Kconfig symbol.
Signed-off-by: Aswath Govindraju <[email protected]>
Signed-off-by: Lokesh Vutla <[email protected]>
Reviewed-by: Suman Anna <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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Update the ddr settings to use the DDR reg config tool rev 0.5.0.
This enables 2666MTs LPDDR configuration on J7200.
Signed-off-by: Kevin Scholz <[email protected]>
Signed-off-by: Praneeth Bajjuri <[email protected]>
Signed-off-by: Lokesh Vutla <[email protected]>
Tested-by: Suman Anna <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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- dwc2 and cdns3 fixes
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https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2021-07-rc5
Documentation:
* pinmux and ums man-page
Bug fixes:
* Consider that partition numbers as hexadecimal.
* Avoid a possible NULL dereference in efi_capsule_delete_file().
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- Migrate TFTP_SIZE and SYS_DFU_DATA_BUF_SIZE to Kconfig
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Add support for Storopack's SMEGW01 board, which is an
IoT gateway based on the i.MX7D SoC.
Based on the original U-Boot work done by Phytec.
Signed-off-by: Fabio Estevam <[email protected]>
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Supported boot device types in iMX8MN: MMC, DHCP.
Add DISTRO_DEFAULTS config option and include the distro boot command
header file to enable full support of distro boot on i.MX8M Nano EVK (both
DDR and LPDDR derivatives).
Drop previous environment, which was targeting customized boot commands and
boot order.
Signed-off-by: Andrey Zhizhikin <[email protected]>
Cc: Peng Fan <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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CPU: Freescale i.MX6ULL rev1.1 792 MHz (running at 396 MHz)
CPU: Industrial temperature grade (-40C to 105C) at 49C
Reset cause: POR
Model: Seeed NPi iMX6ULL Dev Board with NAND
Board: Seeed NPi i.MX6ULL Dev Board
DRAM: 512 MiB
NAND: 512 MiB
MMC: FSL_SDHC: 0
In: serial@2020000
Out: serial@2020000
Err: serial@2020000
Net: FEC0
Working:
- Eth0
- MMC/SD
- NAND
- UART 1
- USB host
Signed-off-by: Navin Sankar Velliangiri <[email protected]>
Note:
Changes in v2:
* removed unnecessary space in imx6ull-seeed-npi-imx6ull-dev-board.dts file.
* Used SZ_2M for CONFIG_SYS_MALLOC_LEN size allocation.
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Add i.MX8QM qmx8 congatec board support
U-Boot 2021.07-rc3-00528-gc9a966d9dd (May 31 2021 - 15:21:25 +0200)
CPU: NXP i.MX8QM RevB A53 at 1200 MHz
Model: Congatec QMX8 Qseven series
Board: conga-QMX8
Build: SCFW 494c97f3, SECO-FW d63fdb21, ATF 09c5cc9
Boot: SD2
DRAM: 6 GiB
MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... OK
In: serial@5a060000
Out: serial@5a060000
Err: serial@5a060000
switch to partitions #0, OK
mmc2 is current device
Net:
Error: ethernet@5b040000 address not set.
No ethernet found.
Hit any key to stop autoboot: 0
Signed-off-by: Oliver Graute <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Peng Fan <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: Ye Li <[email protected]>
Cc: uboot-imx <[email protected]>
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Frequency requested by ddrphy_init_set_dfi_clk from fracpll uses MHZ()
macro, which expands the value provided to the Hz range without taking into
account the precise Hz setting. This causes the frequency of 266 MHz not ot
be found in the imx8mm_fracpll_tbl, since it is entered there with a
precise Hz value. This in turn causes the boot hang in SPL, as proper DDR
fracpll frequency cannot be determined.
Correct the value in imx8mm_fracpll_tbl to match the one expanded by
MHZ(266) macro, rounding it down to MHz range only.
Signed-off-by: Andrey Zhizhikin <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: "NXP i.MX U-Boot Team" <[email protected]>
Cc: Peng Fan <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: Ye Li <[email protected]>
Fixes: 825ab6b406 ("driver: ddr: Refine the ddr init driver on imx8m")
Reviewed-by: Fabio Estevam <[email protected]>
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The original URL that explains the boot mode setting is no longer
valid.
Update to the new one.
Signed-off-by: Fabio Estevam <[email protected]>
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Enable driver model support for FEC ethernet which allows us to remove
the iomux and board_eth_init function. Replace the toggling of the ethernet
phy reset with dt configuration.
Enable driver model support for PCI which allows us to remove the
eth1000_initialize() call. Additionally enable PCI_INIT_R to scan for
PCI devices on init such as the e1000 that is present on the GW552x.
Convert board_pci_fixup to use dm callback and remove pcidisable env
variable which is not supported for DM_PCI and thus leave PCI always
enabled during init.
Signed-off-by: Tim Harvey <[email protected]>
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