| Age | Commit message (Collapse) | Author |
|---|
|
Now the comphy configuration is handled in atf, therefore there is no
need to configure phy or pipe selector in u-boot, it is configured by
atf for each particular pair: lane and mode.
Change-Id: I0bebf8d5ff66dbeb6bf9ef90876195938a8eb705
Signed-off-by: Grzegorz Jaszczyk <[email protected]>
Reviewed-by: Igal Liberman <[email protected]>
|
|
Replace the XFI training with appropriate SMC call, so the firmware will
perform exact initialization.
Update Stefan 2021-03-23:
Move comphy_smc() function to an earlier place - necessary for the
mainline merge.
Change-Id: I789b130b05529dc80dadcf66aef407d93595b762
Signed-off-by: Grzegorz Jaszczyk <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
Reviewed-by: Igal Liberman <[email protected]>
|
|
Replace the comphy initialization for USB with appropriate SMC call,
so the firmware will execute required serdes configuration.
Change-Id: I7f773c0dfac70db9dd2653de2cdcfac577e78c4e
Signed-off-by: Grzegorz Jaszczyk <[email protected]>
|
|
Replace the comphy initialization for RXAUI with appropriate SMC call,
so the firmware will execute required serdes configuration.
Change-Id: Iedae0285fb283e05bb263a8b4ce46e8e7451a309
Signed-off-by: Grzegorz Jaszczyk <[email protected]>
Reviewed-by: Igal Liberman <[email protected]>
|
|
Even if comphy types of SATA2/SATA3/SGMII3 and comphy speeds of
1.5G/3G/6.25G were referenced in the driver non configuration (dts)
was using it.
This patch removes unused definitions.
Change-Id: I53ed6f9d3a82b9d18cb4e488bc14d3cf687f9488
Signed-off-by: Grzegorz Jaszczyk <[email protected]>
Signed-off-by: Konstantin Porotchkin <[email protected]>
|
|
Change-Id: I3b97253e7102a0868440a9e0200acc1c7919c743
Signed-off-by: Igal Liberman <[email protected]>
|
|
This patch adds support for running RX training using new command called
"rx_training"
Usage:
rx_training - rx_training <cp id> <comphy id>
RX training allows to improve link quality (for SFI mode)
by running training sequence between us and the link partner,
this allows to reach better link quality then using static configuration.
Change-Id: I818fe67ccaf19a87af50d4c34a9db7d6802049a5
Signed-off-by: Igal Liberman <[email protected]>
Signed-off-by: Marcin Wojtas <[email protected]>
|
|
This allows the lower level driver access to comphy map data
(required for RX training support, which is introduced
in the following patches).
Change-Id: Ib7ffdc4b32076c01c3a5d33f59552c9dfc6b12fa
Signed-off-by: Igal Liberman <[email protected]>
|
|
If fdtdec_get_int can't find speed, set COMPHY_SPEED_INVALID
If fdtdec_get_int can't find type, set COMPHY_TYPE_INVALID
Move the error print if phy-type is invalid
Add continue to the probe loop (in a case of invalid phy)
Cosmetic changes
Change-Id: I0c61b40bfe685437426fe907942ed338b7845378
Signed-off-by: Igal Liberman <[email protected]>
|
|
Add UTMI analog parameters initialization values according to
latest ETP.
Change-Id: I5bcca205a3995202a18ff126f371a81f69e205c8
Signed-off-by: Igal Liberman <[email protected]>
|
|
UTMI should be initialized only for enabled device tree nodes.
This fix overrides current internal configuration array
entry with the next DT entry data if error is detected
during the current DT entry parsing or the current port
is disabled.
This way the internal configuration structure will only
contain valid ports information obtained from the DT.
Change-Id: I9c43c6a5d234e15ae9005d1c9bc983fc1f3544b8
Signed-off-by: Omri Itach <[email protected]>
Signed-off-by: Ken Ma <[email protected]>
|
|
In get_speed_string() we have an array (speed_strings[])
which includes all possible speed strings.
This array size and content must be aligned to the speed
defines in comphy_data.h.
This patch adds missing 5.125G speed, aligns speed_strings[]
and fixes incorrect printing when speed > 5.0G.
Change-Id: I9900d23595094be321be0c62fcaa88036324568e
Signed-off-by: Igal Liberman <[email protected]>
|
|
Currently, all comphy definitions are PHY_TYPE_XX and PHY_SPEEED_XX.
Those definition might be confused with MDIO PHY definitions.
This patch does the following changes:
- PHY_TYPE_XX --> COMPHY_TYPE_XX
- PHY_SPEED_XX --> COMPHY_SPEED_XX
This improves readability, no functional change.
Change-Id: I2bd1d9289ebbc5c16fa80f9870f797ea1bcaf5fa
Signed-off-by: Igal Liberman <[email protected]>
Signed-off-by: Konstantin Porotchkin <[email protected]>
|
|
- For some Marvell SoCs, like armada-3700, there are both
USB host and device controller, but on PHY level the
configuration is the same.
- The new type supports both USB device and USB host
- This patch is cherry-picked from u-boot-2015 as-is.
Change-Id: I01262027edd8ec23391cff6fb409b3009aedfbb9
Signed-off-by: jinghua <[email protected]>
Signed-off-by: Ken Ma <[email protected]>
Reviewed-by: Igal Liberman <[email protected]>
|
|
Because of the incorrectly supported SGMII_2500 mode, this patch
disables eth2 for now until this issue will be fixed in mainline.
Also fix an incorrect comment.
Signed-off-by: Stefan Roese <[email protected]>
Cc: Konstantin Porotchkin <[email protected]>
Cc: Stefan Chulski <[email protected]>
Cc: Nadav Haklai <[email protected]>
Cc: Marek Behun <[email protected]>
|
|
This patch adds the base support for the Marvell Octeon TX2 CN9130 CRB.
Not all interfaces are supported fully yet.
Signed-off-by: Konstantin Porotchkin <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
|
|
This patch adds the dtsi/dts files needed to support the Marvell
Octeon TX2 CN9130 CRB. This is only the base port with not all
interfaces supported fully.
Signed-off-by: Konstantin Porotchkin <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
|
|
Move the default environment location to the end of 4MB flash
region. This change allows to accomodate larger flash boot
images making space for forthcoming code changes.
Signed-off-by: Konstantin Porotchkin <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
|
|
Add support for SoCs based on AP807 die.
Remove unused include file for Armada-8020 SoC.
Signed-off-by: Konstantin Porotchkin <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
|
|
Use a single dtsi file for CP110 die instead of master/slave.
Moving to single file will allow miltiple DTSI inclusions with
re-defined CP index and name.
This change will also allow support for SoCs containing more than
two CP110 dies on board.
Move pin control definitions from CP110 DTS to board DTS files
Signed-off-by: Konstantin Porotchkin <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
|
|
- fix the dependency for MMC boot (add XENON to MVEBU_MMC)
- fix the bubt destination assignment (missing # in "else" case)
Signed-off-by: Konstantin Porotchkin <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
|
|
Add support for regulator-force-boot-off DT property.
This property can be used by the board/device drivers for
turning off regulators on early init stages as pre-requisite
for the other components initialization.
Signed-off-by: Konstantin Porotchkin <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
Cc: Jaehoon Chung <[email protected]>
Cc: Simon Glass <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
|
|
|
|
https://source.denx.de/u-boot/custodians/u-boot-amlogic
- net: designware: fix PHY reset with DM_MDIO, fixing boot of (at least) Odroid-C4
|
|
The dw_eth_pdata is not accessible from the mdio device, it gets the mdio bus plat
leading to random sleeps (-10174464 on Odroid-HC4).
This moves the dw_mdio_reset function to a common one taking the ethernet
device as parameter and use it from the dw_mdio_reset and dm_mdio variant functions.
Fixes: 5160b4567c ("net: designware: add DM_MDIO support")
Reported-by: Mark Kettenis <[email protected]>
Signed-off-by: Neil Armstrong <[email protected]>
Reviewed-by: Ramon Fried <[email protected]>
|
|
For systems which use generic PHY support and implement USB PHY driver,
the parsing of PHY properties is unnecessary, disable it.
Signed-off-by: Marek Vasut <[email protected]>
Tested-by: Ying-Chun Liu (PaulLiu) <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Peng Fan <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Ye Li <[email protected]>
Cc: uboot-imx <[email protected]>
|
|
According to S26KL512S datasheet [1] and S29GL01GS datasheet [2],
the procedure to read out PPB lock bits is to send the PPB Entry,
PPB Read, Reset/ASO Exit. Currently, the code does send incorrect
PPB Entry, PPB Read and Reset/ASO Exit is completely missing.
The PPB Entry sent is implemented by sending flash_unlock_seq()
and flash_write_cmd(..., FLASH_CMD_READ_ID). This translates to
sequence 0x555:0xaa, 0x2aa:0x55, 0x555:0x90=FLASH_CMD_READ_ID.
However, both [1] and [2] specify the last byte of PPB Entry as
0xc0=AMD_CMD_SET_PPB_ENTRY instead of 0x90=FLASH_CMD_READ_ID,
that is 0x555:0xaa, 0x2aa:0x55, 0x555:0xc0=AMD_CMD_SET_PPB_ENTRY.
Since this does make sense, this patch fixes it and thus also
aligns the code in flash_get_size() with flash_real_protect().
The PPB Read returns 00h in case of Protected state and 01h in case
of Unprotected state, according to [1] Note 83 and [2] Note 17, so
invert the result. Moreover, align the arguments with similar code
in flash_real_protect().
Finally, Reset/ASO Exit command should be executed to exit the PPB
mode, so add the missing reset.
[1] https://www.cypress.com/file/213346/download
Document Number: 001-99198 Rev. *M
Table 40. Command Definitions, Nonvolatile Sector Protection
Command Set Definitions
[2] https://www.cypress.com/file/177976/download
Document Number: 001-98285 Rev. *R
Table 7.1 Command Definitions, Nonvolatile Sector Protection
Command Set Definitions
Fixes: 03deff433e ("cfi_flash: Read PPB sector protection from device for AMD/Spansion chips")
Signed-off-by: Marek Vasut <[email protected]>
Cc: Stefan Roese <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
|
|
Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <[email protected]>
|
|
This fixes an issue getting resets index 1 and 3+, the spurius "> 0"
made it return the index 0 or 1, whatever index was passed.
The dm_test_reset_base() did not catch it, but the dm_test_reset_base() extension
catches it and this fixes the regression.
This also fixes a reggression on Amlogic G12A/G12B SoCs, where HDMI output was disable
even when Linux was booting.
Fixes: ea9dc35aab ("reset: Get the RESET by index without device")
Reported-by: B1oHazard <[email protected]>
Signed-off-by: Neil Armstrong <[email protected]>
|
|
With this extended test, we get the following failure :
=> ut dm reset_base
Test: dm_test_reset_base: reset.c
test/dm/reset.c:52, dm_test_reset_base(): reset_method3.id == reset_method3_1.id: Expected 0x14 (20), got 0x2 (2)
Test: dm_test_reset_base: reset.c (flat tree)
test/dm/reset.c:52, dm_test_reset_base(): reset_method3.id == reset_method3_1.id: Expected 0x14 (20), got 0x2 (2)
Failures: 2
A fix is needed in reset_get_by_index_nodev() when introduced in [1].
[1] ea9dc35aab ("reset: Get the RESET by index without device")
Signed-off-by: Neil Armstrong <[email protected]>
|
|
Use of strcat() against an uninitialized buffer would lead
to buffer overflow. This patch fixes it.
Fixes: 694cd5618c ("IOMUX: Introduce iomux_replace_device()")
Signed-off-by: Yuichiro Goto <[email protected]>
Cc: Peter Robinson <[email protected]>
Cc: Andy Shevchenko <[email protected]>
Cc: Nicolas Saenz Julienne <[email protected]>
Reviewed-by: Andy Shevchenko <[email protected]>
Tested-by: Peter Robinson <[email protected]>
|
|
As reported by Coverity Scan for Das U-Boot, the 'less-than-zero'
comparison of an unsigned value is never true.
Signed-off-by: Dario Binacchi <[email protected]>
Reviewed-by: Pratyush Yadav <[email protected]>
|
|
Otherwise it can generate a division by zero, which has an undefined
behavior.
Signed-off-by: Dario Binacchi <[email protected]>
|
|
When CONFIG_USE_DEFAULT_ENV_FILE=y and the file
CONFIG_DEFAULT_ENV_FILE is empty (or at least doesn't contain any
non-comment, non-empty lines), we end up feeding nothing into xxd,
which in turn then outputs nothing. Then blindly appending ", 0x00"
means that we end up trying to compile (roughly)
const char defaultenv[] = { , 0x00 }
which is of course broken.
To fix that, change the frobbing of the text file so that we always
end up printing an extra empty line (which gets turned into that extra
nul byte we need) - that corresponds better to the binary format
consisting of a series of key=val nul terminated strings, terminated
by an empty string.
Reported-by: Oleksandr Suvorov <[email protected]>
Signed-off-by: Rasmus Villemoes <[email protected]>
Reviewed-by: Oleksandr Suvorov <[email protected]>
|
|
There are some cases where decompressed sectors can have padding zeros.
In kernel code, we have lines to address such situation:
/*
* btrfs_getblock is doing a zero on the tail of the page too,
* but this will cover anything missing from the decompressed
* data.
*/
if (bytes < destlen)
memset(kaddr+bytes, 0, destlen-bytes);
kunmap_local(kaddr);
But not in U-boot code, thus we have some reports of U-boot failed to
read compressed files in btrfs.
Fix it by doing the same thing of the kernel, for both inline and
regular compressed extents.
Reported-by: Matwey Kornilov <[email protected]>
Link: https://bugzilla.suse.com/show_bug.cgi?id=1183717
Fixes: a26a6bedafcf ("fs: btrfs: Introduce btrfs_read_extent_inline() and btrfs_read_extent_reg()")
Signed-off-by: Qu Wenruo <[email protected]>
|
|
When zImage support was added to SPL, the messages were hidden to reduce
code size. However, the wrong config symbol was used. Since this file is
only built when CONFIG_SPL_FRAMEWORK=y, the messages were always hidden.
Use the correct symbol so the messages are printed in U-Boot proper.
Also use IS_ENABLED to drop the #ifdef.
Fixes: 431889d6ad9a ("spl: zImage support in Falcon mode")
Signed-off-by: Samuel Holland <[email protected]>
|
|
When flush_cache() is called during boot on our ~7M kernel image, the
hundreds of thousands of WATCHDOG_RESET calls end up adding
significantly to boottime. Flushing a single cache line doesn't take
many microseconds, so doing these calls for every cache line is
complete overkill.
The generic watchdog_reset() provided by wdt-uclass.c actually
contains some rate-limiting logic that should in theory mitigate this,
but alas, that rate-limiting must be disabled on powerpc because of
its get_timer() implementation - get_timer() works just fine until
interrupts are disabled, but it just so happens that the "big"
flush_cache() call happens in the part of bootm where interrupts are
indeed disabled. [1] [2] [3]
I have checked with objdump that the generated code doesn't change
when this option is left at its default value of 0: gcc is smart
enough to see that the ">=" comparison is tautologically true, hence
all assignments to "flushed" are eliminated as dead stores.
On our board, setting the option to something like 65536 ends up
reducing total boottime by about 0.8 seconds.
[1] https://patchwork.ozlabs.org/project/uboot/patch/[email protected]/
[2] https://lists.denx.de/pipermail/u-boot/2021-April/446906.html
[3] https://lists.denx.de/pipermail/u-boot/2021-April/447280.html
Reviewed-by: Stefan Roese <[email protected]>
Signed-off-by: Rasmus Villemoes <[email protected]>
|
|
CONFIG_5xx hasn't existed since commit 502589777416 (powerpc, 5xx:
remove support for 5xx). Remove this last mention of it.
Reviewed-by: Stefan Roese <[email protected]>
Signed-off-by: Rasmus Villemoes <[email protected]>
|
|
Having WATCHDOG_RESET() called automatically from the timer interrupt
runs counter to the idea of a watchdog device - if the board runs into
an infinite loops with interrupts still enabled, the watchdog will
never fire.
When using CONFIG_(SPL_)WDT, the watchdog_reset function is a lot more
complicated than just poking a few SOC-specific registers - it
involves accessing all kinds of global data, and if the interrupt
happens at the wrong time (say, in the middle of an WATCHDOG_RESET()
call from ordinary code), that can end up corrupting said global data.
Allow the board to opt out of calling WATCHDOG_RESET() from the timer
interrupt handler by setting CONFIG_SYS_WATCHDOG_FREQ to 0 - as that
setting is currently nonsensical (it would be compile-time
divide-by-zero), it cannot affect any existing boards.
Add documentation for both the existing and extended meaning of
CONFIG_SYS_WATCHDOG_FREQ.
Signed-off-by: Rasmus Villemoes <[email protected]>
|
|
The code, which is likely copied from arch/powerpc/lib/interrupts.c,
lacks a fallback definition of CONFIG_SYS_WATCHDOG_FREQ and refers to
a non-existing timestamp variable - obviously priv->timestamp is
meant.
Signed-off-by: Rasmus Villemoes <[email protected]>
|
|
Some boards don't work with the rate-limiting done in the generic
watchdog_reset() provided by wdt-uclass.
For example, on powerpc, get_timer() ceases working during bootm since
interrupts are disabled before the kernel image gets decompressed, and
when the decompression takes longer than the watchdog device
allows (or enough of the budget that the kernel doesn't get far enough
to assume responsibility for petting the watchdog), the result is a
non-booting board.
As a somewhat hacky workaround (because DT is supposed to describe
hardware), allow specifying hw_margin_ms=0 in device tree to
effectively disable the ratelimiting and actually ping the watchdog
every time watchdog_reset() is called. For that to work, the "has
enough time passed" check just needs to be tweaked a little to allow
the now==next_reset case as well.
Suggested-by: Christophe Leroy <[email protected]>
Signed-off-by: Rasmus Villemoes <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
|
|
Signed-off-by: Tom Rini <[email protected]>
|
|
Enable support for PCIe NVMe devices.
Signed-off-by: Marek Vasut <[email protected]>
|
|
Enable CONFIG_SYS_FLASH_PROTECTION on Salvator-X(S), ULCB, Ebisu,
which means the Spansion HF PPB protection bits can be operated
using the 'protect' U-Boot command.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Nobuhiro Iwamatsu <[email protected]>
|
|
Synchronize Gen2 MSTP teardown tables with datasheet Rev.2.00
Feb 01, 2016. This corrects the following bits:
- added H2 MSTP3[10] SCIF2
- added H2/M2/E2 MSTP7[29] TCON
- removed E2 MSTP5[22] Thermal Sensor
- removed E2 MSTP10[31,24:22] SRC0, SRC7:9
Signed-off-by: Marek Vasut <[email protected]>
Cc: Nobuhiro Iwamatsu <[email protected]>
|
|
The clock driver used a heavy-handed approach where it turned off
all available clocks, while also possibly setting bits which are not
documented in the R-Car datasheet. Update the tables so that only
the bits which are documented are set or cleared when tearing down
the clock driver.
Note that the only clock left running before booting Linux are now
MFIC, INTC-AP, INTC-EX and SCIF2 / SCIF0 on V3x.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Nobuhiro Iwamatsu <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: Tom Rini <[email protected]>
|
|
Import updated devicetree files from the Linux v5.12 release.
Besides some node and audio port renames this changes the PHY modes to
either rgmii-id or rgmii-txid. From the board files the Pinephone sees
a lot of updates.
This also adds the long missing USB PHY property for controller 0, which
allows the U-Boot PHY driver to eventually use port 0 in host mode
(pending another U-Boot patch).
Signed-off-by: Andre Przywara <[email protected]>
Reviewed-by: Jernej Skrabec <[email protected]>
|
|
Update R40 .dts{,i} and dt-binding headers to current version from kernel.
Files taken from Linux 5.12-rc1 release
(commit fe07bfda2fb9cdef8a4d4008a409bb02f35f1bd8)
Signed-off-by: Ivan Uvarov <[email protected]>
Reviewed-by: Andre Przywara <[email protected]>
Signed-off-by: Andre Przywara <[email protected]>
|
|
Commit eb5a2b671075 ("net: sun8i-emac: Determine pinmux based on SoC,
not EMAC type") switched the pinmux setup over to look at
CONFIG_MACH_SUN* symbols, to find the appropriate mux value.
Unfortunately this patch missed to check for the H5, which is
pin-compatible to the H3, but uses a different Kconfig symbol (because
it has ARMv8 vs. ARMv7 cores).
Replace the pure SUN8I_H3 symbol with the joint SUNXI_H3_H5 one, which is
there to cover the peripherals common to both SoCs.
Also explicitly list each supported SoC, and have an error message in the
fallback case, to avoid those problems in the future.
This fixes Ethernet support on all H5 boards.
Signed-off-by: Andre Przywara <[email protected]>
Tested-by: Samuel Holland <[email protected]> # Orange Pi PC2
Reviewed-by: Ramon Fried <[email protected]>
|
|
This patch adds support for the following I2C devices connected to
I2C bus 0 on the Octeon EBB7304:
- Dallas DS1337 RTC
- TLV EEPROM
Signed-off-by: Aaron Williams <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
Cc: Chandrakala Chavva <[email protected]>
Cc: Daniel Schwierzeck <[email protected]>
|
