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Enable the DM_RNG virtio random number generator driver in order to
consume entropy within U-Boot. This allows U-Boot to inject entropy to the
kernel via UEFI, so the kernel can use that early, for instance for
address layout randomisation, or when the kernel does not provide an
entropy driver itself.
Signed-off-by: Debbie Horsfall <[email protected]>
Reviewed-by: Andre Przywara <[email protected]>
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U-Boot now stashes its bootstage buffer into a reserved memory region
whenever CONFIG_BOOTSTAGE_STASH is enabled, just before exiting to the
kernel. This allows a post boot parser to read a unified timeline
(SPL→U-Boot→Kernel→MCU/DSP) directly from DDR, enabling standardized
and repeatable boot-time profiling across releases and SoCs.
Change summary:
Call bootstage_stash_default() in announce_and_cleanup()
when CONFIG_BOOTSTAGE_STASH is set.
Reference boot-time parser utility:
https://github.com/v-singh1/boot-time-parser
Sample boot time report:
+--------------------------------------------------------------------+
am62xx-evm Boot Time Report
+--------------------------------------------------------------------+
Device Power On : 0 ms
SPL Time : 843 ms
U-Boot Time : 2173 ms
Kernel handoff time : 462 ms
Kernel Time : 2522 ms
Total Boot Time : 6000 ms
+--------------------------------------------------------------------+
+--------------------------------------------------------------------+
Bootloader and Kernel Boot Records
+--------------------------------------------------------------------+
BOOTSTAGE_AWAKE = 0 ms (+ 0 ms)
BOOTSTAGE_START_UBOOT_F = 843 ms (+ 0 ms)
BOOTSTAGE_ACCUM_DM_F = 843 ms (+ 0 ms)
BOOTSTAGE_START_UBOOT_R = 1951 ms (+1108 ms)
BOOTSTAGE_ACCUM_DM_R = 1951 ms (+ 0 ms)
BOOTSTAGE_NET_ETH_START = 2032 ms (+ 81 ms)
BOOTSTAGE_NET_ETH_INIT = 2053 ms (+ 21 ms)
BOOTSTAGE_MAIN_LOOP = 2055 ms (+ 2 ms)
BOOTSTAGE_START_MCU = 2661 ms (+606 ms)
BOOTSTAGE_BOOTM_START = 2959 ms (+298 ms)
BOOTSTAGE_RUN_OS = 3016 ms (+ 57 ms)
BOOTSTAGE_BOOTM_HANDOFF = 3016 ms (+ 0 ms)
BOOTSTAGE_KERNEL_START = 3478 ms (+462 ms)
BOOTSTAGE_KERNEL_END = 6000 ms (+2522 ms)
+--------------------------------------------------------------------+
+--------------------------------------------------------------------+
MCU Boot Records
+--------------------------------------------------------------------+
MCU_AWAKE = 2661 ms (+ 0 ms)
BOARD_PERIPHERALS_INIT = 2661 ms (+ 0 ms)
MAIN_TASK_CREATE = 2661 ms (+ 0 ms)
FIRST_TASK = 2662 ms (+ 1 ms)
DRIVERS_OPEN = 2662 ms (+ 0 ms)
BOARD_DRIVERS_OPEN = 2662 ms (+ 0 ms)
IPC_SYNC_FOR_LINUX = 6636 ms (+3974 ms)
IPC_REGISTER_CLIENT = 6636 ms (+ 0 ms)
IPC_SUSPEND_TASK = 6636 ms (+ 0 ms)
IPC_RECEIVE_TASK = 6636 ms (+ 0 ms)
IPC_SYNC_ALL = 6787 ms (+151 ms)
+--------------------------------------------------------------------+
Signed-off-by: Vishnu Singh <[email protected]>
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Add MIDR entry for Cortex-A720 core.
Signed-off-by: Marek Vasut <[email protected]>
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In order for the U-Boot specific tests we've added (along with the long
line test) to be run on ".env" files as well, we need to update the line
in the process function that starts to limit the file extensions that we
test on.
Signed-off-by: Tom Rini <[email protected]>
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The most of OFFSET values are in hex instead of int which is easier for
layout description.
Signed-off-by: Michal Simek <[email protected]>
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Rasmus Villemoes <[email protected]> says:
This all started from me wondering "why does this standalone app end
up being so huge"? Oh, it essentially links in its own standard C
library to get strlen() and snprintf(). Which then led to asking "why
don't we export all those standard C functions when we have them
anyway?".
CI has chewed on these and seem happy - it was CI which told me about
the necessity of [1/9]: https://github.com/u-boot/u-boot/pull/813
Link: https://lore.kernel.org/r/[email protected]
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There have been quite a few changes to _exports.h since the last
update of XF_VERSION, also before the previous patches in this series.
I doubt the mechanism is actually being used in practice, it is simply
too fragile: Not only does the list of exported functions depend on
.config, so with the same XF_VERSION the jump table entries could have
different offsets. But getting to the jump table itself from gd to
even call the ->get_version() is fragile, since offsetof(gd_t, jt)
can, and does, change. For example, as recently as commit
d9902107027 ("global_data: Remove jump table in SPL").
One really must build one's standalone app against the proper U-Boot
version and config.h. But for good measure, do bump it now.
Signed-off-by: Rasmus Villemoes <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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The current list of exported functions lacks quite a few bog-standard C
library functions that we might as well expose, since U-Boot certainly
has them implemented anyway. There's no reason a standalone
application should have its own strlen() implementation or link in a
copy from some tiny libc.
For a customer's standalone app, this means it goes from 95K to 10K.
More importantly, we can ditch the custom toolchain including a
newlibc used to build the standalone app and just use the same
toolchain as used to build u-boot itself.
Signed-off-by: Rasmus Villemoes <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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The current list of exported functions is somewhat of a
mess. Reorganize them so that related functionality is kept together:
- console I/O: move vprintf next to printf and the getc/putc functions
- integer parsing: move the *strto* functions together
- standard string.h stuff: move memset() and strcpy() next to strcmp()
- time: move mdelay() next to udelay() and get_timer()
Signed-off-by: Rasmus Villemoes <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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After finishing a later patch in this series, I discovered I had
neglected to update the list of declarations in exports.h to
match. But then I realized I wasn't the first to do that.
Use the existing mechanism and DRY it out.
Signed-off-by: Rasmus Villemoes <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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The !CONFIG_PHY_AQUANTIA defines were already superfluous since
_exports.h does have a CONFIG_PHY_AQUANTIA, so the entries never
existed. In fact, it couldn't have worked, because the defines would
affect both occurences of the mdio_get_current_dev identifier in the
EXPORT_FUNC(mdio_get_current_dev, struct mii_dev *,
mdio_get_current_dev, void)
so the C code would end up containing four copies of
gd->jt->dummy = dummy
but struct jt_funcs would not and does not have any 'dummy' member.
Now that nothing in _exports.h refers to dummy(), remove the empty
function.
Signed-off-by: Rasmus Villemoes <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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Signed-off-by: Rasmus Villemoes <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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As for the i2c functions, drop the dummy entries that, if ever used,
would just have the standalone app get some random content in the
return register.
While deprecated, the spi_{setup,free}_slave functions do exist even
with CONFIG_DM_SPI - and a standalone app can't really do anything but
refer to a spi device via a (bus, cs) pair.
Eventually, one should probably export some function that could allow
a standalone app to get a struct udevice* corresponding to either a
full DT path, an alias, or perhaps a label (provided one builds with
-@), and then export functions that can operate on that.
Signed-off-by: Rasmus Villemoes <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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There's really no good reason to create stub entries that would call a
function that doesn't even return anything sensible.
The existence of these two i2c_* functions depends on
CONFIG_IS_ENABLED(SYS_I2C_LEGACY), which does depend on !DM_I2C, but
is not equivalent to it. They are probably rather hard to use unless
CMD_I2C and something in U-Boot has called "i2c dev foo" to set the
current i2c bus before calling the standalone app, so keep that
dependency.
Signed-off-by: Rasmus Villemoes <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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Currrently, malloc and free are function-like macros, while calloc,
realloc and memalign are object-like macros.
Usually, this doesn't matter, but it does when the identifiers appear
without a following open parenthesis, such as when their address is
taken for building the export table. Adding calloc or realloc to that
table breaks the build on sandbox due to this inconsistency.
Signed-off-by: Rasmus Villemoes <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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https://gitlab.denx.de/u-boot/custodians/u-boot-imx into next
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/27737
- Add support for i.MX94 EVK.
- Set CONFIG_ETHPRIME to eth0 on phycore-imx93.
- Expand the nxp_fspi support to i.MX8QXP/8DXL/8ULP.
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Add PCIE1 and PCIE2 ECAM space and outbound space to MMU pagetable,
so A55 can access them.
Signed-off-by: Ye Li <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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Add i.MX8ULP flexspi compatible string and driver data.
The flexspi on i.MX8ULP only has 16 LUT sequences and uses 1KB RX FIFO.
Signed-off-by: Ye Li <[email protected]>
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According to i.MX8DXL A1 errata ERR050601, concurrent read accesses
from the A35 cores to the peripherals within the LSIO subsystem
(region 0_5DXX_XXXX) and address spaces in the regions
[0_0000_0000 – 0_1BFF_FFFF] and [4_0000_0000 – 4_3FFF_FFFF] can collide
and cause data corruption in the returned data, with no failure report.
Even a single A35 core accessing both these regions can trigger the issue
because an A35 core can have more than one parallel read operation in
progress.
The flexspi0 AHB memory is in LSIO region mentioned in above errata.
So we can't use AHB read, only can read data from FIFO.
Add the compatible string for 8DXL and use a flag for the IPS read.
Signed-off-by: Ye Li <[email protected]>
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Add the compatible string and driver data for i.MX8QXP.
Signed-off-by: Ye Li <[email protected]>
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Use a dedicated LUT (second last) for AHB read command, so we can
directly read from the AHB memory-mapped address and booting M core
for XIP on Flexspi NOR.
Signed-off-by: Ye Li <[email protected]>
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Set ethprime to eth0 since FEC interface is considered the primary IF on
phyCORE-i.MX93 SoM based boards. This comes from the fact that the same
bootloader is reused for both carrier boards, that is phyBOARD-Segin and
phyBOARD-Nash which both use different Ethernet PHYs on the EQOS (eth1)
interface and thus eth1 cannot be used as a prime.
Signed-off-by: Primoz Fiser <[email protected]>
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Add board-level code and defconfig for the i.MX943 EVK board, supporting
multiple SOM variants: 19x19 LPDDR5, 19x19 LPDDR4 and 15x15 LPDDR4.
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Alice Guo <[email protected]>
Acked-by: Peng Fan <[email protected]>
Reviewed-by: Jacky Bai <[email protected]>
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Introduce the base dtsi files for the i.MX943 EVK board. These files
define the essential components such as messaging units, uSDHC, GPIOs
and lpuart for board bring-up.
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Alice Guo <[email protected]>
Acked-by: Peng Fan <[email protected]>
Reviewed-by: Jacky Bai <[email protected]>
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Extend display_life_cycle() to support i.MX94.
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Jacky Bai <[email protected]>
Signed-off-by: Alice Guo <[email protected]>
Acked-by: Peng Fan <[email protected]>
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The register reflects lifecycle and some lifecycle-derived state of
i.MX95 has new offset address and layout, so display_life_cycle() is
added specifically for it.
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Alice Guo <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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Due to i.MX95 has reserved first 256MB DDR, change to use the DDR
start address in u-boot as the container header buffer.
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Alice Guo <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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Define the daisy register offset for i.MX94 at 0x608 within the iomuxc
register space. This enables correct pad selection for daisy chain
configuration on i.MX94 platforms.
Signed-off-by: Jacky Bai <[email protected]>
Signed-off-by: Alice Guo <[email protected]>
Acked-by: Peng Fan <[email protected]>
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Extend get_imageset_end() to handle i.MX94 family.
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Jacky Bai <[email protected]>
Signed-off-by: Alice Guo <[email protected]>
Acked-by: Peng Fan <[email protected]>
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i.MX94
- Add base addresses for WDG3, WDG4, GPIO6, and GPIO7 for i.MX94.
- Introduce common.h with macros of clock IDs, power domains, and CPU
types for platform-specific replacement (e.g., i.MX94, i.MX95).
- Extend imx_get_mac_from_fuse() to support i.MX94.
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Alice Guo <[email protected]>
Acked-by: Peng Fan <[email protected]>
Reviewed-by: Jacky Bai <[email protected]>
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Update get_reset_reason() to support i.MX94 to send message to the
System Manager to retrieve the LM/system last booted/shutdown reasons.
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Alice Guo <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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reasons
System Manager provides the last booted and shutdown reasons of the
logical machines (LM) and system using the SCMI misc protocol (Protocol
ID: 0x84, Message ID: 0xA). This path adds get_reset_reason() to query
and print these reasons in SPL and U-Boot.
Signed-off-by: Peng Fan <[email protected]>
Signed-off-by: Alice Guo <[email protected]>
Reviewed-by: Ye Li <[email protected]>
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Add a case for i.MX94 to return the correct string identifier in the
get_imx_type_str() function. This ensures proper CPU type reporting for
i.MX94 platforms.
Signed-off-by: Alice Guo <[email protected]>
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Introduce support for the new i.MX94 processor, including its CPU type
and SoC-level Kconfig entry.
The i.MX94 is a new member of the i.MX9 family. It uses a System Manager
to handle system-level functions such as power, clock, sensor and pin
control. The System Manager runs on a Cortex-M processor, while the
Cortex-A processor communicates with it via the ARM SCMI protocol and a
messaging unit.
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Alice Guo <[email protected]>
Acked-by: Peng Fan <[email protected]>
Reviewed-by: Jacky Bai <[email protected]>
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- Tighten some USB dependencies and remove some unused code.
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Initialize mtd->writesize in nand_init() as otherwise
nand_page_size() returns 0 and this affects NAND read
operations.
Signed-off-by: Yegor Yefremov <[email protected]>
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- Update MMC entry to match 'mmc' using 'N'
- Add myself as POWER maintainer for regulator and pmic patches. I have
started to handle relevant patches.
- Update QORIQ maintainer. Priyanka has moved to work on other stuff, I
have been handling this for quite some time.
Signed-off-by: Peng Fan <[email protected]>
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Add myself as a maintainer of the NETWORK subsystem since:
- I have effectively been handling net patches in my patchwork queue and
sending pull requests to Tom,
- I do have push access to the u-boot-net custodian tree.
Also, add u-boot-net as the SCM tree for NETWORK (LWIP) since it is where
lwIP-related patches end up too.
Signed-off-by: Jerome Forissier <[email protected]>
CC: Ramon Fried <[email protected]>
CC: Joe Hershberger <[email protected]>
CC: Tom Rini <[email protected]>
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RZG2 boot failure fix for boot with TFA which does not pass DT, and
R-Car Gen4 PCIe controller driver alignment with Linux fixes.
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A few of the USB musb-new host glue drivers cannot build without access
to some platform specific header files. Express those requirements in
Kconfig as well.
Reviewed-by: Marek Vasut <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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A few of the USB host drivers cannot build without access to some
platform specific header files. Express those requirements in Kconfig as
well.
Reviewed-by: Marek Vasut <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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This driver was never enabled by any platforms after being added to the
tree over 5 years ago. Remove it.
Signed-off-by: Tom Rini <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
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This driver is unused since the removal of the bcm28155_ap board in
commit 0f6807e77b07 ("arm: Remove bcm28155_ap board"). Remove it.
Fixes: 0f6807e77b07 ("arm: Remove bcm28155_ap board")
Signed-off-by: Tom Rini <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
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This driver requires some mach-at91 specific header files in order to build.
Express that requirement in Kconfig as well.
Reviewed-by: Marek Vasut <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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A few of the platform specific DWC3 host glue drivers cannot build
without access to some platform specific header files. Express those
requirements in Kconfig as well.
Reviewed-by: Marek Vasut <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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R-Car V4H Reference Manual R19UH0186EJ0130 Rev.1.30 Apr. 21, 2025 page 585
Figure 9.3.2 Software Reset flow (B) indicates that for peripherals in HSC
domain, after reset has been asserted by writing a matching reset bit into
register SRCR, it is mandatory to wait 1ms.
Because it is the controller driver which can determine whether or not the
controller is in HSC domain based on its compatible string, add the missing
delay into the controller driver.
This 1ms delay is documented on R-Car V4H and V4M, it is currently unclear
whether S4 is affected as well. This patch does apply the extra delay on
R-Car S4 as well.
Signed-off-by: Marek Vasut <[email protected]>
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Assure the reset is latched and the core is ready for DBI access.
On R-Car V4H, the PCIe reset is asynchronized and does not take
effect immediately, but needs a short time to complete. In case
DBI access happens in that short time, that access generates an
SError. Make sure that condition can never happen, read back the
state of the reset which should turn the asynchronized reset into
synchronized one, and wait a little over 1ms to add additional
safety margin.
Signed-off-by: Marek Vasut <[email protected]>
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R-Car V4H Reference Manual R19UH0186EJ0130 Rev.1.30 Apr. 21, 2025 page 4581
Figure 104.3b Initial Setting of PCIEC(example), third quarter of the figure
indicates that register 0xf8 should be polled until bit 18 becomes set to 1.
Register 0xf8 bit 18 is 0 immediately after write to PCIERSTCTRL1 and is set
to 1 in less than 1 ms afterward. The current readl_poll_timeout() break
condition is inverted and returns when register 0xf8 bit 18 is set to 0,
which in most cases means immediately. In case CONFIG_DEBUG_LOCK_ALLOC=y ,
the timing changes just enough for the first readl_poll_timeout() poll to
already read register 0xf8 bit 18 as 1 and afterward never read register
0xf8 bit 18 as 0, which leads to timeout and failure to start the PCIe
controller.
Fix this by inverting the poll condition to match the reference manual
initialization sequence.
Signed-off-by: Marek Vasut <[email protected]>
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On the RZG2L platform, the advised
TF-A (https://github.com/renesas-rz/rzg_trusted-firmware-a/tree/v2.5/rzg2l)
does not pass any DTB blob to U-Boot.
On the other hand, the RZG2L part of U-Boot expects a DTB to be passed. It
means that if one flashes the latest TF-A as well as the mainline U-Boot,
it will crash trying to dereference the NULL DTB pointer before outputing
anything.
Check if the DTB pointer is NULL before trying to use it.
Signed-off-by: Mathieu Othacehe <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
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This was apparently not built for several years: Since a2535243e011,
optee_copy_fdt_nodes implicitly works against the U-Boot dt. We
therefore have to tweak its reference before using the function and
restore things afterwards.
If it had been built, actually trying it out would have failed next: We
need CONFIG_OPTEE_LIB to actually build the function that is primarily
being tested here. And we need to re-initialize target fdt, now that the
tests may run in random order.
Fixes: a2535243e011 ("lib: optee: migration optee_copy_fdt_nodes for OF_LIVE support")
Fixes: ba2feaf41435 ("test: Split optee tests into three functions")
Signed-off-by: Jan Kiszka <[email protected]>
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