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https://source.denx.de/u-boot/custodians/u-boot-microblaze
AMD/Xilinx/FPGA changes for v2025.07-rc4
usb:
- Fix regulator handling
net:
- Fix MII clock handling
phy:
- Fix GTR line logic for sgmii
pci:
- Fix pcireg_base logic
fpga:
- Fix change handling in intel_sdm_mb driver
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board_init_f for the am62a is missing the call to spl_enable_cache which
exists for all other am62 platforms (check am625_init.c &
am62p5_init.c).
This allows the usage of caches while loading and parsing the u-boot.img
FIT resulting in ~2x speedup in the A53 SPL stage.
Signed-off-by: Anshul Dalal <[email protected]>
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There are common MMC args for TI plats in include/environment/ti/mmc.env.
Since we already include this, there is no need to redefine these
MMC vars. Use the defaults.
This seems like something that could have been done while refactoring
these vars in the first place as it happened after this AM62A file
was available hence the fixes tag.
Reported-by: Chirag Shilwant <[email protected]>
Fixes: 3709b529156e ("env: ti: mmc.env: Move mmc related args to common place")
Signed-off-by: Andrew Davis <[email protected]>
Reviewed-by: Neha Malcom Francis <[email protected]>
Acked-by: Chirag Shilwant <[email protected]>
Reviewed-by: Judith Mendez <[email protected]>
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This clears UHS_MODE_SELECT for timing modes <= MMC_HS_52.
When initializing to HS400 mode, the host controller downgrades to non-uhs
modes so clear UHS_MODE_SELECT at modes <= MMC_HS_52.
This fixes eMMC writes on j7200 EVM.
Fixes: 6067aa66b3bb ("mmc: am654_sdhci: Add am654_sdhci_set_control_reg")
Signed-off-by: Judith Mendez <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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The condition here is reversed, which makes link and coral very slow,
leading to lab failures.
Fixes 6c171f7a184 ("common: board: make initcalls static")
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Jerome Forissier <[email protected]>
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This file uses SZ_1G but does not directly include <linux/sizes.h>, add
it.
Signed-off-by: Tom Rini <[email protected]>
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Apart from ENOENT observing return value as ENOSYS when
!DM_REGULATOR that's why cover both configurations.
Changed code is not working as operation should be "&&"
not "||" (ret != -ENOENT && ret != -ENOSYS).
Also fix the remove function where the regulator_set_enable_if_allowed()
function is returning an error.
Signed-off-by: Padmarao Begari <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/a2d520f14efc30fc28ec59881205e156dabbfcd9.1744350937.git.michal.simek@amd.com
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This adds initial support for the Toradex Verdin AM62P module.
The module consists of an TI AM62P family SoC, a TPS65219 PMIC, a
Gigabit Ethernet PHY, up to 8GB of LPDDR4 RAM, an eMMC, a TLA2024 ADC,
an I2C EEPROM, an RX8130 RTC, plus an optional Bluetooth/Wi-Fi module.
These specific changes adds support for Toradex Verdin AM62P Quad 2GB WB
IT module.
Link: https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p
Link: https://www.toradex.com/products/carrier-board/verdin-development-board-kit
Signed-off-by: Parth Pancholi <[email protected]>
Signed-off-by: Vitor Soares <[email protected]>
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The kernel added new size definitions and substituted the
boilerplate/reference to the license with a SPDX identifier.
Drop a local SZ_8G definition in MediaTek MT7988 SoC board file.
Signed-off-by: Emanuele Ghidoli <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Reviewed-by: Weijie Gao <[email protected]>
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Add the new PID4 to the ConfigBlock handling:
- 0098 Aquila iMX95 Hexa 16GB WB IT
- 0099 Verdin AM62P Quad 2GB WB IT
- 0201 SMARC iMX95 Hexa 8GB IT
- 0202 SMARC iMX95 Hexa 4GB WB IT
- 0203 SMARC iMX95 Hexa 4GB ET
- 0204 SMARC iMX95 Hexa 2GB WB IT
- 0205 SMARC iMX95 Hexa 2GB ET
- 0206 SMARC iMX8M Plus Quad 4GB IT
- 0207 SMARC iMX8M Plus Quad 2GB WB IT
- 0208 SMARC iMX8M Plus Quad 2GB IT
- 0209 SMARC iMX8M Plus Quadlite 1GB WB ET
- 0210 SMARC iMX8M Plus Quadlite 1GB ET
- 0211 Aquila AM69 Octa 32GB IT
- 0212 Aquila AM69 Octa 16GB WB IT
- 0213 Aquila AM69 Octa 16GB IT
- 0214 Aquila AM69 Octa 8GB WB IT
- 0215 Aquila AM69 Octa 8GB IT
Signed-off-by: Vitor Soares <[email protected]>
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implement a driver to use semtech pinctrl and
gpio expander, this driver is adapted from a
existent linux driver that is written by
Gregory Bean <[email protected]>.
Signed-off-by: Anis Chali <[email protected]>
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Prevent file descriptor leaks by properly closing 'fd' and 'new_fd'
when fstat() or write() operations fail.
- Added close(fd) before return in open_for_read() if fstat() fails.
- Added close(new_fd) before return in write_image() if write() fails.
- No close needed if open() fails (fd == -1 is invalid).
Signed-off-by: Anton Moryakov <[email protected]>
Reviewed-by: Quentin Schulz <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-snapdragon
More Qualcomm fixes for 2025.07
* Adjust fdtfile logic to support more boards
* Support linux,code variable in qcom-pmic button driver
* Minor CLK API adjustments and apq8096/msm8916 fixes
* vbus regulator register fixes
* dragonboard410c KASLR support and other fixes
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Tom Rini <[email protected]> says:
Hey all,
Related to my other series I've posted recently on cleaning up some
headers, this series here is the result of at least lightly auditing the
#includes used in include/[a-m]*.h. This ignores subdirectories, as at
least in part I think the top-level includes we've constructed are the
most likely places to have some extra transitive include paths. I'm sure
there's exceptions and I'll likely audit deeper once this first pass is
done. This only gets as far as "include/m*.h" because I didn't want this
to get too big. This also sets aside <miiphy.h> and <phy.h>. While
miiphy.h does not directly need <phy.h> there are *so* many users and I
think I had half of the tree just about not building when I first tried.
It might be worth further investigation, but it might just be OK as-is.
Link: https://lore.kernel.org/r/[email protected]
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The value of "ETH_ALEN" is defined to 6 in <linux/if_ether.h>. This file
is included in <net.h>. In the places where we had ETH_ALEN but no
direct include of <net.h>, add <linux/if_ether.h>. In the places where
we had a custom name used, make use of ETH_ALEN instead.
Signed-off-by: Tom Rini <[email protected]>
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There are only a few things found in <mtd.h> today. Go through and audit
the C files which include <mtd.h> and remove it when not required. Then,
add it to the files which had either missed it or had an indirect
inclusion of it.
Signed-off-by: Tom Rini <[email protected]>
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This file does not need <linux/sizes.h> nor <linux/compiler.h> so remove
them. This exposes however that a number of other files had been relying
on this implicit include for <linux/sizes.h> so add that where needed.
Signed-off-by: Tom Rini <[email protected]>
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At this point in time, <ide.h> provides the IDE_BUS macro and the
function prototype for ide_set_reset, which is used with IDE_RESET. The
only files which should include this header are the ones that either use
that macro or that function. Remove <blk.h> from <ide.h> and remove
<ide.h> from places which do not need it.
Signed-off-by: Tom Rini <[email protected]>
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This file does not need <asm/cache.h> so remove it. However the file
common/spl/spl_fat.c does need it, so add it there.
Signed-off-by: Tom Rini <[email protected]>
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In include/efi_loader.h we do not directly need <log.h>, <part_efi.h>,
<pe.h> nor <linux/oid_registry.h> so remove them. In include/efi_tcg2.h
we make use of <part_efi.h> but did not include it, so add it directly.
Reviewed-by: Ilias Apalodimas <[email protected]>
Tested-by: Ilias Apalodimas <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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This file does not need <asm/cache.h> so remove it.
Signed-off-by: Tom Rini <[email protected]>
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This file does not need <edid.h> so remove it.
Signed-off-by: Tom Rini <[email protected]>
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This file does not need a forward declaration of 'struct list_head' as
it includes <linux/list.h> so remove it.
Reviewed-by: Mattijs Korpershoek <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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This file does not need <time.h> so remove it.
Signed-off-by: Tom Rini <[email protected]>
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This file does not need <compiler.h> but does directly need
<linux/types.h>.
Signed-off-by: Tom Rini <[email protected]>
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This file does not need <linux/mtd/mtd.h> but does directly need
<linux/types.h>.
Signed-off-by: Tom Rini <[email protected]>
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This file does not need <linux/list.h> so remove it.
Signed-off-by: Tom Rini <[email protected]>
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This file does not need <linux/list.h> but does directly need
<linux/types.h>.
Signed-off-by: Tom Rini <[email protected]>
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This file does not need <pc.h> but does directly need
<linux/types.h>. Furthermore, arch/x86/lib/bios.c was getting <pci.h>
via <bios_emul.h> so add it there.
Signed-off-by: Tom Rini <[email protected]>
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This file does not need <linux/printk.h> but does directly need
<linux/types.h>.
Signed-off-by: Tom Rini <[email protected]>
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This file does not need <pci.h> but does directly need <linux/types.h>.
Signed-off-by: Tom Rini <[email protected]>
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Align U-Boot image end to 8 bytes to make sure DT alignment requirement
is fulfilled. This fixes a possible failure in fdt_find_separate() in
case the U-Boot image is aligned to 4 Bytes and DT is appended at the
end at already 8 Byte aligned offset.
Link: https://source.denx.de/u-boot/u-boot/-/issues/30
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Signed-off-by: Marek Vasut <[email protected]>
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Change the vcpumntirq in the GICv3 node from SPI to PPI.
Prevents Linux from complaining:
'[Firmware Bug]: CPU interface incapable of MMIO access'
Fixes: 6d722894fd48 "board: emulation: Add QEMU sbsa support"
Signed-off-by: Patrick Rudolph <[email protected]>
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Keep spelling.txt in sync with the version from kernel v6.15.
Reported-by: Yao Zi <[email protected]>
Reviewed-by: Yao Zi <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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RB1 and RB2 have three root compatibles where the last one can't be used
to decode fdtfile name (qcm* vs qrb*). So rather just rely on the first
compatible to retrieve the SoC name.
Signed-off-by: Sumit Garg <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Casey Connolly <[email protected]>
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Most device vendors put "Volume Down" button onto PMIC RESIN.
But Sony is special: see
dts/upstream/src/arm64/qcom/sdm630-sony-xperia-nile.dtsi or [1].
They put "Volume Down" on PMIC GPIO 7 where others usually put
"Volume Up", and KEY_VOLUMEUP is inside &pon_resin.
Currently if you boot U-Boot on such Sony device, you end up
with 2 "Volume Down" buttons, and no "Volume Up", which makes
navigating menu problematic.
Support reading devicetree "linux,code" property and override
statically defined button code & label based on that.
[1] https://elixir.bootlin.com/linux/v6.15-rc3/source/arch/
arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi#L263
Signed-off-by: Alexey Minnekhanov <[email protected]>
Signed-off-by: Alexey Minnekhanov <[email protected]>
Reviewed-by: Casey Connolly <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Casey Connolly <[email protected]>
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As of commit dc8754e8e408 ("clk/qcom: apq8016: improve clk_enable logging")
there are now warnings in the U-Boot console on DragonBoard 410c:
apq8016_clk_enable: unknown clk id 122
apq8016_clk_enable: unknown clk id 123
apq8016_clk_enable: unknown clk id 124
apq8016_clk_enable: unknown clk id 125
This is because we don't implement enable() properly for the SDCC clocks.
Currently they are being enabled as part of set_rate().
Fix this by moving the enable calls out of the apq8016_clk_init_sdc()
function and convert them to the equivalent GATE_CLK_POLLED() definitions.
Reviewed-by: Neil Armstrong <[email protected]>
Signed-off-by: Stephan Gerhold <[email protected]>
Reviewed-by: Sumit Garg <[email protected]>
Reviewed-by: Casey Connolly <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Casey Connolly <[email protected]>
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Convert the usages of GATE_CLK() in clock-apq8016 to GATE_CLK_POLLED() to
make sure that we poll the status when enabling clocks:
- PRNG_AHB_CLK is a vote clock, so we poll a different register address.
- The USB clocks are simple branches, so enable/poll is the same register.
Reviewed-by: Neil Armstrong <[email protected]>
Signed-off-by: Stephan Gerhold <[email protected]>
Reviewed-by: Sumit Garg <[email protected]>
Reviewed-by: Casey Connolly <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Casey Connolly <[email protected]>
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GATE_CLK() in its current state is unsafe: A simple write to the clock
enable register does not guarantee that the clock is immediately running.
Without polling the clock status, we may issue writes to registers before
the necessary clocks start running. This doesn't seem to cause issues in
U-Boot at the moment, but for example removing the CLK_OFF polling in TF-A
for the SMMU clocks on DB410c reliably triggers an exception during boot.
Make it possible to poll the branch clock status register, by adding a new
GATE_CLK_POLLED() macro that takes the extra register address. Existing
usages work just as before, without polling the clock status. Ideally all
usages should be updated to specify the correct poll address in the future.
The Qualcomm naming for these clocks is "branch" and not "gate", but let's
keep the existing naming for now to avoid confusion until all others
drivers have been converted.
Reviewed-by: Neil Armstrong <[email protected]>
Signed-off-by: Stephan Gerhold <[email protected]>
Reviewed-by: Sumit Garg <[email protected]>
Reviewed-by: Casey Connolly <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Casey Connolly <[email protected]>
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The other clock enable functions in clock-qcom.c use setbits_le32() to
read/modify/write the enable registers. Use the same for qcom_gate_clk_en()
to simplify the code a bit.
Reviewed-by: Neil Armstrong <[email protected]>
Signed-off-by: Stephan Gerhold <[email protected]>
Reviewed-by: Sumit Garg <[email protected]>
Reviewed-by: Casey Connolly <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Casey Connolly <[email protected]>
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This avoids having to inline it separately into every single clock driver,
when U-Boot is built with support for multiple SoCs.
Reviewed-by: Neil Armstrong <[email protected]>
Signed-off-by: Stephan Gerhold <[email protected]>
Reviewed-by: Sumit Garg <[email protected]>
Reviewed-by: Casey Connolly <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Casey Connolly <[email protected]>
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The SDCC_...(n) macros in clock-apq8016.c result in the wrong addresses:
- SDCC1: SDCC_APPS_CBCR(0) = ((0 * 0x1000) + 0x41018) = 0x41018
Should be 0x42018, this is an invalid register close to the USB clocks.
- SDCC2: SDCC_APPS_CBCR(1) = ((1 * 0x1000) + 0x41018) = 0x42018
Should be 0x43018, this is the SDCC1 clock.
When we try to enable SDCC2, we actually end up enabling SDCC1. When we try
to enable SDCC1, we just issue some broken register writes.
This hasn't caused any trouble so far, because the boot firmware is keeping
both SDCC clocks running. However, if these clocks are disabled when
entering U-Boot, MMC initialization is failing.
Fix this by using the proper offset for the macros. The SDCC_CMD_RCGR() was
already correct, but change it the same way for consistency.
Fixes: 085921368b7d ("arm: Add support for Qualcomm Snapdragon family")
Reviewed-by: Neil Armstrong <[email protected]>
Signed-off-by: Stephan Gerhold <[email protected]>
Reviewed-by: Sumit Garg <[email protected]>
Reviewed-by: Casey Connolly <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Casey Connolly <[email protected]>
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Fix and add support for different pmic variants pm8x50b to handle
the vbus regulator.
Signed-off-by: Rui Miguel Silva <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Casey Connolly <[email protected]>
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When booting Linux, there is currently the following warning in the console
when using the default dragonboard410c_defconfig:
[ 0.000000] KASLR disabled due to lack of seed
Fix this by enabling DM_RNG and RNG_MSM in the defconfig to generate the
KASLR seed:
[ 0.000000] KASLR enabled
Signed-off-by: Stephan Gerhold <[email protected]>
Reviewed-by:
Reviewed-by: Sumit Garg <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Casey Connolly <[email protected]>
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At the moment, the dragonboard410c_defconfig specifies a custom
SYS_MALLOC_LEN, lower than the default for Qualcomm boards defined in
arch/arm/mach-snapdragon/Kconfig. It looks like it's too low, since
flashing larger sparse partition images using Fastboot fails with:
FAILED (remote: 'Malloc failed for: CHUNK_TYPE_RAW')
We are not really that memory-constrained for U-Boot on DB410c, so fix
this by just dropping the custom malloc size and using the default.
Signed-off-by: Stephan Gerhold <[email protected]>
Reviewed-by:
Reviewed-by: Sumit Garg <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Casey Connolly <[email protected]>
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Commit 359e1d4a57e0 ("board: dragonboard410c: Use button_cmd instead of
custom code") was made in parallel with commit 8f5685d5d32f ("button:
qcom-pmic: prettify and standardise button labels"), which changed the
default button label from "vol_down" to "Volume Down". This is causing
errors in the console during boot now:
No button labelled 'vol_down'
Fix this by using the new label.
Fixes: 359e1d4a57e0 ("board: dragonboard410c: Use button_cmd instead of custom code")
Fixes: 8f5685d5d32f ("button: qcom-pmic: prettify and standardise button labels")
Signed-off-by: Stephan Gerhold <[email protected]>
Reviewed-by:
Reviewed-by: Sumit Garg <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Casey Connolly <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-dfu into next
u-boot-dfu-20250602
CI: https://source.denx.de/u-boot/custodians/u-boot-dfu/-/pipelines/26466
Usb gadget:
dwc2: Fix incorrect ULPI_UTMI_SEL bit setting
dwc2: Fix HBstLen setting for external DMA mode
dwc2: Various refactors to get the code closer to Linux
dwc2: Support reset logic for v4.20a
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https://source.denx.de/u-boot/custodians/u-boot-i2c
i2c bugfixes for v2025.07-rc4
- designware_i2c: fix globally wrong return value -1 into -ETIMEDOUT
in driver, which leaded in silent errors as a timeout resulted in
an uninitialized value being returned, potentially causing
unexpected behavior.
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CI: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/26455
Thanks Conor and Yao for catching this issue.
- Revert "RISC-V 32/64 images support" to fix compatibility issue
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Change the return value for timeout errors in i2c-designware from 1 to
-ETIMEDOUT. Returning errors as negative values is standard practice in the
u-boot, which enhances error handling consistency across the codebase.
The current behavior can lead to silent errors when functions check for
negative return values to identify errors. For example, in
`dm_i2c_reg_read` from i2c-uclass.c, a timeout results in an uninitialized
value being returned, potentially causing unexpected behavior.
Cc: Heiko Schocher <[email protected]>
Cc: Tom Rini <[email protected]>
Cc: Wojciech Szamocki <[email protected]>
Signed-off-by: Wojciech Szamocki <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
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