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Add initial support for Airoha AN7581 SoC. This adds the initial Kconfig
and Makefile entry for the SoC, an U-Boot specific DTSI and initial config
for it. Also add the initial code for CPU and RAM initialization.
Signed-off-by: Christian Marangi <[email protected]>
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Since commit 61040097a9d1 ("reset: at91: Add reset driver for basic
assert/deassert operations") the "atmel,sama5d3-rstc" compatible for
the sama5d2 reset controller in sama5d2.dtsi is not handled by
CONFIG_SYSRESET_AT91 anymore, but by CONFIG_RESET_AT91 now.
This resulted in the following error, when trying to reset from the U-Boot
shell on a sama5d27_wlsom1 board:
=> reset
resetting ...
System reset not supported on this platform
### ERROR ### Please RESET the board ###
Fix it by enabling the CONFIG_RESET_AT91 driver in all sama5d27 defconfigs.
Tested on a sama5d27_wlsom1 board.
Based on the fix in commit e1ee52ca56fc ("configs: at91: sam9x60: Switch
to new reset driver")
Fixes: 61040097a9d1 ("reset: at91: Add reset driver for basic assert/deassert operations")
Signed-off-by: Fabio Estevam <[email protected]>
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Enable AVS config
Signed-off-by: Udit Kumar <[email protected]>
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Increase the size of malloc region allocated before relocation, as
current size is insufficient for DFU boot causing it to overflow and
corrupt the stack.
Fixed regulator configs are required by vtt_supply which is used by
"am654_ddrss" driver. Without it during DFU boot DDRSS initialization
is failing. These configs are enabled in "am65x_evm_r5_defconfig" but
are missing from "am65x_evm_r5_usbdfu_defconfig". Fix that by updating
"am65x_evm_r5_usbdfu_defconfig" to include "am65x_evm_r5_defconfig".
Signed-off-by: Hrushikesh Salunke <[email protected]>
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The commit 211b3d726378 ("arm: dts: am3x: Non-functional changes sync
with v6.3-rc6") changed the tilcdc clock names.
Fix the tilcdc driver to use the new clock names.
Signed-off-by: Sukrut Bellary <[email protected]>
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Replace "froced" by "forced"
Signed-off-by: Richard Genoud <[email protected]>
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Udit Kumar <[email protected]> says:
This enables the ESMs and the associated PMIC.
Programming these bits is a requirement to make the watchdog actually reset the board.
After DT sync nodes bucka1 and main_esm has bootph property added in
pmic nodes.
RFC was sent
https://lore.kernel.org/all/[email protected]/
With current patch boot logs
https://gist.github.com/uditkumarti/adb647f86e6d166ea2d0ac98dceb7a9b
reset: https://gist.github.com/uditkumarti/adb647f86e6d166ea2d0ac98dceb7a9b#file-gistfile1-txt-L2344
Link: https://lore.kernel.org/r/[email protected]
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Add CONFIG_ESM_K3 and CONFIG_ESM_PMIC to enable ESM initialization
in J7200.
Signed-off-by: Neha Malcom Francis <[email protected]>
Signed-off-by: Aniket Limaye <[email protected]>
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On J7200 processor board MCU_SAFETY_ERROR signal is routed to PMIC for
ESM error handling. The PMIC resets the board on receipt of the signal.
Enable the support for the board by adding ESM PMIC node.
Signed-off-by: Gowtham Tammana <[email protected]>
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Pull request net-20250314.
kconfig:
* Fix submenu for network commands
net:
* Remove a useless (commented out) line in net-common.h
net-lwip:
* Remove error print on failed tx
* Fix return code of ping_loop() when no ethernet device is found
* Remove superfluous newline in help text for tftp
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The Kconfig parser seems to get confused by the current if conditions
following CMD_NET and displays all network command options directly in
the "Command line interface" menu instead of in a "Network commands"
submenu.
To help out Kconfig we can simplify the if conditions, so that the
definition of CMD_NET is followed immediately by an if/endif block that
contains all network command options. We can also remove nested checks
for CMD_NET or (NET || NET_LWIP).
Fixes: 98ad145db61a ("net: lwip: add DHCP support and dhcp commmand")
Signed-off-by: Paul Barker <[email protected]>
Reviewed-by: Jerome Forissier <[email protected]>
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When an ethernet driver fails to send a frame we print an error in lwIP.
But depending on how often that error is it might significantly delay
transmissions.
For example downloading a big file with the rpi4 spams the console with
'send error: -101', but removing the print makes the file download with
an average speed of ~8.5MiB/s since the packets are retransmitted.
So let's move it to a 'debug' in lwIP and expect ethernet drivers to handle
the failure if it's severe.
Signed-off-by: Ilias Apalodimas <[email protected]>
Reviewed-by: Jerome Forissier <[email protected]>
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Commit 1d5d292b7941 ("net: split net into net{,-common,-legacy,-lwip}")
inadvertendly left a commented out declaration for do_wget() in
net-common.h. Remove it.
Signed-off-by: Jerome Forissier <[email protected]>
Reviewed-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Ilias Apalodimas <[email protected]>
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do_ping() expects ping_loop() to return a negative value on error, so
that it can propagate it to the caller as CMD_RET_FAILURE. This is not
the case when no ethernet device is found, so fix that.
Signed-off-by: Jerome Forissier <[email protected]>
Reviewed-by: Ilias Apalodimas <[email protected]>
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The help text has a newline at the end which will lead to an empty
line after the tftpboot when printing the help overview. Remove it.
Fixes: 4d4d7838127e ("net: lwip: add TFTP support and tftpboot command")
Signed-off-by: Michael Walle <[email protected]>
Reviewed-by: Jerome Forissier <[email protected]>
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During linux build process the header size is computed including the BSS
whereas it's removed when creating the uncompressed image. Therefore the
size of the uncompressed image on filesystem will be smaller than the
size specified in the header.
This causes issues when loading the kernel image from the SPL (as in
falcon boot) with spl_load since it compares the read file size from the
FS to the header size form the image. Which leads to the following check
in `include/spl_load.h` failing to -EIO when loading kernel image:
return read < spl_image->size ? -EIO : 0;
Therefore we should return the header size back to spl_load instead of
the file size in falcon boot when not loading a FIT image.
Bug report:
https://lore.kernel.org/u-boot/[email protected]/
Fixes: 775074165d97 ("spl: Add generic spl_load function")
Reported-by: Anshul Dalal <[email protected]>
Reviewed-by: Sean Anderson <[email protected]>
Signed-off-by: Anshul Dalal <[email protected]>
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CFG_SYS_SPI_* are used in falcon boot to specify the offsets and size of
the respective payloads. This patch moves them to Kconfig keeping the
values consistent for each of the affected boards.
Reviewed-by: Tom Rini <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
Signed-off-by: Anshul Dalal <[email protected]>
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The first 4 block copy channels and rings on AM62P support
High Capacity Block Copy. These channels have approximately
3x improvement over the normal Block copy channels when doing
DDR-to-DDR copy.
Currently, during allocation these channels do not have a
separate interface and are allocated with normal BCDMA channels.
Latest TIFS and DM firmware adds support for differentiating these
High Capcity resources. This update is for allocating these new
resource type to different hosts with below mentioned scheme.
--------------------- --------------- ------------- ----------------
Resource A53_2 MCU_R5 WKUP_R5
--------------------- --------------- ------------- ----------------
BCDMA HC CHAN [4] => 2 (Primary) 1 (Primary) 1 (Primary)
BCDMA HC CHAN RING [4] => 2 (Primary) 1 (Primary) 1 (Primary)
BCDMA CHAN [4] => 18 (Primary) 2 (Primary) 6 (Primary)
BCDMA CHAN RING[4] => 18 (Primary) 2 (Primary) 6 (Primary)
Signed-off-by: Sparsh Kumar <[email protected]>
Signed-off-by: Sebin Francis <[email protected]>
Signed-off-by: Vishal Mahaveer <[email protected]>
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Enable support for USB mass storage class (UMS) via USB0 instance of
USB on AM64x SoC. UMS allows USB host to access U-Boot block device
and enable file transfer.
Example usage of UMS command :
=> mmc list
mmc@fa10000: 0 (eMMC)
mmc@fa00000: 1
=> ums 0 mmc 1
UMS: LUN 0, dev mmc 1, hwpart 0, sector 0x0, count 0x3b72400
Signed-off-by: Hrushikesh Salunke <[email protected]>
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There's no fan in MedisTek's reference design. Disable it for now.
Signed-off-by: Weijie Gao <[email protected]>
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This patch adds pwm support for MediaTek MT7987 SoC.
Signed-off-by: Sam Shih <[email protected]>
Signed-off-by: Weijie Gao <[email protected]>
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The reserved-memory node 'wmcpu-reserved@50000000' only applies to
linux kernel and is useless in u-boot.
Remove it in *-u-boot.dtsi to make this memory region usable.
Fixes: 2d6962e0618 (arm: mediatek: add support for MediaTek MT7987 SoC)
Signed-off-by: Weijie Gao <[email protected]>
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While the dd command actually writes to the block device the truncate
command only updates the metadata (at least on ext4). This is faster and
reduces wear on the block device.
Signed-off-by: Heinrich Schuchardt <[email protected]>
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Caleb Connolly <[email protected]> says:
In Simon's series reworking autoprobe, a discussion came up about
DM_FLAG_PROBE_AFTER_BIND, specifically that it wasn't very clear where
this flag should be used.
This series implements my suggestions made there to clarify the use of
this flag, and fixup the two driver which erroneously apply it to their
driver struct (this does nothing).
Link: https://lore.kernel.org/u-boot/[email protected]/
Link: https://lore.kernel.org/r/[email protected]
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Some drivers set DM_FLAG_PROBE_AFTER_BIND, this does nothing since it's
only every applied on a per-device basis.
Remove the flags.
Signed-off-by: Caleb Connolly <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Acked-by: Michal Simek <[email protected]>
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The DM_FLAG_PROBE_AFTER_BIND flag only makes sense on a per-device
basis, however recently added documentation as well as some confused
drivers imply that it might be added to a driver definition, this does
nothing.
Clarify the new documentation and expand on the comment by the
definition to point people in the right direction.
Signed-off-by: Caleb Connolly <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Acked-by: Michal Simek <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-tegra into next
Ouya and Mocha were added around the same time SPL_HAVE_INIT_STACK was
introduced by Simon and therefore do not include this config option. It
is critical to add it before any defconfig resync, since the SPL_STACK
option will then be removed.
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Mocha was added and tested right before this config option was added. Add
it to restore proper booting.
Fixes: d6a53f52 ("spl: Add an SPL_HAVE_INIT_STACK option")
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Ouya was added and tested right before this config option was added. Add it
to restore proper booting.
Fixes: d6a53f52 ("spl: Add an SPL_HAVE_INIT_STACK option")
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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into next
More basic DBSC5 DRAM controller clean ups and improvements.
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Pass DBSC5 udevice and MODEMR0 register values to board specific
function dbsc5_get_board_data(). The board specific implementation
of dbsc5_get_board_data() can return struct renesas_dbsc5_board_config
which matches the board based on the content of MODEMR0 or content
of DT accessible via the udevice.
Signed-off-by: Marek Vasut <[email protected]>
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Extract wait for completion code from dbsc5_send_dbcmd2() into
new separate function dbsc5_wait_dbwait(). This extracted code
can be used to implement MR register read in the future.
Signed-off-by: Marek Vasut <[email protected]>
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Update dbsc5_send_dbcmd2() such that it takes multiple parameters
instead of one magic register content value. These parameters are
used to form the same resulting register value internally in the
dbsc5_send_dbcmd2() function, but from well defined input constants.
The new input constants are the operation code, channel, rank, and
operation argument. The argument is operation code specific, therefore
it is still a 16-bit magic number, but the rest of the arguments are
now split up. No functional change.
Signed-off-by: Marek Vasut <[email protected]>
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Remove leading space before dbsc5_ddr_setval_all_ch() , no functional change.
Signed-off-by: Marek Vasut <[email protected]>
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Rename dbsc5_ddr_register_read() to dbsc5_ddr_register_mr27_mr57_read()
and dbsc5_ddr_register_set() to dbsc5_ddr_register_mr28_set() to make
it clear what those functions really do. No functional change.
Signed-off-by: Marek Vasut <[email protected]>
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My preferred email address is [email protected] now.
This updates the MAINTAINERS files and adds an entry in the
.mailmap file.
Signed-off-by: Mattijs Korpershoek <[email protected]>
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Remove leftover code from Milk-V Mars CM and Mars CM Lite boards that do
not exist in upstream Linux Kernel devicetree-rebasing. These will be re-
introduced when submitted upstream for a future U-Boot release. Users of
these boards should use the previous stable release of U-Boot until then.
Signed-off-by: E Shattow <[email protected]>
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The BeagleBone Green board is a revision of the BoneBlack board.
Having BeagleBone Black devicetree listed before BeagleBone Green will
select always the BeagleBone Black devicetree following the functioning of
board_fit_config_name_match().
Fix it by changing the test condition and selecting BoneBlack board only
if it is not a revision of this board.
Signed-off-by: Kory Maincent <[email protected]>
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into next
Assorted fixes, refactorings and additions that are ready, and shave
off some load from upcoming series'.
Improves MMC performance on D1/T113 (missed clock divider), enables
eMMC access on the H616 family (never worked, many thanks to Jernej for
the fix!), DRAM detection fixes for the H616 (now reportedly stable).
Some patches for the upcoming Allwinner A133 SoC support: a few
refactorings, plus the DM clock and pinctrl driver. The DRAM init
routines work, but need some more polishing, that also holds back the
actual enablement patch, which will hopefully follow for v2025.07 still.
Also some preparatory patches for the Allwinner A523 SoC support, for
now just to improve the FEL save/restore code. There will be more patches
coming up for this, ideally also in the coming cycle still.
Gitlab CI passed, and I booted that briefly on some boards.
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Because the Allwinner BootROM always runs in AArch32, even on ARMv8 SoCs,
we need to switch to AArch64 first, but also need to save the CPU state,
when we later may need to return to the BootROM, for continuing with the
FEL USB protocol. This is done in 32-bit code, which we include into the
AArch64 boot assembly file as a series of .word directives, containing
the encoded AArch32 instructions. To be able to change and verify that
code, we also kept an assembly file with the respective 32-bit code, but
just for reference.
As this code is never compiled or assembled - it's just for
documentation - it became stale over time: we didn't really update this
along with the changes we made to the boot code. In particular the FEL
save code was completely missing.
Update that 32-bit assembly file, to match the current version used in
boot0.h, including the FEL save routine. Also update the build
instructions in the comments, to give people an actual chance to
assemble this code.
Signed-off-by: Andre Przywara <[email protected]>
Acked-by: Jernej Skrabec <[email protected]>
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To be able to return to the BootROM when booting via the FEL USB
protocol, we need to save the CPU state very early, which we need to do
in the embedded AArch32 code. At the moment the pointer to the buffer for
that state is located *after* the code, which makes the PC relative
code fragile: adding or removing instructions will change the distance
to that pointer variable.
The "new" Allwinner A523 SoC requires more state to be saved (GICv3
system registers), but we must do that *only* on that SoC. Conditional
compilation sounds like the easiest solution, but would mean that the
distance to that pointer would change.
Solve this rather easily by moving the pointer to the *front* of the
code: we load that pointer in the first instructions, so the distance
would always stay the same. Later in the code we won't need PC relative
addressing anymore, so this code can grow or shrink easily, for instance
due to conditional compilation.
Signed-off-by: Andre Przywara <[email protected]>
Reviewed-by: Jernej Skrabec <[email protected]>
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To return a 64-bit Allwinner chip back to the 32-bit BootROM code, we
have some embedded AArch32 code that restores the CPU state, before
branching back to the BootROM. At the moment the pointer to the buffer
with that state is located *after* the code, which makes the PC relative
code fragile: adding or removing instructions will change the distance
to that pointer variable.
The "new" Allwinner A523 SoC requires more state to be restored (GICv3
system registers), but we must do that *only* on that SoC. Conditional
compilation sounds like the easiest solution, but would mean that the
distance to that pointer would change.
Solve this rather easily by moving the pointer to the *front* of the
code: we load that pointer in the first instruction, so the distance
would always stay the same. Later in the code we won't need PC relative
addressing anymore, so this code can grow or shrink easily, for instance
due to conditional compilation.
Signed-off-by: Andre Przywara <[email protected]>
Reviewed-by: Jernej Skrabec <[email protected]>
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Cards should always be reset and threshold set. This fixes eMMC on H616.
Signed-off-by: Jernej Skrabec <[email protected]>
[Andre: use macro-defined offsets to fix build on older SoCs]
Signed-off-by: Andre Przywara <[email protected]>
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It turns out that checking just one write is not enough. Due to
unexplained reasons scan procedure detected double the size. By making
16 dword writes and comparisons that never happens.
New procedure is also inverted. Instead of writing two different values
to base address and some offset and then reading both and comparing
values, simplify this by writing pattern at the base address and then
search for this pattern at some offset.
Signed-off-by: Jernej Skrabec <[email protected]>
Tested-by: Ryan Walklin <[email protected]>
Reviewed-by: Andre Przywara <[email protected]>
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Since there is quite a few possible DRAM configurations in terms of bus
width, rank and rows and columns count, size detection algorithm must be
very careful not to test combination which would be bigger than H616 is
actually capable of handling.
Ideally, we should always detect memory aliasing, even for 4 GB memory
size, which is the maximum amount of memory that H616 is capable of
handling. For this reason, we have to configure minimum amount of
supported rows when testing for columns and vice versa. This way test
code will never step out of 4 GB boundary.
While at it, check for 17 rows maximum. This aligns code with BSP DRAM
driver. There is probably no such configuration which would make sense
with 4 GB memory.
Signed-off-by: Jernej Skrabec <[email protected]>
Reviewed-by: Icenowy Zheng <[email protected]>
Reviewed-by: Andre Przywara <[email protected]>
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The Allwinner A100 SoC has been around for a while, and has now seemingly
been replaced with its close sibling A133.
Add the required mapping between the pinmux group strings and their
respective mux value, as far as used by U-Boot proper. Linux has some
basic (clock and pinctrl) support for a while, so we can build on the
names already used there.
Signed-off-by: Andre Przywara <[email protected]>
Acked-by: Jernej Skrabec <[email protected]>
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The Allwinner A100 SoC has been around for a while, and has now seemingly
been replaced with its close sibling A133.
Add support for the CCU, as far as used by U-Boot proper. Linux has some
basic (clock and pinctrl) support for a while, so we can already use the
existing binding headers.
Signed-off-by: Andre Przywara <[email protected]>
Acked-by: Jernej Skrabec <[email protected]>
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Reorder the Kconfig defaults for the maximum SPL size, to make the
Allwinner specific values more readable and extensible: many older SoCs
need to be limited to 32KB, so make this the last ARCH_SUNXI entry, used
as a fallback unless explicitly overridden before.
Signed-off-by: Andre Przywara <[email protected]>
Acked-by: Jernej Skrabec <[email protected]>
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Most Allwinner SoCs (used on 107 out of 172 boards) use a default CPU
frequency of 1008 MHz during the initial setup in the SPL.
Make this the fallback default, in case nothing else is selected, to
simplify the Kconfig stanza and make future additions easier.
Signed-off-by: Andre Przywara <[email protected]>
Acked-by: Jernej Skrabec <[email protected]>
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Some of the X-Power AXP PMICs can be ordered with an alternative I2C
address, for instance an AXP717 could be shipped with address 0x34 or
with address 0x35. Similarly the AXP803 lists two possible addresses.
For DM (DT) based drivers this is no problem, but the Allwinner SPL
code relies on exactly one hardcoded address per PMIC so far.
Add a Kconfig variable that holds the I2C address used by the PMIC
accessed in the SPL, and provide the (mostly only one) supported address
as its default, for the PMICs we use. Boards using the other address
can easily set this in their defconfig.
This effectively moves the hardcoding from C code to Kconfig.
That enables to use the AXP717 on some boards with the new Allwinner
A523 chip, which use the other I2C address there.
Signed-off-by: Andre Przywara <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
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