| Age | Commit message (Collapse) | Author |
|
MSM8916 devices use this instead of PSCI.
Signed-off-by: Sam Day <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Caleb Connolly <[email protected]>
|
|
Depending on ARCH_IPQ40XX is too restrictive, as this architecture is
explicitly armv7. This driver is also used on msm8916 devices, which
have cortex-a53 armv8 cores.
Signed-off-by: Sam Day <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Caleb Connolly <[email protected]>
|
|
Drop the `board_reset` function from mach-snapdragon board code, and
instead use the standard PSCI sysreset driver.
Signed-off-by: Sam Day <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Caleb Connolly <[email protected]>
|
|
Acked-by: Christopher Obbard <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Caleb Connolly <[email protected]>
|
|
Introduce a pinctrl driver for SC7280/QCM6490, this is used by the RB3
Gen 2, FairPhone 5 and other devices.
Tested-by: Christopher Obbard <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Caleb Connolly <[email protected]>
|
|
Most MSM8916 devices shipped without PSCI support. The history is quite
nuanced (a good overview can be found in [1]), but the end result is
that the upstream DTs for this SoC pretend that PSCI exists, and it's
expected that the bootloader handles the case where it doesn't. This is
codified by the de-facto bootloader for MSM8916 devices, lk2nd [2].
So we handle it here by deleting the /psci node if we detect the absence
of PSCI. We need to do this early to ensure sysreset works correctly,
since the PSCI firmware driver is PRE_RELOC and binds the PSCI sysreset
driver.
Additionally, show_psci_version is updated to check that PSCI exists.
Currently this banner outputs "PSCI: 65535.65535" on devices without
PSCI support, which isn't very useful :)
[1]: https://github.com/msm8916-mainline/linux/issues/388
[2]: https://github.com/msm8916-mainline/lk2nd/blob/8183ea2/lk2nd/smp/spin-table/spin-table.c#L237
Signed-off-by: Sam Day <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Caleb Connolly <[email protected]>
|
|
qcom_parse_memory is updated to return a -ENODATA error if the passed
FDT does not contain a /memory node, or that node is incomplete (size=0)
board_fdt_blob_setup first tries to call qcom_parse_memory with the
internal FDT (if present+valid). If that fails, it tries again with the
external FDT (again, if present+valid).
When booting with an internal FDT from upstream, it's likely that this
change results in a slight performance hit, since virtually all upstream
qcom DTs lack a fully specified memory node. The impact should be
negligible, though.
qcom_parse_memory was given a detailed docstring adapted from Caleb's
original commit message that introduced the function.
Reviewed-by: Caleb Connolly <[email protected]>
Signed-off-by: Sam Day <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Caleb Connolly <[email protected]>
|
|
This is how the kernel does it. APQ8016E TRM also states that this clock
can be turned off when no random numbers are needed.
Signed-off-by: Sam Day <[email protected]>
Reviewed-by: Neil Armstrong <[email protected]>
Reviewed-by: Caleb Connolly <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Caleb Connolly <[email protected]>
|
|
Properly warn when an unknown clock is enabled.
Signed-off-by: Sam Day <[email protected]>
Reviewed-by: Caleb Connolly <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Caleb Connolly <[email protected]>
|
|
msm_rng_enable is supposed to skip writing to LFSR_CFG + CONFIG
registers in the PRNG_ block if PRNG_CONFIG_HW_ENABLE is already set.
The logic to test for this was inverted.
Without this fix, the driver was causing SError aborts on my MSM8916
device. Stephan Gerhold suggested this was probably because TZ has
marked this as a protected register, since it would also be using it for
RNG.
Fixes: 033ec636fcb ("rng: Add Qualcomm MSM PRNG driver")
Suggested-by: Stephan Gerhold <[email protected]>
Reviewed-by: Neil Armstrong <[email protected]>
Signed-off-by: Sam Day <[email protected]>
Reviewed-by: Caleb Connolly <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Caleb Connolly <[email protected]>
|
|
This clock needs to be enabled for the msm-rng driver to work on
MSM8916, otherwise accessing the PRNG register block causes a data
abort.
Reviewed-by: Neil Armstrong <[email protected]>
Signed-off-by: Sam Day <[email protected]>
Reviewed-by: Caleb Connolly <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Caleb Connolly <[email protected]>
|
|
This reads a little bit nicer (IMO), and is consistent with the kernel.
Signed-off-by: Sam Day <[email protected]>
Reviewed-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Caleb Connolly <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Caleb Connolly <[email protected]>
|
|
Introduce a defconfig for the Qualcomm IPQ9574 SoC based RDPs.
Presently supports eMMC.
Per the flash memory layout, U-Boot size cannot exceed 756KB. With this
defconfig, u-boot.mbn size is ~480KB.
Reviewed-by: Sumit Garg <[email protected]>
Reviewed-by: Caleb Connolly <[email protected]>
Signed-off-by: Varadarajan Narayanan <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Caleb Connolly <[email protected]>
|
|
U-Boot has to reconfigure the clocks that were set in the boot
loaders. However, in IPQ9574, the clocks have to be reset before
they can be reconfigured. Hence add code to do the relevant
resets.
Reviewed-by: Caleb Connolly <[email protected]>
Signed-off-by: Varadarajan Narayanan <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Caleb Connolly <[email protected]>
|
|
Add pinctrl driver for the TLMM block found in the ipq9574 SoC.
Reviewed-by: Caleb Connolly <[email protected]>
Signed-off-by: Varadarajan Narayanan <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Caleb Connolly <[email protected]>
|
|
Presently, get_function_mux returns an unsigned int and cannot
differentiate between failure and correct function value. Change its
return type to int and check for failure in the caller.
Additionally, updated drivers/pinctrl/qcom/pinctrl-*.c to accommodate the
above return type change. Only compile test done.
Signed-off-by: Varadarajan Narayanan <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Caleb Connolly <[email protected]>
|
|
Add initial set of clocks and resets for enabling U-Boot on ipq9574
based RDP platforms.
Reviewed-by: Caleb Connolly <[email protected]>
Signed-off-by: Varadarajan Narayanan <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Caleb Connolly <[email protected]>
|
|
Add initial support for the IPQ9574 MMC based RDP platforms.
Define memory layout statically.
Reviewed-by: Caleb Connolly <[email protected]>
Signed-off-by: Varadarajan Narayanan <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Caleb Connolly <[email protected]>
|
|
Introducing basic support for Qualcomm IPQxxx based RDPs.
Document the build and flashing steps.
Reviewed-by: Caleb Connolly <[email protected]>
Signed-off-by: Varadarajan Narayanan <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Caleb Connolly <[email protected]>
|
|
This section is required by .dynamic and llvm-objcopy will exit with a
fatal error if it is not also preserved in the output.
Signed-off-by: Sam Edwards <[email protected]>
|
|
EFI applications need to be relocatable. Ordinarily, this is achieved
through a PE-format .reloc section, but since that requires toolchain
tricks to achieve, U-Boot's EFI applications instead embed ELF-flavored
relocation information and use it for self-relocation; thus, the
.dynamic section needs to be preserved.
Before this patch, it was tacked on to the end of .text, but this was
not proper: A .text section is SHT_PROGBITS, while the .dynamic section
is SHT_DYNAMIC. Attempting to combine them like this creates a section
type mismatch. While GNU ld doesn't seem to complain, LLVM's lld
considers this a fatal linking error.
This patch moves .dynamic out to its own section, so that the output ELF
has the correct types. (They're all mashed together when converting to
binary anyway, so this patch causes no change in the final .efi output.)
Signed-off-by: Sam Edwards <[email protected]>
Cc: Heinrich Schuchardt <[email protected]>
|
|
While the _start label is only intended for use locally to populate the
(hand-written) PE header, the linker script includes ENTRY(_start) which
designates it as the entry point in the output ELF, resulting in linker
warnings under some linkers (e.g. LLVM's lld) due to _start not being a
globally-visible symbol. Since ELF is only an intermediary build
format, and the aforementioned PE header correctly points to _start, the
ENTRY(_start) directive could easily be removed to silence this warning.
However, since some developers who are debugging EFI by analyzing the
intermediary ELF may appreciate having correct entry-point information,
this patch instead promotes the _start labels to global symbols,
silencing the linker warning and making the intermediary ELF reflect the
true entry point.
This patch doesn't affect the final output binaries in any way.
Signed-off-by: Sam Edwards <[email protected]>
|
|
Convert the current miiphybb documentation to rst. Rename
the README.bitbangMII to bitbangmii.rst in the process.
Signed-off-by: Marek Vasut <[email protected]>
Signed-off-by: Heinrich Schuchardt <[email protected]>
|
|
Add cadence USB confiuration.
Signed-off-by: Minda Chen <[email protected]>
Tested-by: E Shattow <[email protected]>
|
|
For some JH7110 boards, USB host overcurent pin is not reserved,
To make USB host work, overcurrent pin must be disabled. So set the
pin default disabled in spl stage.
Signed-off-by: Minda Chen <[email protected]>
Tested-by: E Shattow <[email protected]>
|
|
Add Starfive cdns USB3 wrapper driver.
Signed-off-by: Minda Chen <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
Tested-by: E Shattow <[email protected]>
|
|
Cdns core driver also get dr mode from wrapper devcie dts node
to make it is same with Starfive cdns USB Linux kernel driver,
Starfive 7110 OF_UPSTREAM is enabled
Signed-off-by: Minda Chen <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
|
|
Add Starfive JH7110 PCIe 2.0 PHY driver, which is generic
PHY driver and can be used as USB 3.0 driver.
Signed-off-by: Minda Chen <[email protected]>
Tested-by: E Shattow <[email protected]>
|
|
Add Starfive JH7110 USB 2.0 PHY driver, which is generic
PHY driver.
Signed-off-by: Minda Chen <[email protected]>
Reviewed-by: Roger Quadros <[email protected]>
Tested-by: E Shattow <[email protected]>
|
|
USB PHY maybe need to set PHY mode in different USB
dr mode. So translate USB PHY mode to generic PHY mode
and call generic_phy_set_mode().
Signed-off-by: Minda Chen <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
|
|
Make struct renesas_dbsc5_board_config {} definition public via
include/dbsc5.h, so this structure can be defined in board files
and passed into the DBSC5 DRAM driver by overriding weak function
dbsc5_get_board_data() on board level.
Signed-off-by: Marek Vasut <[email protected]>
|
|
Add auto-detection and handling of Renesas R-Car V4H-3 and V4H-5
in addition to V4H-7 SoC variants based on OTP fuse programming.
The V4H-3 and V4H-5 variants have reduced DRAM frequency options.
Signed-off-by: Marek Vasut <[email protected]>
|
|
Update the DRAM initialization code to match DBSC5 initialization code
rev.1.10 , which is currently the latest version available. This makes
DRAM initialization operational on Renesas R-Car V4H R8A779G0 rev.3.0.
Signed-off-by: Marek Vasut <[email protected]>
|
|
Reinstate missing increment by two in DBTR11 calculation based
on the original DBSC5 initialization code rev.0.80. The original
code did ... ODTLon - (js2[JS2_tODTon_min] - 1) + 1 , which was
incorrectly converted into ODTLon - js2[JS2_tODTon_min], but
should have been converted to ODTLon - js2[JS2_tODTon_min] + 2.
Add the missing +2 .
Signed-off-by: Marek Vasut <[email protected]>
|
|
The JS1 index is calculated correctly, but the limiter cannot
be the max() function because the index should be lower than
JS1_USABLEC_SPEC_HI and the max() function would unconditionally
override the JS1 index to JS1_USABLEC_SPEC_HI. Use clamp() to
limit the JS1 index instead.
Signed-off-by: Marek Vasut <[email protected]>
|
|
Fix copy paste error in MD pin handling for 5500 Mbps and 4800 Mbps case,
each should be handled by MD[19,17] == 2 and MD[19,17] == 3 respectively.
Signed-off-by: Marek Vasut <[email protected]>
|
|
The DBSC5 DRAM controller driver needs access to OTP fuses to discern
Renesas R-Car V4H-3, V4H-5 and V4H-7 SoC variants based on OTP fuse
programming. Make OTP block DT node available in U-Boot SPL DT so the
DBSC5 driver can determine its base address and read out the OTP fuses.
Signed-off-by: Marek Vasut <[email protected]>
|
|
The R-Car V4H SPL implementation was originally running on the Cortex-R52
core, but this is no longer the case. Majority of the SPL now runs on the
Cortex-A76 core. Drop the stale description.
Fixes: ec53fdee5bec ("arm64: renesas: Add Renesas R-Car V4H SPL implementation")
Signed-off-by: Marek Vasut <[email protected]>
|
|
Remove stale Makefile description, this used to be valid for the
original Makefile from which the common Makefile was made generic,
but is no longer applicable to the common Makefile.
Fixes: c7d2d7f90a91 ("ARM: renesas: Simplify board Makefiles")
Signed-off-by: Marek Vasut <[email protected]>
|
|
Enable fallback PSCI provider on Renesas R-Car R8A779G0 V4H White Hawk board.
This fallback PSCI provider provides basic PSCI interface which can be used
by the Linux kernel, but does not provide support for bringing up additional
CPU cores or any other functionality, except for SoC level reset.
This fallback PSCI provider is intended as a fallback in case a proper PSCI
provider is not started before the Linux kernel is started. Linux kernel on
ARMv8a will fail to boot in case a PSCI provider is not available, and this
basic fallback PSCI provider assures such a boot failure cannot occur, even
if that means the system will boot in degraded mode with only one CPU core
available, that is still sufficient to perform recovery.
In the common case, a proper PSCI provider should be started as part of
the Linux kernel fitImage, as the BL31 loadable, and replace this basic
fallback PSCI provider before the Linux kernel is started.
Signed-off-by: Marek Vasut <[email protected]>
|
|
Implement custom U_BOOT_FIT_LOADABLE_HANDLER and armv8_switch_to_el2_prep()
handling in case the TFA was loaded. The loadables handler sets up custom
handoff structure used by Renesas TFA fork in fixed location in DRAM and
indicates the TFA has been loaded.
The custom armv8_switch_to_el2_prep() handling tests whether the TFA BL31
was previously loaded and the custom handoff structure was set up, and if
so, jumps to TFA BL31 which switches from EL3 to EL2 and then returns to
U-Boot just past bl in armv8_switch_to_el2() to finish starting the Linux
kernel.
The jump to Linux through TFA works in such a way that the custom
armv8_switch_to_el2_prep() handler configures the custom handoff structure
such that the target jump address of the TFA BL31 on exit is set to the
armv8_switch_to_el2() + 4, which is just past the bl, and just before the
U-Boot code which implements the Linux kernel boot from either EL. The
registers passed through the TFA BL31 are all the registers passed into
armv8_switch_to_el2_prep() to assure maximum compatibility with all the
boot modes. The armv8_switch_to_el2_prep() handler jumps to the TFA BL31,
which does its setup, drops EL from EL3 to EL2 and finally jumps to the
armv8_switch_to_el2() + 4 entry point, which then allows U-Boot to boot
the Linux kernel the usual way.
In order to build suitable kernel fitImage, build TFA first, upstream
is currently under review:
https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/35799
Or if necessary, downstream repository:
remote: https://github.com/renesas-rcar/arm-trusted-firmware.git
branch: rcar_gen4_v2.7_v4x
```
$ git clean -fqdx
$ MBEDTLS_DIR=/path/to/mbedtls/ make -j$(nproc) bl31 \
PLAT=rcar_gen4 ARCH=aarch64 LSI=V4H SPD=none \
CTX_INCLUDE_AARCH32_REGS=0 MBEDTLS_COMMON_MK=1 \
PTP_NONSECURE_ACCESS=1 LOG_LEVEL=20 DEBUG=0 \
ENABLE_ASSERTIONS=0 E=0
```
Build Linux kernel Image and device tree from current mainline Linux
kernel repository, obtain 'Image' and 'r8a779g0-white-hawk.dtb' .
Bundle the files together using provided fit-image.its fitImage description:
```
$ mkimage -f fit-image.its fitImage
```
To start the kernel fiImage generated in previous step, load fitImage
to DRAM and use the 'bootm' command to start it:
=> load 0x58000000 ... fitImage && bootm 0x58000000
Signed-off-by: Marek Vasut <[email protected]>
|
|
If 'oob_required' is not set by the caller (for example 'oobbuf' is NULL),
then driver doesn't copy OOB data from 'oob_poi' to special controller
structures, so zeroes will be written as OOB. But, generic raw NAND logic
in 'nand_base.c' already handles case when OOB is not required to write by
filling 'oob_poi' with 0xFF's. So let's remove 'oob_required' check to
always read 'oob_poi' data for OOB.
Kernel driver (drivers/mtd/nand/raw/meson_nand.c) works in the same way,
so need to keep same behaviour here.
Fixes: c2e8c4d09a7a ("mtd: rawnand: Meson NAND controller support")
Signed-off-by: Arseniy Krasnov <[email protected]>
Reviewed-by: Michael Trimarchi <[email protected]>
|
|
Sync up on test renames
|
|
This fails on samus_tpl as there is no 'net' command.
=> net list
Unknown command 'net' - try 'help' !
Fix it by adding a condition for the test.
Add a blank line to keep pylint happy.
Signed-off-by: Simon Glass <[email protected]>
|
|
It is sometimes tricky to figure out what modules test.py is loading
when it starts up. The result can be a silent failure with no clue as to
what when wrong.
Add a section which lists the modules loaded as well as those not
found.
Signed-off-by: Simon Glass <[email protected]>
|
|
Now that we have a shorter name, we don't need this sort of thing. Just
use ubman instead.
Signed-off-by: Simon Glass <[email protected]>
|
|
Now that we have a shorter name, we don't need this sort of thing.
Drop it.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Mattijs Korpershoek <[email protected]> # test_android
|
|
We know this is U-Boot so the prefix serves no purpose other than to
make things longer and harder to read. Drop it and rename the files.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Mattijs Korpershoek <[email protected]> # test_android / test_dfu
|
|
This fixture name is quite long and results in lots of verbose code.
We know this is U-Boot so the 'u_boot_' part is not necessary.
But it is also a bit of a misnomer, since it provides access to all the
information available to tests. It is not just the console.
It would be too confusing to use con as it would be confused with
config and it is probably too short.
So shorten it to 'ubman'.
Signed-off-by: Simon Glass <[email protected]>
Link: https://lore.kernel.org/u-boot/CAFLszTgPa4aT_J9h9pqeTtLCVn4x2JvLWRcWRD8NaN3uoSAtyA@mail.gmail.com/
|
|
Enable configs for nand boot.
Signed-off-by: Dinesh Maniyam <[email protected]>
|