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2025-05-08video: tegra: add 8-bit CPU driven protocolSvyatoslav Ryhel
Add support for 8-bit CPU driven (primary and secondary) display signal interface found in Tegra 2 and Tegra 3 SoC. Tested-by: Ion Agorria <[email protected]> Signed-off-by: Svyatoslav Ryhel <[email protected]>
2025-05-08sysreset: implement MAX9807 sysreset functionsSvyatoslav Ryhel
MAX8907 PMIC has embedded poweroff function used by some device to initiane device power off. Implement it as optional sysreset driver guarded by kconfig option and system-power-controller device tree property. Tested-by: Ion Agorria <[email protected]> Signed-off-by: Svyatoslav Ryhel <[email protected]>
2025-05-08power: regulator: max9807: add regulator supportSvyatoslav Ryhel
Added a new regulator driver for the MAXIM MAX8907 PMIC, providing essential regulator functionalities and incorporated the necessary binding framework within the core PMIC driver. Tested-by: Ion Agorria <[email protected]> Signed-off-by: Svyatoslav Ryhel <[email protected]>
2025-05-08power: pmic: add the base MAX8907 PMIC supportSvyatoslav Ryhel
Add basic i2c based read/write functions to access PMIC registers. Tested-by: Ion Agorria <[email protected]> Signed-off-by: Svyatoslav Ryhel <[email protected]>
2025-05-08gpio: tegra_gpio: implement rfree operationSvyatoslav Ryhel
Releasing a GPIO on Tegra necessitates changing its configuration to SFIO to activate its special function. Without this reconfiguration, the special function will be unavailable. Signed-off-by: Svyatoslav Ryhel <[email protected]>
2025-05-08net: gmac_rockchip: Add RMII support for rk3288Christoph Fritz
Add RMII-specific handling to rk3288_gmac_fix_mac_speed() so that it properly sets the RMII clock (2.5 MHz vs. 25 MHz) and speed bits (10 Mbps vs. 100 Mbps). Also define a new rk3288_gmac_set_to_rmii() function to set the PHY interface field and RMII_MODE bit. Signed-off-by: Christoph Fritz <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2025-05-08rockchip: rk3288: grf: Unify speed/flowctrl fields for clarityChristoph Fritz
Update GMAC speed and flow control fields in GRF_SOC_CON1 to use RK3288_GMAC_* prefix, ensuring a consistent naming convention. It also shifts each mask/bit definition to match the actual hardware bits, which makes future usage easier. Signed-off-by: Christoph Fritz <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2025-05-08board: rockchip: Add LCKFB TaishanPi RK3566 BoardJiehui He
The LCKFB TaishanPi is a single-board computer based on the RK3566 SoC. Specification: - 1/2 Gib RAM - Optinal EMMC - SD-Card - HDMI / MIPI CSI / MIPI DSI - USB 2.0 Host (Type-A) - USB 2.0 Host / OTG (Type-C) - No Ethernet This patch adds U-Boot support for the LCKFB TaishanPi RK3566 board, including: - U-Boot device tree - Default defconfig - Board documentation - MAINTAINERS entry Changes in v2: - Removed unused configs from `lckfb-tspi-rk3566_defconfig` - Reordered TaishanPi entry in `doc/board/rockchip/rockchip.rst` alphabetically Link to v1: https://lore.kernel.org/u-boot/[email protected]/ Signed-off-by: Jiehui He <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2025-05-08board: rockchip: add Xunlong Orange Pi 5 MaxIlya Katsnelson
The 5 Max is another board in the Orange Pi 5 family. It's overall similar to the 5 Plus, but in a smaller form factor, which leads to some I/O being reshuffled, but nothing relevant to u-boot. So, just reuse the config for the 5 Plus and adjust the DT names. Reviewed-by: Jonas Karlman <[email protected]> Signed-off-by: Ilya Katsnelson <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2025-05-07Merge patch series "include: env: phytec: k3_net: Remove net_apply_extensions"Tom Rini
This series from Daniel Schultz <[email protected]> cleans up the environment further on the phytec am62ax platforms. Link: https://lore.kernel.org/r/[email protected]
2025-05-07board: phytec: phycore_am62ax: Update EnvironmentDaniel Schultz
Add fit_addr_r to the environment to allow us to boot from a FIT image. Increase the maximum Image size from 23 MB to 26 MB by moving the initramfs start address up. This gives us a bigger ranger to provide kernel images which are not stripped down too much. Signed-off-by: Daniel Schultz <[email protected]> Reviewed-by: Tom Rini <[email protected]>
2025-05-07include: env: phytec: k3_net: Use get_cmdDaniel Schultz
'net_fetch_cmd' is not defined by the K3 board files. They use the more common 'get_cmd' from NXP products. Signed-off-by: Daniel Schultz <[email protected]>
2025-05-07include: env: phytec: k3_net: Remove net_apply_extensionsDaniel Schultz
Extensions are now handled by the board-code. Remove this non-existing function to proper boot from network. Signed-off-by: Daniel Schultz <[email protected]>
2025-05-06bootstd: Rework BLK dependencyTom Rini
The bootstd code itself does not have any dependency on BLK in order to build. However, in order to minimize size growth of non-migrated platforms, change this from being "default y" to "default y if BLK". This will make it easier to begin migration of platforms which do not have any BLK-class device but do want to use bootstd. Signed-off-by: Tom Rini <[email protected]>
2025-05-06mips: octeon: remove unused middle expressionBryan Brattlof
!A || (A && B) is equivalent to !A || B Drop the unused middle expression to simplify the statement. Signed-off-by: Bryan Brattlof <[email protected]> Reviewed-by: Daniel Schwierzeck <[email protected]>
2025-05-06mtd: spi-nor: Send write disable cmd after every write enableVenkatesh Yadav Abbarapu
Write enable(06h) command will be sent to a flash device to set the write enable latch bit before every program, erase, write command. After that write disable command (04h) needs to be sent to clear the write enable latch. This write_disable() is missing at the majority of the places in the driver, add it to clear write enable latch. Signed-off-by: Ashok Reddy Soma <[email protected]> Signed-off-by: Venkatesh Yadav Abbarapu <[email protected]> Link: https://gist.github.com/PrasanthBabuMantena/c12f39744de188a9d08cd5ca51dc2a7b Tested-by: Prasanth Babu Mantena <[email protected]>
2025-05-06mtd: spi-nor-core: Fixup SNOR_F_IO_MODE_EN_VOLATILE for MT35XVaishnav Achath
MT35XU512ABA has only BFPT and 4-Byte Address Instruction Table in SFDP. commit bebdc237507c ("mtd: spi-nor: Parse SFDP SCCR Map") added checks in spi_nor_octal_dtr_enable() to bail out if the 22nd DWORD in SCCR does not indicate DTR Octal Mode Enable, since MT35XU512ABA device supports octal DTR mode, add this property in SFDP fixup. Signed-off-by: Vaishnav Achath <[email protected]> Signed-off-by: Prasanth Babu Mantena <[email protected]> Reviewed-by: Udit Kumar <[email protected]>
2025-05-06configs: rockchip: sync ENV_MEM_LAYOUT_SETTINGS for px30 to rk3308/etcHeiko Stuebner
Loading a FIT image for kernel, initrd and rootfs on px30 can result in an memory overlap, resulting in the not 100% helpful message of "This will not be a case any time" from lmb_fix_over_lap_regions(). Adding a bit of debug info to lmb_fix_over_lap_regions() brings: lmb_fix_over_lap_regions: base1 0x280000-0x6005ac > base2 0x600000-0x6000d1 So this is because the FIT image gets loaded to the kernel_addr_r at 0x280000 while the pxe-file is already living at 0x600000, only 3.5MB behind. In commit 4acc8bb044a4 ("configs: rockchip: sync ENV_MEM_LAYOUT_SETTINGS for rk3308, rk3328, and rk3399") FUKAUMI Naoki already brought the memory layouts for the mentioned socs in sync. Adjusting the env-layout on px30 to this scheme, magically solves the overlap issue and also brings px30 more in line with the other mentioned SoCs. Signed-off-by: Heiko Stuebner <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2025-05-06rockchip: io-domain: Enable by default for all supported SoCsChen-Yu Tsai
The IO domain driver controls the I/O voltage for various pins, MMC included. Enable it by default for all supported Rockchip SoCs. Signed-off-by: Chen-Yu Tsai <[email protected]> Reviewed-by: Quentin Schulz <[email protected]> Reviewed-by: Paul Kocialkowski <[email protected]> Reviewed-by: Jonas Karlman <[email protected]> Reviewed-by: Anand Moon <[email protected]>
2025-05-06pinctrl: rockchip: constify rockchip_pin_ctrl for RV1108Quentin Schulz
There's no need to modify private data from the controller, so let's make that struct const. Signed-off-by: Quentin Schulz <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2025-05-06pinctrl: rockchip: constify rockchip_pin_ctrl for RK3399Quentin Schulz
There's no need to modify private data from the controller, so let's make that struct const. Signed-off-by: Quentin Schulz <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2025-05-06pinctrl: rockchip: constify rockchip_pin_ctrl for RK3368Quentin Schulz
There's no need to modify private data from the controller, so let's make that struct const. Signed-off-by: Quentin Schulz <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2025-05-06pinctrl: rockchip: constify rockchip_pin_ctrl for RK3328Quentin Schulz
There's no need to modify private data from the controller, so let's make that struct const. Signed-off-by: Quentin Schulz <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2025-05-06pinctrl: rockchip: constify rockchip_pin_ctrl for RK3308Quentin Schulz
There's no need to modify private data from the controller, so let's make that struct const. Signed-off-by: Quentin Schulz <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2025-05-06pinctrl: rockchip: constify rockchip_pin_ctrl for RK3288Quentin Schulz
There's no need to modify private data from the controller, so let's make that struct const. Signed-off-by: Quentin Schulz <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2025-05-06pinctrl: rockchip: constify rockchip_pin_ctrl for RK3228Quentin Schulz
There's no need to modify private data from the controller, so let's make that struct const. Signed-off-by: Quentin Schulz <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2025-05-06pinctrl: rockchip: constify rockchip_pin_ctrl for RK3188Quentin Schulz
There's no need to modify private data from the controller, so let's make that struct const. Signed-off-by: Quentin Schulz <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2025-05-06pinctrl: rockchip: constify rockchip_pin_ctrl for RK3128Quentin Schulz
There's no need to modify private data from the controller, so let's make that struct const. Signed-off-by: Quentin Schulz <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2025-05-06pinctrl: rockchip: constify rockchip_pin_ctrl for RK3066Quentin Schulz
There's no need to modify private data from the controller, so let's make that struct const. Signed-off-by: Quentin Schulz <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2025-05-06pinctrl: rockchip: constify rockchip_pin_ctrl for RK3036Quentin Schulz
There's no need to modify private data from the controller, so let's make that struct const. Signed-off-by: Quentin Schulz <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2025-05-06pinctrl: rockchip: constify rockchip_pin_ctrl for PX30Quentin Schulz
There's no need to modify private data from the controller, so let's make that struct const. Signed-off-by: Quentin Schulz <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2025-05-06pinctrl: rockchip: fix bank's pin_base computingQuentin Schulz
The logic in the core reads the nr_pins of the controller and uses it as the index of the first pin in the bank (pin_base) it currently parses. It then increments the number of pins in the controller before going to the next bank. This works "fine" for controllers where nr_pins isn't defined in their rockchip_pin_ctrl struct as it defaults to 0. However, when it is already set, it'll make the index pin of each bank offset by the number in nr_pins declared in the struct at initialization, and it'll keep growing while adding banks, which means the total number of pins in the controller will be misrepresented. Additionally, U-Boot proper may probe this driver twice (pre-reloc and true proper) and not reset nr_pins of the controller in-between meaning the second probe will have an offset of the actual correct nr_pins. Instead, let's just store locally the number of pins in the controller and make sure it's reset between probes. Finally, this stops modifying a const struct which will soon be triggering a CPU abort at runtime. Signed-off-by: Quentin Schulz <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2025-05-06rockchip: binman: Support use of crc32 hash for FIT imagesJonas Karlman
Use of SHA256 checksum validation on ARMv7 SoCs can be very time consuming compared to when used on a ARMv8 SoC with Crypto Extensions. Add support for use of the much faster CRC32 hash algo when SHA256 is not supported in SPL. Also use FIT_HASH_ALGO to simplify the ifdefs when no known hash algo has been compiled. Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]> Reviewed-by: Quentin Schulz <[email protected]>
2025-05-06rockchip: binman: Include a compatible string in each configurationSimon Glass
Provide a compatible string in the config nodes that U-Boot can use to help decide which configuration to use with SPL_LOAD_FIT_FULL=y and FIT_BEST_MATCH=y. Signed-off-by: Simon Glass <[email protected]> Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]> Reviewed-by: Quentin Schulz <[email protected]>
2025-05-06rockchip: Add SPL_PAD_TO Kconfig default valueJonas Karlman
Almost all Rockchip boards use the same Kconfig value for SPL_PAD_TO, 0x7f8000. u-boot-rockchip.bin is typically written to offset 64S (32KiB) of MMC media. u-boot.itb (or u-boot.img) is typically expected at offset 16384S (8MiB) of MMC media (SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x4000). SPL_PAD_TO is used as the offset for u-boot.itb (or u-boot.img) in the generated simple-bin binman image, and can be calculated as: SPL_PAD_TO = (16384S - 64S) * 512 = 0x7f8000 Add this value as a default value for ARCH_ROCKCHIP. Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]> Reviewed-by: Quentin Schulz <[email protected]>
2025-05-06rockchip: binman: Un-indent the FIT templateSimon Glass
Fix the indentation on the template. This is done in a separate patch so that it is easier to review. Signed-off-by: Simon Glass <[email protected]> Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]> Reviewed-by: Quentin Schulz <[email protected]>
2025-05-06rockchip: binman: Create a template for the FITSimon Glass
Move the FIT description into a template so that it can be used in both the simple-bin and the simple-bin-spi images. Signed-off-by: Simon Glass <[email protected]> Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]> Reviewed-by: Quentin Schulz <[email protected]>
2025-05-06rockchip: binman: Factor out arch and compressionSimon Glass
Declare arch and compression at the top of the file to avoid needing ifdefs in every usage. Add a few comments to help with the remaining #ifdefs. Signed-off-by: Simon Glass <[email protected]> Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2025-05-06rockchip: binman: Correct the OS prop for U-BootSimon Glass
The U-Boot image is currently being identified as an invalid OS in spl_fit_image_get_os() due to case sensitive compare. Use the correct lower-case value to fix this. Fixes: e0c0efff2a02 ("rockchip: Support building the all output files in binman") Signed-off-by: Simon Glass <[email protected]> Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]> Reviewed-by: Quentin Schulz <[email protected]>
2025-05-06rockchip: rk3288: do not generate u-boot.rom anymoreQuentin Schulz
This was only used on RK3288 Chromebooks and the EVB. If it follows the same pattern as for RK3399 Chromebooks where their maintainer (Simon) agreed[1] to removal of u-boot.rom on the basis that the generic u-boot-rockchip-spi.bin is now enough, let's do the same for RK3288 and remove the last Rockchip users of u-boot.rom (and HAS_ROM symbol). At the same time, remove HAS_ROM symbol from the RK3288 Chromebooks and EVB configs since they were used only for that. SYS_SPI_U_BOOT_OFFS offset in rockchip-u-boot.dtsi for the u-boot-img node of simple-bin-spi binman image matches the one used in u-boot.rom except for the EVB. The EVB doesn't have ROCKCHIP_SPI_IMAGE symbol enabled, so HAS_ROM had no effect anyway. Even if it had, this would not have been enough considering that SPL_SPI_LOAD symbol is not set, so U-Boot proper could not be loaded from SPI even if SPL/TPL does. Make sure u-boot-rockchip-spi.bin has the same size of u-boot.rom for Chromebooks as that seems to be important. [1] https://lore.kernel.org/u-boot/CAFLszTh-SewFod8dEOF3+e-wCE1qFF0CyxxR8CbQwy3BRW3k6w@mail.gmail.com/ Reviewed-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]> Tested-by: Simon Glass <[email protected]> # chromebook-kevin Signed-off-by: Quentin Schulz <[email protected]>
2025-05-06rockchip: rk3399: do not generate u-boot.rom anymoreQuentin Schulz
This was only used on RK3399 Gru Chromebooks and their maintainer (Simon) agreed[1] to its removal on the basis that the generic u-boot-rockchip-spi.bin is now enough, so let's do that. At the same time, remove HAS_ROM symbol from the Gru Chromebooks config since they were used only for that. Make sure u-boot-rockchip-spi.bin has the same size of u-boot.rom for Chromebooks as that seems to be important. [1] https://lore.kernel.org/u-boot/CAFLszTh-SewFod8dEOF3+e-wCE1qFF0CyxxR8CbQwy3BRW3k6w@mail.gmail.com/ Reviewed-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]> Tested-by: Simon Glass <[email protected]> # chromebook-kevin Signed-off-by: Quentin Schulz <[email protected]>
2025-05-05fs: exfat: Inhibit unused exfat_humanize_bytes() and exfat_print_info()Marek Vasut
Make sure unused exfat_humanize_bytes() and exfat_print_info() functions are not compiled into U-Boot code base. This also removes CID 550300: Integer handling issues (INTEGER_OVERFLOW) in exfat_humanize_bytes() , which is now surely unreachable. Signed-off-by: Marek Vasut <[email protected]>
2025-05-05fs: exfat: Use strncpy() and bail on too long filenamesMarek Vasut
In case the filename is too long, longer than PATH_MAX - 1, it would overflow dirs->dirname array. Add missing check and also use strncpy() to prevent the overflow in any case. Fixes CID 550305: Security best practices violations (STRING_OVERFLOW) Signed-off-by: Marek Vasut <[email protected]>
2025-05-05firmware: ti_sci: Add Initialization of dev_info head nodeUdit Kumar
On K3 devices two drivers ti_sci and ti_sci_dm are supporting firmware functions. At run time one of driver is used. Driver ti_sci already initializing head for dev_list in its probe function, but it was missed in ti_sci_dm driver. So add head list init support for ti_sci_dm driver. While at this, move init of list before usages in both functions. Fixes: 5d5a699855a7("firmware: ti_sci: Add support for Resoure Management at R5 SPL stage") Reviewed-by: Neha Malcom Francis <[email protected]> Signed-off-by: Udit Kumar <[email protected]> Reviewed-by: Nishanth Menon <[email protected]>
2025-05-05configs: phycore_am62x_a53_defconfig: Remove CONFIG_SYS_BOOTM_LENDaniel Schultz
This config was defined with the default value of 8 MiB. However, the default value is different when CONFIG_ARM64 is enabled and should be 64 MiB. Remove this config from the A53 defconfig and use the correct default config. Signed-off-by: Daniel Schultz <[email protected]> Reviewed-by: Mattijs Korpershoek <[email protected]>
2025-05-05cmd: spawn: reject 0 as an invalid job IDJerome Forissier
Job IDs are positive integers greater than 1. 0 is not a valid job ID, therefore fix the comparison in do_wait(). Fixes Coverity defects: *** CID 550296: Control flow issues (NO_EFFECT) /cmd/spawn.c: 172 in do_wait() 166 for (i = 0; i < CONFIG_CMD_SPAWN_NUM_JOBS; i++) 167 if (job[i]) 168 ret = wait_job(i); 169 } else { 170 for (i = 1; i < argc; i++) { 171 id = dectoul(argv[i], NULL); >>> CID 550296: Control flow issues (NO_EFFECT) >>> This less-than-zero comparison of an unsigned value is never true. "id < 0UL". 172 if (id < 0 || id > CONFIG_CMD_SPAWN_NUM_JOBS) 173 return CMD_RET_USAGE; 174 idx = (int)id - 1; 175 ret = wait_job(idx); 176 } 177 } *** CID 550297: Integer handling issues (INTEGER_OVERFLOW) /cmd/spawn.c: 174 in do_wait() 168 ret = wait_job(i); 169 } else { 170 for (i = 1; i < argc; i++) { 171 id = dectoul(argv[i], NULL); 172 if (id < 0 || id > CONFIG_CMD_SPAWN_NUM_JOBS) 173 return CMD_RET_USAGE; >>> CID 550297: Integer handling issues (INTEGER_OVERFLOW) >>> Expression "idx", where "(int)id - 1" is known to be equal to -1, overflows the type of "idx", which is type "unsigned int". 174 idx = (int)id - 1; 175 ret = wait_job(idx); 176 } 177 } Signed-off-by: Jerome Forissier <[email protected]> CC: Tom Rini <[email protected]>
2025-05-05Makefile: Strip leading spaces when preprocessing generated_defconfigYao Zi
Clang's preprocessor may emit extra spaces for lines starting with '#'. Lines with these extra characters cannot be handled by Kconfig and will be ignored with warnings like, unexpected data: # CONFIG_OF_BOARD_FIXUP is not set Those options that is expected to be assigned explicitly with N will be set to the default value, messing up board configurations. Let's sed these spaces away to ensure board configurations could be correctly generated with Clang. Link: https://github.com/llvm/llvm-project/issues/78778 Fixes: 2027e99e61a ("Makefile: Run defconfig files through the C preprocessor") Reported-by: Nathaniel Hourt <[email protected]> Signed-off-by: Yao Zi <[email protected]>
2025-05-05env: Introduce support for MTDChristian Marangi
Introduce support for env in generic MTD. Currently we only support SPI flash based on the lagacy sf cmd that assume SPI flash are always NOR. This is not the case as to SPI controller also NAND can be attached. To support also these flash scenario, add support for storing and reading ENV from generic MTD device by adding an env driver that base entirely on the MTD api. Introduce a new kconfig CONFIG_ENV_IS_IN_MTD and CONFIG_ENV_MTD_DEV to define the name of the MTD device as exposed by mtd list. Signed-off-by: Christian Marangi <[email protected]>
2025-05-05bootm: improve error message when gzip decompression buffer is too smallAristo Chen
Currently, when decompressing a gzip-compressed image during bootm, a generic error such as "inflate() returned -5" is shown when the buffer is too small. However, it is not immediately clear that this is caused by CONFIG_SYS_BOOTM_LEN being too small. This patch improves error handling by: - Detecting Z_BUF_ERROR (-5) returned from the inflate() call - Suggesting the user to increase CONFIG_SYS_BOOTM_LEN when applicable - Preserving the original return code from zunzip() instead of overwriting it with -1 By providing clearer hints when decompression fails due to insufficient buffer size, this change helps users diagnose and fix boot failures more easily. Signed-off-by: Aristo Chen <[email protected]> Reviewed-by: Tom Rini <[email protected]> Reviewed-by: Mattijs Korpershoek <[email protected]>
2025-05-05Add HOST_ARCH detection for armv5tel and armv6lBen Wolsieffer
Since 7506c15, HOST_ARCH is now used by the EFI loader even when CONFIG_SANDBOX is disabled. When cross-compiling, the Makefile defines HOST_ARCH based on the cross-compiler prefix, but this definition fails to cover some common compiler prefixes. When cross-compiling U-Boot in nixpkgs, we use CROSS_COMPILE=armv6l-unknown-linux-gnueabihf-, which results in HOST_ARCH being undefined and causes a build failure. Fix this by adding armv6l to the match for ARM. Also add armv5tel, as this is another possible ARM compiler prefix. Signed-off-by: ZHANG Yuntian <[email protected]> Signed-off-by: Ben Wolsieffer <[email protected]>