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2026-05-25mach-k3: enable mmu after reserved memory is unmappedAnshul Dalal
Currently the sequence to enable caches for the A53/A72 core on K3 devices looks as follows: 1. Map entire DDR banks 2. Setup page tables (done by mmu_setup) 3. Enable MMU 4. Unmap reserved-memory regions 5. Enable caches However there is a brief period of execution between #3 and #4 where the core can issue speculative accesses to the entire DDR space (including the reserved-memory regions) despite the caches being disabled. A firewall exception is triggered whenever such speculative access is made to secure DDR region of TFA or OP-TEE. This patch fixes the issue by re-ordering the sequence as follows: 1. Map entire DDR banks 2. Setup page tables 3. Unmap reserved-memory regions 4. Enable MMU 5. Enable caches Fixes: f1c694b8fdde ("mach-k3: map all banks using mem_map_from_dram_banks") Reported-by: Suhaas Joshi <[email protected]> Signed-off-by: Anshul Dalal <[email protected]> Reviewed-by: Ilias Apalodimas <[email protected]>
2026-05-25arm: armv8: mmu: move mmu enablement out of mmu_setupAnshul Dalal
Currently mmu_setup for ARMv8 performs two functions, first it sets up the page tables based the memory map provided by the board and then it enables the MMU. However for some platforms runtime fixes to the generated page tables are required before the MMU can be enabled, such as K3 family of SoCs. Therefore this patch moves the enablement of the MMU out of mmu_setup and to a standalone mmu_enable function to give more granular control to the platforms. Note that no functional changes are intended from this patch. Reviewed-by: Ilias Apalodimas <[email protected]> Signed-off-by: Anshul Dalal <[email protected]>
2026-05-25am57xx: restore bootm_size for ARMv7 HighMem constraintMoteen Shah
babae80169d removed bootm_size from ti_common.env to allow K3 boards to process images larger than 256MB, but preserved it in ti_armv7_keystone2.env for ARMv7 Keystone2 boards. AM57xx (also ARMv7) was not covered by that preservation. Without bootm_size, env_get_bootm_size() falls back to gd->ram_size, causing initrd_high to be computed as the top of all RAM. On ARM32 boards with more RAM than the DMA zone (e.g. AM572x IDK with 2GiB), this places the ramdisk above 0xafe00000 (HighMem), which is not directly accessible by the kernel after MMU setup, causing a silent crash. With bootm_size=0x10000000, initrd_high is constrained to 0x80000000 + 0x10000000 = 0x90000000, keeping the ramdisk in the DMA zone and allowing the kernel to access it correctly. Fixes: babae80169dd ("include: env: ti_common: remove bootm_size") Reviewed-by: Neha Malcom Francis <[email protected]> Signed-off-by: Moteen Shah <[email protected]>
2026-05-25arm64: versal2: Fix buffer overflow in soc_name_decodeFrancois Berder
The size of name buffer was not computed correctly. The suffix format is "--rel.-el" (9 chars instead of 6), and the longest platform name is "emu-mmd" (7 chars instead of 4). Fix comment and name size. Fixes: 40f5046c221a ("arm64: versal2: Add support for AMD Versal Gen 2") Signed-off-by: Francois Berder <[email protected]> Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/BESP194MB280513B376D54A815F3FD507DA0E2@BESP194MB2805.EURP194.PROD.OUTLOOK.COM
2026-05-25fpga: versalpl: Fix unaligned buffer handlingPranav Tilak
When fpga load is called with a misaligned buffer address, the versal_align_dma_buffer() function shifts the pointer forward to the next aligned boundary and uses memcpy() to copy the data. Since the destination is ahead of the source and the regions overlap, memcpy() produces undefined behavior; in practice U-Boot's generic memcpy() copies forward, repeating the first ARCH_DMA_MINALIGN-aligned chunk throughout the buffer. Replace memcpy() with memmove() which correctly handles overlapping regions by copying backwards when the destination is ahead of the source. Fixes: 26e054c943a7 ("arm64: versal: fpga: Add PL bit stream load support") Signed-off-by: Pranav Tilak <[email protected]> Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2026-05-22Merge patch series "Add virtio-mmio support to m68k virt machine"Tom Rini
Daniel Palmer <[email protected]> says: Lets start making the m68k virt machine support useful. First we need to fix some m68k endian issues. Then allow virtio mmio driver instances to be created with platform data and fix a minor endian issue. Finally, add the code for the board to create the instances. Link: https://lore.kernel.org/r/[email protected]
2026-05-22board: qemu: m68k: Create virtio mmio instancesDaniel Palmer
So that you can use virtio network, block etc create the virtio mmio instances. There are 128 of these even if they are not all used, a single mmio base value is passed via bootinfo. Reviewed-by: Angelo Dureghello <[email protected]> Reviewed-by: Simon Glass <[email protected]> Reviewed-by: Kuan-Wei Chiu <[email protected]> Tested-by: Kuan-Wei Chiu <[email protected]> Signed-off-by: Daniel Palmer <[email protected]>
2026-05-22virtio: blk: Fix converting the vendor id to a stringDaniel Palmer
Currently we are trying to work out if the vendor id is from a virtio-mmio device and then casting a u32 to a char* and using it as a C-string. By chance there is usually a zero after the u32 and it works. Since the vendor id we are trying to convert to a string is QEMU's just define a value for the QEMU vendor id, check if the vendor id matches and then use a predefined string for "QEMU". I don't think we should have been assumming all virtio-mmio vendor ids are printable ASCII chars in the first place so do this special casing just for QEMU. If the vendor id isn't QEMU print the hex value of it. Reviewed-by: Simon Glass <[email protected]> Reviewed-by: Kuan-Wei Chiu <[email protected]> Signed-off-by: Daniel Palmer <[email protected]>
2026-05-22virtio: cmd: Depend on VIRTIO_BLKDaniel Palmer
The virtio command is calling virtio blk functions but currently depends on CONFIG_VIRTIO only. This means disabling CONFIG_VIRTIO_BLK causes the final link to fail. Since CONFIG_VIRTIO_BLK depends on CONFIG_VIRTIO switch to depending on just CONFIG_VIRTIO_BLK Reviewed-by: Kuan-Wei Chiu <[email protected]> Reviewed-by: Angelo Dureghello <[email protected]> Reviewed-by: Tom Rini <[email protected]> Reviewed-by: Simon Glass <[email protected]> Signed-off-by: Daniel Palmer <[email protected]>
2026-05-22virtio: mmio: Allow instantiation via platform dataDaniel Palmer
The m68k QEMU virt machine doesn't use devicetree, yet, so allow it to create virtio-mmio instances via platform data. Reviewed-by: Simon Glass <[email protected]> Reviewed-by: Kuan-Wei Chiu <[email protected]> Reviewed-by: Angelo Dureghello <[email protected]> Signed-off-by: Daniel Palmer <[email protected]>
2026-05-22m68k: Fix writew(), writel(), readw(), readl() endianness for classic m68kDaniel Palmer
In Linux these are meant to read a little-endian value and swap to the CPU endian. In u-boot for m68k this is currently broken and prevents virtio-mmio from functioning. This change is only for classic m68k. Coldfire has read big-endian, no swap for these in u-boot and Linux and existing drivers probably depend on this. Tested-by: Angelo Dureghello <[email protected]> Reviewed-by: Simon Glass <[email protected]> Acked-by: Kuan-Wei Chiu <[email protected]> Acked-by: Angelo Dureghello <[email protected]> Signed-off-by: Daniel Palmer <[email protected]>
2026-05-22timer: goldfish: Use __raw_readl()Kuan-Wei Chiu
The Goldfish timer registers are native endian, so they act as big-endian on the m68k virt machine. Currently, this driver uses readl(), which works by luck because it's currently broken on m68k. Use __raw_readl() instead to avoid breaking this driver when the endianness of readl() is fixed. Signed-off-by: Kuan-Wei Chiu <[email protected]> Tested-by: Daniel Palmer <[email protected]> Reviewed-by: Simon Glass <[email protected]> Signed-off-by: Daniel Palmer <[email protected]>
2026-05-22rtc: goldfish: Use __raw_readl() and __raw_writel()Kuan-Wei Chiu
In QEMU, the Goldfish RTC is explicitly instantiated as a big-endian device on the m68k virt machine (via the 'big-endian=true' property). Currently, this driver uses ioread32() and iowrite32(), which works by luck because the underlying readl() and writel() are currently broken on m68k. Use __raw_readl() and __raw_writel() instead to avoid breaking this driver when the endianness of readl() and writel() is fixed. Signed-off-by: Kuan-Wei Chiu <[email protected]> Tested-by: Daniel Palmer <[email protected]> Reviewed-by: Simon Glass <[email protected]> Signed-off-by: Daniel Palmer <[email protected]>
2026-05-22sysreset: qemu virt: Use __raw_writel()Daniel Palmer
The virt ctrl register seems to be native endian, currently this driver uses writel(), which works by luck because its currently broken on m68k. Use __raw_writel() instead to avoid breaking this driver when the endianness of writel() is fixed. Acked-by: Kuan-Wei Chiu <[email protected]> Reviewed-by: Angelo Dureghello <[email protected]> Reviewed-by: Simon Glass <[email protected]> Signed-off-by: Daniel Palmer <[email protected]>
2026-05-22sysreset: qemu virt: Use map_sysmem()Daniel Palmer
In the platform data there is a phys_addr_t (an integer) for the address of the register and we pass that as-is into writel() which is fine in most places because we don't need to do any mapping and the macro for writel() does a cast to a pointer. If writel() is a static inline function the address argument is a pointer so passing it in as an integer without casting it first causes warnings or build failure. map_sysmem() handles the casting part and if phys_addr_t is 32bits when on a 64bit machine. Signed-off-by: Daniel Palmer <[email protected]> Acked-by: Kuan-Wei Chiu <[email protected]>
2026-05-22Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-shTom Rini
This is Renesas R-Car X5H support for U-Boot on its RSIP Cortex-M33 core in addition to already support U-Boot on Cortex-A720AE core. The first two patches also switch X5H to OF_UPSTREAM.
2026-05-21arm: renesas: Add Renesas R-Car R8A78000 X5H Cortex-M33 RSIP portMarek Vasut
Add support for building U-Boot for Cortex-M33 RSIP core in Renesas R-Car Gen5 R8A78000 X5H SoC. The main goal is to start U-Boot on the Cortex-M33 RSIP core, which initializes the hardware and then starts the Cortex-M33 SCP and Cortex-A720 cores which run the SCP firmware and applications software respectively. The SCP is responsible for platform resource management, and is used to start other CPU cores. The Cortex-M33 build contains its own r8a78000_ironhide_cm33_defconfig which configures the build for aarch32 instruction set compatible with the ARMv8M core. The build also uses -cm33 DT and -u-boot.dtsi which are derived from their non-CM33 counterparts, and add CM33 specifics. The arch/arm/mach-renesas/u-boot-rsip.lds is derived from generic arch/arm/cpu/u-boot.lds with adjustments to cater to the RSIP core, those are entrypoint before vectors, __data_start/__data_end symbols for data-only relocation, and placement of BSS into read-write SRAM area. Signed-off-by: Marek Vasut <[email protected]>
2026-05-21arm: renesas: Generate u-boot-elf.shdr for R-Car Gen5 RSIPMarek Vasut
Add target to generate u-boot-elf.shdr for R-Car Gen5 Cortex-M33 RSIP core. The resulting .shdr SREC file can be written into the HF at offset 0. Signed-off-by: Marek Vasut <[email protected]>
2026-05-21arm: renesas: Generate u-boot-elf.scif for R-Car Gen5 RSIPMarek Vasut
Add target to generate u-boot-elf.scif for R-Car Gen5 Cortex-M33 RSIP core. The resulting .scif SREC file can be loaded using the SCIF loader to start U-Boot on the RSIP core. Signed-off-by: Marek Vasut <[email protected]>
2026-05-21arm64: dts: renesas: Update reset IDs on R-Car Gen5 R8A78000 X5HMarek Vasut
The current DT reset ID encoding in R-Car Gen5 R8A78000 X5H U-Boot DTs is inherited from downstream BSP. New reset bindings for this SoC are now submitted and under review [1]. Replace the DT reset IDs with the ones used in the new bindings. [1] https://lore.kernel.org/all/053c312d07445517d8f9c84bfe3cc8fb72d4cd9a.1776793163.git.geert+renesas@glider.be/ Signed-off-by: Marek Vasut <[email protected]>
2026-05-21arm64: dts: renesas: Switch to remap drivers on R-Car Gen5 R8A78000 X5HMarek Vasut
Point every direct user of SCMI clock protocol at CPG node instead of SCMI clock protocol node. Point every direct user of SCMI reset and power domain protocol at a matching newly introduced MDLC node instead of the SCMI reset and power domain protocol nodes. This allows the CPG and MDLC remap drivers bound to CPG node and MDLC nodes to remap between DT clock, reset and power domain IDs and SCMI clock, reset and power domain IDs. This makes U-Boot on R-Car X5H compatible with multiple SCP firmware versions. Currently supported versions of SCP firmware are 4.28, 4.31 and 4.32. Signed-off-by: Marek Vasut <[email protected]>
2026-05-21arm64: renesas: Select R-Car Gen5 R8A78000 X5H MDLC power domain and reset ↵Marek Vasut
driver Select the R8A78000 power domain and reset driver on R-Car Gen5 X5H SoC by default. The power domain and reset driver is used to remap DT power domain and reset IDs to SCMI power domain and reset IDs, which is necessary to support multiple SCP firmware versions with varying SCMI clock IDs across versions. Signed-off-by: Marek Vasut <[email protected]>
2026-05-21power: domain: Add Renesas R-Car R8A78000 X5H MDLC power domain and reset driverMarek Vasut
Add Renesas R-Car R8A78000 X5H MDLC power domain and reset driver, which serves as a remap driver between DT power domain and reset IDs and SCMI power domain and reset IDs in case U-Boot runs on Cortex-A, and as a direct hardware access driver for RSIP. The R-Car X5H SCP firmware uses different SCMI power domain and reset IDs in different versions of the SCP firmware, which makes this remapping necessary. The SCMI base protocol version is updated for each new SCP firmware version, it is therefore possible to determine which SCP firmware version is running on the platform from the base protocol and then determine which remapping table to use for DT power domain and reset ID to SCMI power domain and reset ID remapping. Currently supported versions are SCP 4.28, 4.31, 4.32 . The DT power domain and reset ID to SCMI power domain and reset ID remap and call mechanism is simple. Unlike SCMI clock protocol driver, the SCMI reset and power domain protocol drivers register only a single device. This driver looks up that single device, obtains its reset or power domain ops, sets up struct reset_ctl or struct power_domain with remapped SCMI ID, and invokes operations directly on the device. In case of RSIP, all power domains are already enabled by BootROM or early SoC initialization code, the driver therefore only acts as a stub for the power domain part. The reset part operates as a direct hardware access reset driver. Signed-off-by: Marek Vasut <[email protected]>
2026-05-21arm64: renesas: Select R-Car Gen5 R8A78000 X5H CPG clock driverMarek Vasut
Select the R8A78000 clock driver on R-Car Gen5 X5H SoC by default. The clock driver is used to remap DT clock IDs to SCMI clock IDs, which is necessary to support multiple SCP firmware versions with varying SCMI clock IDs across versions. Signed-off-by: Marek Vasut <[email protected]>
2026-05-21clk: renesas: Add Renesas R-Car R8A78000 X5H CPG clock driverMarek Vasut
Add Renesas R-Car R8A78000 X5H CPG clock driver, which serves as a remap driver between DT clock IDs and SCMI clock IDs in case U-Boot runs on the Cortex-A, and as a trivial clock driver for RSIP. The R-Car X5H SCP firmware uses different SCMI clock IDs in different versions of the SCP firmware, which makes this remapping necessary. The SCMI base protocol version is updated for each new SCP firmware version, it is therefore possible to determine which SCP firmware version is running on the platform from the base protocol and then determine which remapping table to use for DT clock ID to SCMI clock ID remapping. Currently supported versions are SCP 4.28, 4.31, 4.32 . The DT clock ID to SCMI clock ID remap and call mechanism is a bit complex. The driver looks up the SCMI clock protocol device on probe and stores pointer to it in private data. On each clock request which has to be remapped, the device sequence ID of this SCMI clock protocol device is incremented by the remapped SCMI clock ID + 1 and used to look up matching clock device by sequence number. If the device is found, it is converted to clock, which can be used in regular clock operations. This look up has to be done because the SCMI clock driver registers a subdevice for each clock, and this look up is the only way to find the correct SCMI clock subdevice. Since the SCMI device and the clock subdevices are registered in the same function, we can depend on the device sequence numbers to be monotonically incrementing, with SCMI clock protocol device being sequence number N, the first SCMI clock subdevice being sequence number N+1 and so on. In case of RSIP, all clocks are already enabled by BootROM or early SoC initialization code, the driver therefore only acts as a stub. Signed-off-by: Marek Vasut <[email protected]>
2026-05-21arm64: renesas: Select HSCIF for DEBUG UART on R-Car Gen5 R8A78000 X5HMarek Vasut
The R-Car Gen5 R8A78000 X5H uses HSCIF as default serial console interface. Select CFG_HSCIF to make debug UART code also configure serial console interface as HSCIF instead of SCIF in case the CONFIG_DEBUG_UART would be enabled. Signed-off-by: Marek Vasut <[email protected]>
2026-05-21arm64: dts: renesas: Use SCP_CLOCK_ID_CLK_S0D6_PERE_MAIN on R-Car X5HMarek Vasut
Use macro SCP_CLOCK_ID_CLK_S0D6_PERE_MAIN for SCMI clock 1691 instead of hardcoding the number in DT. No functional change. Signed-off-by: Marek Vasut <[email protected]>
2026-05-21arm64: dts: renesas: Switch to upstream DT on Renesas R-Car X5H R8A78000Marek Vasut
Enable OF_UPSTREAM to use upstream Linux kernel DT source as a base for U-Boot control DT. Retain currently present parts of the DT which are not yet part of upstream Linux kernel DT in -u-boot.dtsi files until they get replaced by upstream equivalents. Add renesas/ prefix to the DEFAULT_DEVICE_TREE as part of the switch. Unused i2c2..i2c8 nodes have been removed, and will become available once upstream Linux kernel DT adds those nodes. The DRAM_RSV_SIZE has been updated to cover first 518 MiB of DRAM, which are reserved for firmware and other use. Note that all DT parts in -u-boot.dtsi are not considered stable DT bindings and may change before they land in Linux kernel and become stable DT ABI. Signed-off-by: Marek Vasut <[email protected]>
2026-05-21Merge tag 'u-boot-dfu-20260521' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-dfu u-boot-dfu-20260521 CI: https://source.denx.de/u-boot/custodians/u-boot-dfu/-/pipelines/30195 Usb Gadget: * f_acm: Fix memory leak in acm_add() * atmel: Fix gadget support on bus reset
2026-05-21Merge tag 'u-boot-nvme-fixes-20260521' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-ufs - Add myself as Maintainer of NVMe - fix command ID wraparound handling - apple: Check memalign return value - Staticize and constify driver ops - Fix PRP list pointer arithmetic for chained transfers
2026-05-20usb: gadget: atmel: do not disable endpoints in reset_all_endpoints()Zixun LI
Endpoints should not be disabled on bus reset inside UDC driver, otherwise a race condition will happen between gadget driver. Gadget driver will free the requests and disable endpoints in disconnect ops. Also remove outdated comment about it in usba_ep_disable(). Signed-off-by: Zixun LI <[email protected]> Reviewed-by: Mattijs Korpershoek <[email protected]> Fixes: 59310d1ecb9f ("usb: gadget: introduce 'enabled' flag in struct usb_ep") Link: https://patch.msgid.link/[email protected] [mkorpershoek: removed empty newline between Fixes: and sob] Signed-off-by: Mattijs Korpershoek <[email protected]>
2026-05-20nvme: Fix PRP list pointer arithmetic for chained transfersPrashant Kamble
The PRP setup code advances prp_pool using u64 pointer arithmetic: prp_pool += page_size; This increments the pointer by page_size * sizeof(u64) bytes instead of page_size bytes, resulting in invalid PRP list addresses when multiple PRP list pages are required. The issue becomes visible for large transfers, typically above 2 MiB when MDTS > 9. Fix it by using byte-wise pointer arithmetic when advancing to the next PRP list page. Signed-off-by: Prashant Kamble <[email protected]> Reviewed-by: Neil Armstrong <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Neil Armstrong <[email protected]>
2026-05-20nvme: Staticize and constify driver opsMarek Vasut
Set the ops structure as static const. The structure is not accessible from outside of this driver and is not going to be modified at runtime. Signed-off-by: Marek Vasut <[email protected]> Reviewed-by: Neil Armstrong <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Neil Armstrong <[email protected]>
2026-05-20nvme: apple: Check memalign return valueFrancois Berder
memalign returns NULL if it fails. This commit ensures that we handle this failure before filling the buffer with 0s. Signed-off-by: Francois Berder <[email protected]> Reviewed-by: Neil Armstrong <[email protected]> Link: https://patch.msgid.link/BESP194MB280542535B098A33C8A815EEDA3A2@BESP194MB2805.EURP194.PROD.OUTLOOK.COM Signed-off-by: Neil Armstrong <[email protected]>
2026-05-20nvme: fix command ID wraparound handlingPrashant Kamble
nvme_get_cmd_id() returns 0 after cmdid reaches USHRT_MAX, but fails to reset cmdid itself. As a result, all subsequent calls keep returning 0 indefinitely. Reset cmdid when wraparound occurs so command IDs continue incrementing correctly. Signed-off-by: Prashant Kamble <[email protected]> Reviewed-by: Neil Armstrong <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Neil Armstrong <[email protected]>
2026-05-20MAINTAINERS: Add myself to the list of NVMe maintainersNeil Armstrong
Adding myself to continue Bin's work to help maintain the NVMe support in U-boot. Acked-by: Tom Rini <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Neil Armstrong <[email protected]>
2026-05-19virtio: Drop empty bootdev_ops structureTom Rini
We don't need to provide an empty struct here now that the caller can handle this being empty. Signed-off-by: Tom Rini <[email protected]>
2026-05-19scsi: Drop empty bootdev_ops structureTom Rini
We don't need to provide an empty struct here now that the caller can handle this being empty. Signed-off-by: Tom Rini <[email protected]>
2026-05-19ata: sata: Drop empty bootdev_ops structureTom Rini
We don't need to provide an empty struct here now that the caller can handle this being empty. Signed-off-by: Tom Rini <[email protected]>
2026-05-19block: ide: Drop empty bootdev_ops structureTom Rini
We don't need to provide an empty struct here now that the caller can handle this being empty. Signed-off-by: Tom Rini <[email protected]>
2026-05-19bootdev: Fix the case where the driver ops field is null.Tom Rini
In the case where a bootdev does not have a custom get_bootflow function but instead relies on default_get_bootflow to provide one, bootdev_get_bootflow was not handling the case where ops was simply not set. Restructure the function to check for "ops && ops->get_bootflow" and add appropriate log_debug calls for both cases. Signed-off-by: Tom Rini <[email protected]>
2026-05-18arm: Fix typo in linker scriptMarek Vasut
Fix typo, addreses -> addresses. No functional change. Signed-off-by: Marek Vasut <[email protected]> Acked-by: Ilias Apalodimas <[email protected]>
2026-05-18Merge branch 'staticize-constify-drivers' into nextTom Rini
This brings in a number of patches from Marek Vasut to clean up cases tree-wide where a struct should be marked as static and const (in some cases only one of these was needed, but the majority are both).
2026-05-18spi: apple: Staticize and constify driver opsMarek Vasut
Set the ops structure as static const. The structure is not accessible from outside of this driver and is not going to be modified at runtime. Signed-off-by: Marek Vasut <[email protected]> Acked-by: Mark Kettenis <[email protected]>
2026-05-18scsi: sandbox: Staticize and constify driver opsMarek Vasut
Set the ops structure as static const. The structure is not accessible from outside of this driver and is not going to be modified at runtime. Signed-off-by: Marek Vasut <[email protected]> Reviewed-by: Simon Glass <[email protected]>
2026-05-18rtc: emul: Staticize and constify driver opsMarek Vasut
Set the ops structure as static const. The structure is not accessible from outside of this driver and is not going to be modified at runtime. Signed-off-by: Marek Vasut <[email protected]> Reviewed-by: Simon Glass <[email protected]>
2026-05-18reset: tegra186: Staticize and constify driver opsMarek Vasut
Set the ops structure as static const. The structure is not accessible from outside of this driver and is not going to be modified at runtime. Signed-off-by: Marek Vasut <[email protected]> Acked-by: Svyatoslav Ryhel <[email protected]>
2026-05-18reset: tegra-car: Staticize and constify driver opsMarek Vasut
Set the ops structure as static const. The structure is not accessible from outside of this driver and is not going to be modified at runtime. Signed-off-by: Marek Vasut <[email protected]> Acked-by: Svyatoslav Ryhel <[email protected]>
2026-05-18reset: sti: Staticize and constify driver opsMarek Vasut
Set the ops structure as static const. The structure is not accessible from outside of this driver and is not going to be modified at runtime. Signed-off-by: Marek Vasut <[email protected]> Reviewed-by: Patrice Chotard <[email protected]>
2026-05-18reset: sandbox: Staticize and constify driver opsMarek Vasut
Set the ops structure as static const. The structure is not accessible from outside of this driver and is not going to be modified at runtime. Signed-off-by: Marek Vasut <[email protected]>