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Most test suites have a _test suffix. This is not necessary as there is
also a ut_ prefix.
Drop the suffix so that (with future work) the suite name can be used as
the linker-list name.
Remove the suffix from the pytest regex as well, moving it to the top of
the file, as it is a constant.
Signed-off-by: Simon Glass <[email protected]>
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Add a Python test which runs 'ut all' and then checks that the expected
suites are present and all tests in each suite are run.
This can help to check that nothing is missing.
Update 'ut info' to ignore the 'all' suite when counting the number of
suites, since that is really just a combination of all the other suites.
Adjust the message for skipped tests so that appears even if no
particular test was selected. This helps the new 'test_suite' test see
what is going on.
Signed-off-by: Simon Glass <[email protected]>
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It is helpful to see a list of available suites. At present this is
handled by the longhelp for the 'ut' command, but this is not in a
format which can be easily parsed by python tests.
Add a -s option to show this. At present it is not possible to show the
number of tests in each suite, but future work will address this. For
now, show a ?
Signed-off-by: Simon Glass <[email protected]>
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Some suites have a different name from that used in the linker list.
That makes it hard to programmatically match the name printed when the
suite runs to the linker-list name it has.
Update the names so they are the same.
Signed-off-by: Simon Glass <[email protected]>
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A few messages lack a newline so the test output shows the next
test-name on the same line. For example:
Beware: this test sets local variable dollar_bar and dollar_quux
and they cannot be unset!Test: hush_test_env_dollar: dollar.c
This is confusing, so fix it.
Signed-off-by: Simon Glass <[email protected]>
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A limitation of most linker_list macros is that they cannot easily be
used in data structures. This is because they include code inside their
expressions.
Provide a way to support this, with new ll_start_decl() and
ll_end_decl() macros.
Signed-off-by: Simon Glass <[email protected]>
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Pass this into the function so that callers can inspect the state
afterwards.
Signed-off-by: Simon Glass <[email protected]>
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Move these operations into separate functions so that it is clearer what
is needed. These functions can also be called from somewhere other than
ut_run_list().
Signed-off-by: Simon Glass <[email protected]>
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Rename this function and test_set_state() so use the same ut_ prefix as
other functions in ut.h
Signed-off-by: Simon Glass <[email protected]>
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Drop some the prototypes for functions which were removed in earlier
series.
Signed-off-by: Simon Glass <[email protected]>
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The string conversion functions are implemented in lib/strto.c which is
only compiled if CONFIG_STRTO=y.
Signed-off-by: Heinrich Schuchardt <[email protected]>
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This config is causing conflicts with how fdtfile variable is
initialized.
For K3 devices, CONFIG_DEFAULT_DEVICE_TREE= "ti/k3-<board>.dtb".
With CONFIG_TI_FDT_FOLDER_PATH also prefixing "ti", fdtfile is then
"ti/ti/k3-<board>.dtb". This variable is updated when fitImage is
booted and fails to boot due to the parsing error "ti/ti/".
Given that there are no other users of this config other than K3 for
now, it is being removed.
Since am64x, j721e and j721s2 also define a DEFAULT_FDT_FILE, update
them to conform to the DEFAULT_DEVICE_TREE standard.
Signed-off-by: Aashvij Shenai <[email protected]>
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Replace Maximumm with Maximum in Kconfig symbol description, fix a typo.
No functional change.
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Michal Simek <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-dfu
CI: https://source.denx.de/u-boot/custodians/u-boot-dfu/-/pipelines/24323
Android:
- Fix kcmdline null pointer dereference (reported by coverity and
multiple users)
- Move Igor to reviewers instead of maintainers for avb/ab
- Fix booting Android with AVB built-in, but disabled via
fastboot flash --disable-verity vbmeta vbmeta.img
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https://source.denx.de/u-boot/custodians/u-boot-socfpga
1. Bug fixed for doorbell in secure device manager mailbox driver
2. Enhancement on SoCFPGA dwc_eth_xgmac driver
3. Enhancement on DW MAC driver
4. Improved the error message and status for SoC64 device FPGA
configuration driver
5. Updated existing watchdog in system manager to support new SM device
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Currently the FPGA reconfig status only return a single error status
which make the debugging of FPGA reconfiguration hard.
This patch is to expose the error status, major error code and
minor error code, for the FPGA reconfig to upper layer app.
Signed-off-by: Boon Khai Ng <[email protected]>
Reviewed-by: Tien Fong Chee <[email protected]>
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This patch adds support for configuring the ethernet MAC mode independently
from the PHY mode on our SoC FPGA board. Specifically, this is necessary
for a scenario where the ethernet controller MAC is connected to the
FPGA HVIO with a different GMII interface, and the FPGA output is routed
to the PHY using a RGMII interface.
To support this configuration, a mechanism is introduced to handle
separate MAC mode settings, ensuring that the MAC controller and PHY
can operate correctly with their respective interface modes.
If mac-mode is not defined, the MAC mode will default to the PHY mode,
ensuring compatibility and proper operation between the MAC and PHY.
Signed-off-by: Boon Khai Ng <[email protected]>
Reviewed-by: Tien Fong Chee <[email protected]>
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Agilex5 having several ethernet instance, adding the device
name at the error message to differentiate between which
instance is having issue.
Signed-off-by: Boon Khai Ng <[email protected]>
Reviewed-by: Tien Fong Chee <[email protected]>
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An issue was identified where selecting the phy-mode as
rgmii-id in the device tree source (DTS) would cause the
`dwc_eth_xgmac_socfpga` driver to raise an unsupported phy mode error.
From the MAC controller's perspective, the rgmii and rgmii-id
phy modes are effectively identical. To address this, both
modes will now be configured to rgmii in the MAC controller.
This change ensures that the rgmii-id phy mode is properly
supported without error.
Signed-off-by: Boon Khai Ng <[email protected]>
Reviewed-by: Tien Fong Chee <[email protected]>
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This patch adds support for the "rgmii-id", "rgmii-rxid", and
"rgmii-txid" modes for the dwmac_socfpga driver.
Signed-off-by: Rufus Segar <[email protected]>
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The current write and notify SDM to read mechanism has a flaw where
SDM is not notified enough to be able to read all the data in the buffer.
This is caused by SDM doorbell will only be sent out once the command
buffer overflow check is satisfied. If the command buffer does not reach
overflow status, no SDM doorbell will be sent out, which may cause a
timeout as the mailbox driver will be waiting for the SDM to read the
buffer to empty even though SDM is not notified to do so.
The solution is to remove the command buffer overflow check
and set the SDM doorbell to always trigger at the end of the command
buffer.
This will ensure that the SDM is able to read all of the data.
Signed-off-by: Alif Zakuan Yuslaimi <[email protected]>
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This commit is to fix the system manager watchdog mode setting to support
until mode_4 for Agilex5. This changes can refer to system manager register
map on wddbg fields.
In Agilex7 it is not detected as an issue because Agilex7 only have 4 watchdog
until mode_3 and it is already been set correctly for it to halt on any CPU in
debug mode. However, in Agilex5 this fix is needed in order to enable the watchdog
pause feature for mode_4 when entering debug mode. If 0xF is not been set on mode_4,
the Watchdog Timers will not halt on any CPU. As by default value, the pause signal
does not assert when any CPU is in debug mode and the watchdog continue to count.
Signed-off-by: Muhammad Hazim Izzat Zamri <[email protected]>
Reviewed-by: Tien Fong Chee <[email protected]>
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Weijie Gao <[email protected]> says:
This patch series will split the switch initialization code from mtk_eth
driver into their own files and then add new SoC and switch support.
Link: https://lore.kernel.org/r/[email protected]
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Michael Chang <[email protected]> says:
I am resubmitting the patch titled "Add bitbang feature for npcm8xx
and driver" for review and inclusion in the upstream project.
Driver didn't support bitbang feature.
Add bb_miiphy_bus function for driver and open feature for npcm8xx
the log is as below:
-------------------------------------------------
U-Boot 2024.10-g30b9cdaf2df5-dirty (Jan 09 2025 - 00:57:37 +0000)
CPU-0: NPCM845 A1 @ Model: Nuvoton npcm845 Development Board (Device Tree)
DRAM: 1 GiB
RNG: NPCM RNG module bind OK
OTP: NPCM OTP module bind OK
AES: NPCM AES module bind OK
SHA: NPCM SHA module bind OK
I/TC: Reserved shared memory is enabled
I/TC: Dynamic shared memory is enabled
I/TC: Normal World virtualization support is disabled
I/TC: Asynchronous notifications are disabled
Core: 649 devices, 28 uclasses, devicetree: separate
WDT: Not starting watchdog@901c
MMC: sdhci@f0842000: 0
Loading Environment from SPIFlash... SF:
Detected w25q512jvq with page size 256 Bytes, erase size 64 KiB,
total 64 MiB
OK
In: serial@0
Out: serial@0
Err: serial@0
Net: eth0: eth@f0802000, eth1: eth@f0804000, eth3: eth@f0808000
Hit any key to stop autoboot: 0
U-Boot>
U-Boot>
U-Boot>setenv ipaddr 192.168.16.3
U-Boot>ping 192.168.16.12
eth@f0802000 Waiting for PHY auto negotiation to complete
......... TIMEOUT !
Could not initialize PHY eth@f0802000
eth@f0804000 Waiting for PHY auto negotiation to complete
......... TIMEOUT !
Could not initialize PHY eth@f0804000
Speed: 100, full duplex
Using eth@f0808000 device
host 192.168.16.12 is alive
Link: https://lore.kernel.org/r/[email protected]
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Add bb_miiphy_bus function for designware bitbang feature.
Signed-off-by: Jim Liu <[email protected]>
Signed-off-by: Michael Chang <[email protected]>
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Enable bitbang and multiple bitbang feature for npcm8xx platform.
Signed-off-by: Jim Liu <[email protected]>
Signed-off-by: Michael Chang <[email protected]>
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Add bitbang delay through dts properties.
Signed-off-by: Jim Liu <[email protected]>
Signed-off-by: Michael Chang <[email protected]>
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Airoha AN8855 is a 5-port gigabit switch with a 2.5G HSGMII CPU port
Signed-off-by: Weijie Gao <[email protected]>
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This patch adds support for MediaTek MT7987.
MT7987 features MediaTek NETSYS v3, similar to MT7988, features three GMACs
which support 2.5Gb HSGMII. One 2.5Gb PHY is also embedded an can be
connected to a dedicated GMAC.
Signed-off-by: Weijie Gao <[email protected]>
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mtk_eth.c contains not only the ethernet GMAC/DMA driver, but also
some ethernet switch initialization code. As we may add more switch
support in the future, it's better to move them out of mtk_eth.c to
avoid increasing the code complexity.
Since not all switches are supported for a particular board, Kconfig
options are added to allow user to select which switch should be
built into u-boot. If multiple switches are selected, auto-detecting
can also be enabled.
Signed-off-by: Weijie Gao <[email protected]>
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Enable ENV_OVERWRITE to allow environment variables to be
overwritten within the board code. This is required to add
MAC addresses during SOM detection.
Additionally, set ENV_IS_NOWHERE for boot sources other than MMC.
Signed-off-by: Daniel Schultz <[email protected]>
Reviewed-by: Wadim Egorov <[email protected]>
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Enable the GPIO command to allow access to the GPIO pins.
Signed-off-by: Daniel Schultz <[email protected]>
Reviewed-by: Wadim Egorov <[email protected]>
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The phyBOARD-Electra does not include a PCA953x I2C GPIO multiplexer.
Remove this configuration as it is a remnant from another
defconfig, and enable CONFIG_DA8XX_GPIO for the DA8XX DaVinci GPIO
controller instead.
Signed-off-by: Daniel Schultz <[email protected]>
Reviewed-by: Wadim Egorov <[email protected]>
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We set the boot source as environment variable 'boot'.
Also include 'uart' and 'usbdfu' as possible boot sources.
Signed-off-by: Daniel Schultz <[email protected]>
Reviewed-by: Wadim Egorov <[email protected]>
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Increase the malloc pool size for the SPL by additional 4kB from
0x7000 to 0x8000.
This fixes following error message:
...
alloc space exhausted ptr 7028 limit 7000
DRAM init failed: -12
Signed-off-by: Daniel Schultz <[email protected]>
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With commit 22ce56a3ebdb ("ram: k3-ddrss: Add k3_ddrss_ddr_bank_base_size_calc()
to solve 'calculations restricted to 32 bits' issue") we need to provide the
detected RAM size in the device tree node prio to K3 DDRSS driver probe.
This is done by calling fdt_fixup_memory_banks() in do_board_detect().
After probing, call into k3-ddrss driver to fixup device tree and resize
the available amount of DDR if ECC is enabled.
A third fixup is required from A53 SPL to take the fixup
as done from R5 SPL and apply it to DT passed to A53 U-boot,
which in turn passes this to the OS.
Signed-off-by: Wadim Egorov <[email protected]>
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Weijie Gao <[email protected]> says:
This patch series contains fixes and updates for MediaTek platform,
including drivers, board and arch files.
Link: https://lore.kernel.org/r/[email protected]
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Add driver files for MediaTek ARM platform
Signed-off-by: Weijie Gao <[email protected]>
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1. Fix mmc clock order of mt7981 to match the clock name
2. Limit the max clock of SD to 50MHz to meet SD Card Spec 2.0
3. Increase the CLK pin driving strength to 8mA
Signed-off-by: Weijie Gao <[email protected]>
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Add driving settings for both SPI and SD/eMMC interfaces to support ensure
flash devices is accessible for ram-booting.
Signed-off-by: Weijie Gao <[email protected]>
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This patch add all three GMACs nodes for mt7988. Each GMAC can be
configured to connect to different ethernet switches/PHYs.
Signed-off-by: Weijie Gao <[email protected]>
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The CPU port of mt7988 internal switch uses 10Gb link speed.
Signed-off-by: Weijie Gao <[email protected]>
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This patch adds PCIe support for mt7988
Signed-off-by: Sam Shih <[email protected]>
Signed-off-by: Weijie Gao <[email protected]>
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One MediaTek PCIe Gen3 controller has only one port, where PCI bus 0
on this port represents the controller itself and bus 1 represents
the external PCIe device.
If multiple PCIe controllers are probed in U-Boot, U-Boot will use
bus numbers greater than 2 as input parameters. Therefore, we should
convert the BDF bus number to either 0 or 1 by subtracting the
offset by controller->seq_.
Signed-off-by: Sam Shih <[email protected]>
Signed-off-by: Weijie Gao <[email protected]>
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This patch adds pwm channel 2 (pwm3) support for mt7981
Signed-off-by: Sam Shih <[email protected]>
Signed-off-by: Weijie Gao <[email protected]>
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Explicitly add quad mode capabilities or the SPI controller may
start transfer in single mode.
Signed-off-by: SkyLake.Huang <[email protected]>
Signed-off-by: Weijie Gao <[email protected]>
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Call spi_mem_default_supports_op() in supports_op to honor the
slave's supported single/dual/quad mode settings.
Signed-off-by: SkyLake.Huang <[email protected]>
Signed-off-by: Weijie Gao <[email protected]>
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Change devfdt_get_addr_ptr to dev_read_addr_ptr to support DT live tree.
Signed-off-by: Weijie Gao <[email protected]>
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This patch sets mt7988 image load address to 0x44000000 to support loading
larger images.
Signed-off-by: Weijie Gao <[email protected]>
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Update the image load address to ensure it matches the mt7629 NOR
controller's DMA alignment requirements.
Signed-off-by: Sam Shih <[email protected]>
Signed-off-by: Weijie Gao <[email protected]>
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