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This fixes the issue where mxs_dma_init() was called either twice or never,
without introducing any new init hooks.
The idea is to allow each and every device using the APBH DMA block to
configure and request only the channels it uses, instead of making it call init
for all the channels as is now.
The common DMA block init part, which only configures the block, is then called
from CPUs arch_cpu_init() call.
NOTE: This patch depends on:
http://patchwork.ozlabs.org/patch/150957/
Signed-off-by: Marek Vasut <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Detlev Zundel <[email protected]>
Cc: Fabio Estevam <[email protected]>
Tested-by: Fabio Estevam <[email protected]>
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Remove gpio related unused/repititive definitions from imx headers.
Signed-off-by: Vikram Narayanan <[email protected]>
Acked-by: Stefano Babic <[email protected]>
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Signed-off-by: Eric Nelson <[email protected]>
Acked-by: Marek Vasut <[email protected]>
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Add basic i2c driver for Tegra2 with 8- and 16-bit address support.
The driver requires CONFIG_OF_CONTROL to obtain its configuration
from the device tree.
(Simon Glass: [email protected] modified for upstream)
Signed-off-by: Simon Glass <[email protected]>
Acked-by: Heiko Schocher <[email protected]>
Acked-by: Stephen Warren <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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I2C ports have a 16-bit clock divisor. Add code to handle this special
case so that I2C speeds below 150KHz are supported.
Signed-off-by: Simon Glass <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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Change this name to fit with the current convention in the Tegra
header file.
Signed-off-by: Simon Glass <[email protected]>
Acked-by: Stephen Warren <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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This adds basic support for the Tegra2 USB controller. Board files should
call board_usb_init() to set things up.
Configuration is performed through the FDT, with aliases used to set the
order of the ports, like this fragment:
aliases {
/* This defines the order of our USB ports */
usb0 = "/usb@0xc5008000";
usb1 = "/usb@0xc5000000";
};
drivers/usb/host files ONLY: Acked-by: Remy Bohmer <[email protected]>
Signed-off-by: Simon Glass <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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A common requirement is to find the clock ID for a peripheral. This is the
second cell of the 'clocks' property (the first being the phandle itself).
Signed-off-by: Simon Glass <[email protected]>
Acked-by: Stephen Warren <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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Add exynos4_dmc structure in dmc.h for exynos4 dram controllor(DMC).
Signed-off-by: Chander Kashyap <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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Adds prep subcommand to bootm implementation of ARM. When bootm is called
with the subcommand prep the function stops right after ATAGS creation and
before announce_and_cleanup.
This is used in command "cmd_spl export"
Signed-off-by: Simon Schwarz <[email protected]>
Acked-by: Stefano Babic <[email protected]>
Tested-by: Stefano Babic <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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This adds Linux booting to the SPL
This depends on CONFIG_MACH_TYPE patch by Igor Grinberg
(http://article.gmane.org/gmane.comp.boot-loaders.u-boot/105809)
Related CONFIGs:
CONFIG_SPL_OS_BOOT
Activates/Deactivates the OS booting feature
CONFIG_SPL_OS_BOOT_KEY
defines the IO-pin number u-boot switch - if pressed u-boot is
booted
CONFIG_SYS_NAND_SPL_KERNEL_OFFS
Offset in NAND of direct boot kernel image to use in SPL
CONFIG_SYS_SPL_ARGS_ADDR
Address where the kernel boot arguments are expected - this is
normaly RAM-begin + 0x100
Signed-off-by: Simon Schwarz <[email protected]>
CC: Tom Rini <[email protected]>
CC: Stefano Babic <[email protected]>
CC: Wolfgang Denk <[email protected]>
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Linux crashes if the GPMC isn't configured for the dm9000.
Signed-off-by: Simon Schwarz <[email protected]>
CC: Tom Rini <[email protected]>
CC: Stefano Babic <[email protected]>
CC: Wolfgang Denk <[email protected]>
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Instead of hardcoding the mx6 silicon revision, read it in run-time.
Also, besides the silicon version print the mx6 variant type: quad,dual/solo
or solo-lite.
Tested on a mx6qsabrelite, where it shows:
CPU: Freescale i.MX6Q rev1.0 at 792 MHz
Signed-off-by: Fabio Estevam <[email protected]>
Acked-by: Stefano Babic <[email protected]>
Acked-by: Jason Liu <[email protected]>
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Remove duplicate definition of ANATOP_BASE_ADDR.
Signed-off-by: Fabio Estevam <[email protected]>
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The GPIO_INT_ACT_LOW_SET was incorrectly handling interrupt lines higher than 7.
This is due to the fact that there are two registers for total of 16 lines.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Bryan Hundven <[email protected]>
Cc: Michael Schwingen <[email protected]>
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Adds support for loading U-Boot from UART using YMODEM protocol.
If YMODEM support is enabled in SPL and the romcode indicates
that SPL loaded via UART then SPL will wait for start of a
YMODEM transfer via the console port.
Signed-off-by: Matt Porter <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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This patch fixes erroneous 32-bit access to registers
hw_clkctrl_frac0 and hw_clkctrl_frac1.
Signed-off-by: Robert Delien <[email protected]>
Acked-by: Marek Vasut <[email protected]>
Tested-by: Marek Vasut <[email protected]>
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This patch introduces an 8-bit register, mx28_register_8, in order to
prepare for fixing erroneous 32-bit wide access of registers
hw_clkctrl_frac0 and hw_clkctrl_frac1.
Signed-off-by: Robert Delien <[email protected]>
Acked-by: Marek Vasut <[email protected]>
Tested-by: Marek Vasut <[email protected]>
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This patch renames mx28_register to mx28_register_32 in order to
prepare for the introduction of an 8-bit register, mx28_register_8.
Signed-off-by: Robert Delien <[email protected]>
Acked-by: Marek Vasut <[email protected]>
Tested-by: Marek Vasut <[email protected]>
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Currently, only USB Host 1 is supported.
Cc: Remy Bohmer <[email protected]>
Signed-off-by: Wolfgang Grandegger <[email protected]>
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This patch adds register definitions for the registers of the DIGCTL
IP-block.
Signed-off-by: Robert Delien <[email protected]>
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This patch adds support for USB EHCI driver for Armada100 SOCs.
Signed-off-by: Ajay Bhargav <[email protected]>
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This patch adds USB host controller's UTMI PHY interface driver for
Armada100 SOCs.
Signed-off-by: Ajay Bhargav <[email protected]>
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The video setup for the Epson display is provided. Addtionally
some extra info is displayed next to the Linux logo.
Make get_cpu_rev() publicly available (added to sys_proto.h).
Signed-off-by: Helmut Raiger <[email protected]>
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Define FEC_QUIRK_ENET_MAC and add to
arch-mx6/imx-regs.h
Signed-off-by: Troy Kisky <[email protected]>
Acked-by: Dirk Behme <[email protected]>
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* For cold silicon the DDR timings need to be relaxed in order for
the device to boot with DDR at 266MHz
* Fix proposed by James Doublesin
Signed-off-by: Chase Maupin <[email protected]>
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Signed-off-by: Eric Nelson <[email protected]>
Acked-by: Dirk Behme <[email protected]>
Acked-by: Stefano Babic <[email protected]>
Acked-by: Jason Liu <[email protected]>
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Move (E)CSPI register declarations into the imx-regs.h files for each supported CPU
Introduce two new macros to control conditional setup
MXC_CSPI - Used for processors with the Configurable Serial Peripheral Interface (MX3x)
MXC_ECSPI - For processors with Enhanced Configurable... (MX5x, MX6x)
Signed-off-by: Eric Nelson <[email protected]>
Acked-by: Dirk Behme <[email protected]>
Acked-by: Stefano Babic <[email protected]>
Acked-by: Jason Liu <[email protected]>
Tested-by: Jason Liu <[email protected]>
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The interface to the mxc_gpio driver uses integer (ordinal) values to
refer to all GPIOs on the i.MX processors. The registers themselves
and much of the i.MX documentation are banked in groups of 32, and these
macros allow the use of the port:index numbering for clarity.
GPIO_NUMBER() converts to ordinal value from port:index
GPIO_PORT() returns the port of an ordinal value
GPIO_INDEX() returns the index or offset of the ordinal.
Discussion on the mailing list at
http://lists.denx.de/pipermail/u-boot/2012-January/116927.html
Signed-off-by: Eric Nelson <[email protected]>
Signed-off-by: Eric Nelson <[email protected]>
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Before we can send a command we need both the DATI (command inhibit on
mmc_dat line) bit and CMDI (command inhibit on mmc_cmd line) are clear.
The previous behavior of only checking on DATI was insufficient on some
cards and incorrect behavior in any case. This makes the code check
for both bits being clear and makes the error print more clear as
to what happened. DATI_CMDDIS is removed as it was unused elsewhere
in the code and stood for 'DATI is set, cmds are disabled still'.
Fix originally spotted by Peter Bigot.
Tested-by: Peter A. Bigot <[email protected]>
Tested-by: Robert Nelson <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
Tested-by: Andreas Müller <[email protected]>
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This patch moves hawkboard to the new spl infrastructure from the
older nand_spl one.
Removed the hawkboard_nand_config build option -- The spl code now
gets compiled with hawkboard_config, after building the main u-boot
image, using the CONFIG_SPL_TEXT_BASE. Modified the README.hawkboard
to reflect the same.
Signed-off-by: Sughosh Ganu <[email protected]>
Signed-off-by: Heiko Schocher <[email protected]>
Cc: Heiko Schocher <[email protected]>
Cc: Christian Riesch <[email protected]>
Cc: Sudhakar Rajashekhara <[email protected]>
Cc: Tom Rini <[email protected]>
Acked-by: Christian Riesch <[email protected]>
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ACTIM_CTRLA macro errently passes "b" parameter to ACTIM_CTRLA_TRAS()
instead of "c". To make usage more clear, replace all single-letter
macro parameters with more descriptive parameter names.
Signed-off-by: Peter Barada <[email protected]>
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add support for printing various clock frequency info found
in SOC such as ARM core frequency, DSP core frequency and DDR
frequency as part of bdinfo command.
Signed-off-by: Manjunath Hadli <[email protected]>
Cc: Tom Rini <[email protected]>
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AM3517: Changed default clock rate for AM3517
Changed #define MPU_M_13_ES2 from 0x1F4 to 0x258, this allows
the AM3517 to boot up at 600MHz instead of 500 MHz
Signed-off-by: Schuyler Patton <[email protected]>
CC: Tom Rini <[email protected]>
CC: Simon Schwarz <[email protected]>
CC: Stefano Babic <[email protected]>
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Adding ehci clock enabling mechanism part of clock framework.
When essential clocks are enabled during init phase usb host
clocks can also be enabled from clock framework.
Acked-by: Igor Grinberg <[email protected]>
Signed-off-by: Govindraj.R <[email protected]>
Tested-by: Stefano Babic <[email protected]>
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Clean up added ehci-omap.c and make it generic for re-use across
omap-soc having same ehci ip block. Also pass the modes to be configured
from board file and configure the ports accordingly. All usb layers
are not cache aligned, till then keep cache off for usb ops as ehci will use
internally dma for all usb ops.
* Add a generic common header ehci-omap.h having common ip block
data and reg shifts.
* Rename and modify ehci-omap3 to ehci.h retain only conflicting
sysc reg shifts remove others and move to common header file.
* pass the board data for beagle/panda accordinly to use
ehci ports.
Acked-by: Igor Grinberg <[email protected]>
Signed-off-by: Govindraj.R <[email protected]>
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Samsung's ARM Cortex-A15 based SoCs are known as Exynos5 series of
SoCs. This patch adds the support for Exynos5.
Signed-off-by: Chander Kashyap <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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This patch adds support the generic watchdog timer for s5pc1xx and exynos4
Signed-off-by: Minkyu Kang <[email protected]>
Signed-off-by: Kyungmin Park <[email protected]>
Cc: HeungJun, Kim <[email protected]>
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This patch adds power.h and SAMSUNG_BASE() macro for using Exynos4 power.
Signed-off-by: HeungJun, Kim <[email protected]>
Signed-off-by: Kyungmin Park <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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This patch add watchdog.h for Exynos4
Signed-off-by: HeungJun, Kim <[email protected]>
Signed-off-by: Kyungmin Park <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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Add TCMPB3 field in pwm structure, earliar this was res1.
Signed-off-by: Chander Kashyap <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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Signed-off-by: Albert ARIBAUD <[email protected]>
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Signed-off-by: Albert ARIBAUD <[email protected]>
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Signed-off-by: Albert ARIBAUD <[email protected]>
Signed-off-by: Prafulla Wadaskar <[email protected]>
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This patch modifies mxcmmc.c to be used
not only by i.MX27 but also by i.MX31 boards.
Both use the same SD controller, but have different
clock set-ups.
The i.MX27 imx_get_XXXclock functions are made static to
generic.c and a public mxc_get_clock() function
is provided. Pins, base address and prototypes for
an i.MX31 specific board_init_mmc() are provided.
Some of the i.MX27 clock getters are unused and marked
as such to avoid warnings (./MAKEALL -s mx27), but
the code was left in for future use.
Signed-off-by: Helmut Raiger <[email protected]>
Acked-by: Stefano Babic <[email protected]>
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The uart txd pad can also provide the rxd function. But it does not stop its
tx role. This could be used for a half duplex serial port.
Change names to reduce confusion.
Signed-off-by: Troy Kisky <[email protected]>
CC: Troy Kisky <[email protected]>
CC: Jason Liu <[email protected]>
CC: Stefano Babic <[email protected]>
Acked-by: Jason Liu <[email protected]>
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Signed-off-by: Heiko Schocher <[email protected]>
Cc: Sandeep Paulraj <[email protected]>
Cc: Tom Rini <[email protected]>
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The Buffer Logic of VPSS is Not Reset by System Reset Pin, see
http://www.ti.com/lit/er/sprz316b/sprz316b.pdf chapter Advisory 1.2.1
on page 9. Add workaroundcode proposed in the errata.
Signed-off-by: Heiko Schocher <[email protected]>
Cc: Sandeep Paulraj <[email protected]>
Cc: Tom Rini <[email protected]>
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The OMAP-L138 has a pre-divider available on PLL0.
Add support to da850_lowlevel.c for configuring PLL0's pre-divider. This is
to achieve certain OPP's -- e.g. the 372MHz OPP used also by Linux.
Signed-off-by: Ben Gardiner <[email protected]>
Cc: Christian Riesch <[email protected]>
CC: Heiko Schocher <[email protected]>
Cc: Sandeep Paulraj <[email protected]>
Cc: Tom Rini <[email protected]>
Cc: Albert ARIBAUD <[email protected]>
Acked-by: Heiko Schocher <[email protected]>
Acked-by: Christian Riesch <[email protected]>
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This adds support for SDMMC ports to the funcmux. Only one
option is supported: FUNCMUXO_SDMMC_8BIT which selects an 8-bit
wide SDIO interface where available.
Signed-off-by: Simon Glass <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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