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Add minimal support for Altera's SOCFPGA Cyclone 5 hardware.
Signed-off-by: Dinh Nguyen <[email protected]>
Signed-off-by: Chin Liang See <[email protected]>
Signed-off-by: Pavel Machek <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
Acked-by: Tom Trini <[email protected]>
Cc: Wolfgang Denx <[email protected]>
Cc: Albert Aribaud <[email protected]>
Cc: Stefan Roese <[email protected]>
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v8: Remove no_return attribute for reset_cpu
Based on v2012.10-rc2
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include/common.h has the reset_cpu defined already. No need to
re-define here.
Signed-off-by: Dinh Nguyen <[email protected]>
Signed-off-by: Pavel Machek <[email protected]>
Acked-By: Prafulla Wadaskar <[email protected]>
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Size of the SDRAM chips might differ between any two (otherwise
identical) instances of the same board.
So add a function kw_sdram_size_adjust() which reads out the current
ram size for a given bank, and adjusts the Kirkwood's SDRAM window size
register accordingly.
Signed-off-by: Gerlando Falauto <[email protected]>
Signed-off-by: Holger Brunck <[email protected]>
cc: Prafulla Wadaskar <[email protected]>
cc: Valentin Longchamp <[email protected]>
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Signed-off-by: Luka Perkov <[email protected]>
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It's now possible to use the gpio driver interface
for s3c2440. This patch add iomux definitions too.
Signed-off-by: Gabriel Huau <[email protected]>
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The Armadillo-800EVA board has Renesas R-Mobile R8A7740, 512MB DDR3-SDRAM,
Ethernet, and more.
This patch supports the following functions:
- 512MB DDR3-SDRAM
- Serial console (SCIF)
- Ethernet MAC(MII) & PHY(SMSC)
Signed-off-by: Hideyuki Sano <[email protected]>
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
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Renesas R8A7740 has GPIO based PFC. This privode framework of PFC.
The code included in this base from linux kernel.
Signed-off-by: Hideyuki Sano <[email protected]>
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
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Renesas R8A7740 is CPU with Cortex-A9.
This supports the basic register definition and GPIO.
Signed-off-by: Hideyuki Sano <[email protected]>
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
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Add dummy member to struct sh73a0_rwdt in sh73a0.h.
Without this, initializing watch dog timer goes wrong.
Signed-off-by: Tetsuyuki Kobayashi <[email protected]>
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
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Do soft power on reset in U-Boot reset command.
Signed-off-by: Tetsuyuki Kobayashi <[email protected]>
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
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Adjust low level hardware setting in s_init.
Signed-off-by: Tetsuyuki Kobayashi <[email protected]>
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
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The KZM-A9-GT board has Renesas R-Mobile SH73A0, 512MB DDR2-SDRAM,
USB, Ethernet, and more.
This patch supports the following functions:
- 512MB DDR2-SDRAM
- 16MB NOR Flash memory
- Serial console (SCIF)
- Ethernet (SMSC)
- I2C
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
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Renesas SH73A0 has GPIO based PFC. This privode framework of PFC.
The code included in this base from linux kernel.
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
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Renesas SH73A0 is CPU with Cortex-A9.
This supports the basic register definition and GPIO.
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
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This patch adds minimum support for R-Mobile. Only minimal support with timer.
This CPU can uses the peripheral of Renesas SuperH.
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
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ARMv7 has global timer. This provides the register definition of this timer.
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
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U-boot should not ignore getting the bootmode passed on from the bootrom.
With this, U-boot SPL knows it was loaded from MMC1 and use this info to
read full U-boot from MMC1 as well.
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Joel A Fernandes <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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This patch adds support for networking in SPL. Some devices are
capable of loading SPL via network so it makes sense to load the
main U-Boot binary via network too. This patch tries to use
existing network code as much as possible. Unfortunately, it depends
on environment which in turn depends on other code so SPL size
is increased significantly. No effort was done to decouple network
code and environment so far.
Signed-off-by: Ilya Yanok <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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- Convert the non-relocation part of board_init_f to spl_board_init, turn on CONFIG_SPL_BOARD_INIT in the configs.
- Remove duplicated code.
- Add spl_boot_device() that returns the statically chosen boot device.
Signed-off-by: Tom Rini <[email protected]>
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In SPL (CONFIG_SPL_FRAMEWORK) board_init_f must setup the stack pointer,
clear the BSS and call board_init_r. We mark this as weak as some
platforms may need to perform additional initalization at this point.
We provide a gd that we know will be in a usable location, once the BSS
has been cleared to help with this as well. Finally, we no longer call
relocate_code so remove that from the armv7 version.
Next, both board_init_f and jump_to_image_linux are going to be
inherently arch-specific, so move these versions to arch/arm/lib/spl.c
Signed-off-by: Tom Rini <[email protected]>
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Add a new flag, CONFIG_SPL_FRAMEWORK to opt into the common/spl SPL
framework, enable on all of the previously using boards. We move the
spl_ymodem.c portion to common/ and spl_mmc.c to drivers/mmc/. We leave
the NAND one in-place as we plan to replace it later in this series.
We use common/spl to avoid linker problems with respect to merging
constant strings in objects. Otherwise all strings in common/ will be
linked in and kept which grows SPL in size too much.
Signed-off-by: Tom Rini <[email protected]>
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Signed-off-by: Tom Rini <[email protected]>
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Move the default omap/related-centric board_mmc_init to
arch/arm/cpu/armv7/omap-common/boot-common.c and move the type defines
to <asm/spl.h>. Also use mmc->read_bl_len rather than MMCSD_SECTOR_SIZE
Signed-off-by: Tom Rini <[email protected]>
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Move the SPL prototypes from <asm/omap_common.h> into <asm/spl.h> and
add <asm/arch/spl.h> for arch specific portions of CONFIG_SPL_FRAMEWORK.
Signed-off-by: Tom Rini <[email protected]>
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This detection code doesn't (and can't) do anything currently, so
remove.
Signed-off-by: Tom Rini <[email protected]>
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Signed-off-by: Tom Rini <[email protected]>
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Signed-off-by: Tom Rini <[email protected]>
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Only omap4/5 currently have a meaningful set of display text and overo
had been adding a function to display nothing. Change how this works to
be opt-in and only turned on for omap4/5 now.
Signed-off-by: Tom Rini <[email protected]>
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FSL 2.6.35 kernel assumes that the bootloader passes the CONFIG_REVISION_TAG
information.
If this data is not present, the kernel misconfigures the TZIC, which results in
the timer interrupt handler never being called, so the kernel deadlocks while
calibrating its delay.
Suggested-by: Greg Topmiller <[email protected]>
Signed-off-by: Benoît Thébaudeau <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Fabio Estevam <[email protected]>
Acked-by: Fabio Estevam <[email protected]>
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This board is the only board that still sticks to OneNAND IPL.
Remove this board, since we have SPL around for a while and
OneNAND is well supported in the SPL framework. The board can
be revived if necessary.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Albert Aribaud <[email protected]>
Cc: Kyungmin Park <[email protected]>
Cc: Tom Rini <[email protected]>
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Constants set with binary value (0b...) are not compiled
from old toolchain when used by the clrsetbits_le32 macro.
Replaces them with the corresponding hex value.
The error reported (for example with the mx6qsabrelite board)
is something like:
mx6qsabrelite.c:369:1: error: invalid suffix "b101" on integer constant
mx6qsabrelite.c:369:1: error: invalid suffix "b10010" on integer constant
mx6qsabrelite.c:369:1: error: invalid suffix "b0000" on integer constant
mx6qsabrelite.c:369:1: error: invalid suffix "b10001" on integer constant
Signed-off-by: Stefano Babic <[email protected]>
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Convert TEGRA20_ defines to either TEGRA_ or NV_PA_ where appropriate.
Convert tegra20_ source file and function names to tegra_, also.
Upcoming Tegra30 port will use common code/defines/names where possible.
Signed-off-by: Tom Warren <[email protected]>
Acked-by: Stephen Warren <[email protected]>
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A device tree is used to configure the NAND, including memory
timings and block/pages sizes.
If this node is not present or is disabled, then NAND will not
be initialized.
Signed-off-by: Jim Lin <[email protected]>
Signed-off-by: Simon Glass <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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Add selection of NAND flash pins to the funcmux.
Signed-off-by: Simon Glass <[email protected]>
Acked-by: Stephen Warren <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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Define default SoC input clock frequencies for i.MX31 in order to get rid of
duplicated definitions.
Signed-off-by: Benoît Thébaudeau <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Helmut Raiger <[email protected]>
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Define default SoC input clock frequencies for i.MX35 in order to get rid of
duplicated definitions.
Signed-off-by: Benoît Thébaudeau <[email protected]>
Cc: Stefano Babic <[email protected]>
Acked-by: Stefano Babic <[email protected]>
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Define default SoC input clock frequencies for i.MX25 in order to get rid of
duplicated definitions.
Signed-off-by: Benoît Thébaudeau <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Matthias Weisser <[email protected]>
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The clock dividers that were used do not match at all the reference manual. They
were either completely broken, or came from an early silicon revision
incompatible with the current one.
Signed-off-by: Benoît Thébaudeau <[email protected]>
Cc: Stefano Babic <[email protected]>
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Signed-off-by: Benoît Thébaudeau <[email protected]>
Cc: Stefano Babic <[email protected]>
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Signed-off-by: Koen Kooi <[email protected]>
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Useless code is removed, and get buswidth value.
buswidth value will be used to choice the 4bit or 8bit.
(Now used 4bit mode in sdhci.c by default)
Signed-off-by: Jaehoon Chung <[email protected]>
Signed-off-by: Kyungmin Park <[email protected]>
Signed-off-by: Andy Fleming <[email protected]>
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Add a common macros to set the registers for horizontal
and vertical timing.
Signed-off-by: Stefano Babic <[email protected]>
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Signed-off-by: Stefano Babic <[email protected]>
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AM/DM37x SoCs add the CTRL_WKUP_CTRL register. It contains the
GPIO_IO_PWRDNZ bit, which is required to be set to enable the I/O pads
of gpio_126, gpio_127 and gpio_129.
Signed-off-by: Arnout Vandecappelle (Essensium/Mind) <[email protected]>
Cc: Tom Rini <[email protected]>
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