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This header includes things that are needed to make driver build. Adjust
existing users to include that always, even if other dm/ includes are
present
Signed-off-by: Simon Glass <[email protected]>
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The generic ARMv8 assembly code contains routines for setting up
a CCN interconnect, though the Freescale SoCs are the only user.
Link this code only for Freescale targets, this saves some precious
bytes in the chronically tight SPL.
Signed-off-by: Andre Przywara <[email protected]>
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Not every SoC needs to set up the GIC interrupt controller, so link
think code only when the respective config option is set.
This shaves off some bytes from the SPL code size.
Signed-off-by: Andre Przywara <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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Adding support for fdt fixup to update the
memory node in device tree for falcon boot.
This is needed for single stage or falcon
bootmode, to pass memory configuration to
kernel through DT memory node.
Signed-off-by: Ravi Babu <[email protected]>
Reviewed-by: Lukasz Majewski <[email protected]>
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At present fdt blob or argument address being passed to kernel is fixed at
compile time using macro CONFIG_SYS_SPL_ARGS_ADDR. FDT blob from
different media like nand, nor flash are copied to the address pointed
by the macro.
The problem is, it makes args/fdt blob compulsory to copy which is not required
in cases like for NOR Flash. This patch removes this limitation.
Signed-off-by: Vikas Manocha <[email protected]>
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On ARM v7M, the processor will return to ARM mode when executing
a blx instruction with bit 0 of the address == 0. Always set it
to 1 to stay in thumb mode.
Tested on STM32f746-disco board
Similar commit:
f99993c10882f7dc8ec35993d5febe59aac01e6a
Author: Matt Porter <[email protected]>
Signed-off-by: Patrice Chotard <[email protected]>
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Adjust ARM SMC Calling Convention code for U-Boot:
- Replace the license block with SPDX
- Change path to asm-offsets.h
- Define UNWIND() as no-op
- Add Kconfig entry
- Add asm-offsets
Signed-off-by: Masahiro Yamada <[email protected]>
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This patch adds armv7m instruction & data cache support.
Signed-off-by: Vikas Manocha <[email protected]>
cc: Christophe KERELLO <[email protected]>
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With d53ecad92f06 some unused interrupt related code was removed.
However all of these options are currently unused. Rather than migrate
some of these options to Kconfig we just remove the code in question.
The only related code changes here are that in some cases we use
CONFIG_STACKSIZE in non-IRQ related context. In these cases we rename
and move the value local to the code in question.
Fixes: d53ecad92f06 ("Merge branch 'master' of git://git.denx.de/u-boot-sunxi")
Signed-off-by: Tom Rini <[email protected]>
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This patch adds a call to dm_remove_devices_flags() to
announce_and_cleanup() so that drivers that have one of the removal flags
set (e.g. DM_FLAG_ACTIVE_DMA_REMOVE) in their driver struct, may do some
last-stage cleanup before the OS is started.
Signed-off-by: Stefan Roese <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Today, we have cases where we wish to build all of U-Boot in Thumb2 mode for
various reasons. We also have cases where we only build SPL in Thumb2 mode due
to size constraints and wish to build the rest of the system in ARM mode. So
in this migration we introduce a new symbol as well, SPL_SYS_THUMB_BUILD to
control if we build everything or just SPL (or in theory, just U-Boot) in
Thumb2 mode.
Signed-off-by: Tom Rini <[email protected]>
Acked-by: Siarhei Siamashka <[email protected]>
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This patch cleans the code by using instructions allowed for armv7m as well as
other Arm archs.
Signed-off-by: Vikas Manocha <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
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do_smhload was using a ulong to store the return value from
smh_load_file. That returns an int, where -1 indicates an error. As a
ulong will never be negative, smh_load_file errors were not detected and
so_smhload always returned zero.
Also, when errors were spotted, do_smhload was returning 1, rather than
the enumeration CMD_RET_FAILURE (which is also 1).
Signed-off-by: Ryan Harkin <[email protected]>
Reviewed-by: Linus Walleij <[email protected]>
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As part of the startup process for boards using the SPL, we need to
call spl_relocate_stack_gd. This is needed to set up malloc with its
DRAM buffer.
Signed-off-by: Philipp Tomsich <[email protected]>
Reviewed-by: Andre Przywara <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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There are two typos in the comment "invalide i-cache is enabled".
We can fix it by
invalide -> invalidate
is -> if
Or, if we want to match the comment to the code, we can say
"skip invalidating i-cache if disabled".
Signed-off-by: Masahiro Yamada <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Save one instruction.
Signed-off-by: Masahiro Yamada <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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AArch64 has a zero register (xzr). Use it instead of x2.
Signed-off-by: Masahiro Yamada <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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We have long had available optimized versions of the memset and memcpy
functions that are borrowed from the Linux kernel. We should use these
in normal conditions as the speed wins in many workflows outweigh the
relatively minor size increase. However, we have a number of places
where we're simply too close to size limits in SPL and must be able to
make the size vs performance trade-off in those cases.
Cc: Philippe Reynes <[email protected]>
Cc: Eric Jarrige <[email protected]>
Cc: Heiko Schocher <[email protected]>
Cc: Magnus Lilja <[email protected]>
Cc: Lokesh Vutla <[email protected]>
Cc: Chander Kashyap <[email protected]>
Cc: Akshay Saraswat <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: Stefan Roese <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
Acked-by: Stefan Roese <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Moved the config FSL_PPA_ARMV8_PSCI from fsl-layerscape's Kconfig to
Kconfig under armv8 and renamed it to SEC_FIRMWARE_ARMV8_PSCI.
Signed-off-by: Hou Zhiqiang <[email protected]>
Reviewed-by: York Sun <[email protected]>
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For 64-bit kernel, there is a warning about x1-x3 nonzero in violation
of boot protocol. To fix this issue, input argument 4 is added for
armv8_switch_to_el2 and armv8_switch_to_el1. The input argument 4 will
be set to the right value, such as zero.
Signed-off-by: Alison Wang <[email protected]>
Reviewed-by: Alexander Graf <[email protected]>
Tested-by: Ryan Harkin <[email protected]>
Tested-by: Michal Simek <[email protected]>
Reviewed-by: York Sun <[email protected]>
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For prepending some board specific header area to U-Boot images we
were so far including a header file with a macro definition containing
the actual header specification.
This works fine if there are just a few statements and if there is only
one alternative.
However adding more complex code quickly gets messy with this approach,
so let's just drop that intermediate macro and let the #include actually
insert the code directly.
This converts the callers and the callees, but doesn't change anything
at this point.
Signed-off-by: Andre Przywara <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Tested-by: Steve Rae <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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The predominantely 32-bit ARM targets try to compile the SPL in Thumb
mode to reduce code size.
The 64-bit AArch64 instruction set does not know an alternative, concise
encoding, so the Thumb build option should only be set for 32-bit
targets.
Likewise -marm machine options are only valid for ARMv7 targets.
Signed-off-by: Andre Przywara <[email protected]>
Reviewed-by: Alexander Graf <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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Newly add ARMv8 PSCI needs to be initialized, be copied or reserved in right
place, this patch does all the setup steps.
Signed-off-by: Hongbo Zhang <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Reviewed-by: York Sun <[email protected]>
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NXP/Freescale uses macro CONFIG_ARMV8_PSCI to enable their private PSCI
implementation in PPA firmware, but this macro naming too generic, so this
patch replaces it with a specic one CONFIG_FSL_PPA_ARMV8_PSCI.
And this macro CONFIG_ARMV8_PSCI will be used for a generic PSCI for ARMv8
which will be added in following patchs.
Signed-off-by: Hongbo Zhang <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Commit e2f88dfd2d96 ("libfdt: Introduce new ARCH_FIXUP_FDT option")
allows us to skip memory setup of DTB, but a problem for ARM is that
spin_table_update_dt() and psci_update_dt() are skipped as well if
CONFIG_ARCH_FIXUP_FDT is disabled.
This commit allows us to skip only fdt_fixup_memory_banks() instead
of the whole of arch_fixup_fdt(). It will be useful when we want to
use a memory node from a kernel DTB as is, but need some fixups for
Spin-Table/PSCI.
Signed-off-by: Masahiro Yamada <[email protected]>
Acked-by: Alexey Brodkin <[email protected]>
Acked-by: Simon Glass <[email protected]>
Fixed build error for x86:
Signed-off-by: Simon Glass <[email protected]>
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Today we can compile a self-contained hello world efi test binary that
allows us to quickly verify whether the EFI loader framwork works.
We can use that binary outside of the self-contained test case though,
by providing it to a to-be-tested system via tftp.
This patch separates compilation of the helloworld.efi file from
including it in the u-boot binary for "bootefi hello". It also modifies
the efi_loader test case to enable travis to pick up the compiled file.
Because we're now no longer bloating the resulting u-boot binary, we
can enable compilation always, giving us good travis test coverage.
Signed-off-by: Alexander Graf <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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Spin-table method is used for secondary cores to load 32-bit OS. The
architecture information will be got through checking FIT image and
saved in the os_arch element of spin-table, then the secondary cores
will check os_arch and jump to 32-bit OS or 64-bit OS automatically.
Signed-off-by: Alison Wang <[email protected]>
Signed-off-by: Chenhui Zhao <[email protected]>
Reviewed-by: York Sun <[email protected]>
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To support loading a 32-bit OS, the execution state will change from
AArch64 to AArch32 when jumping to kernel.
The architecture information will be got through checking FIT image,
then U-Boot will load 32-bit OS or 64-bit OS automatically.
Signed-off-by: Ebony Zhu <[email protected]>
Signed-off-by: Alison Wang <[email protected]>
Signed-off-by: Chenhui Zhao <[email protected]>
Reviewed-by: York Sun <[email protected]>
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On ls2080 we have a separate network fabric component which we need to
shut down before we enter Linux (or any other OS). Along with that also
comes configuration of the fabric using a description file.
Today we always stop and configure the fabric in the boot script and
(again) exit it on device tree generation. This works ok for the normal
booti case, but with bootefi the payload we're running may still want to
access the network.
So let's add a new fsl_mc command that defers configuration and stopping
the hardware to when we actually exit U-Boot, so that we can still use
the fabric from an EFI payload.
For existing boot scripts, nothing should change with this patch.
Signed-off-by: Alexander Graf <[email protected]>
Reviewed-by: York Sun <[email protected]>
[agraf: Fix x86 build]
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Add support for EFI apps on aarch64. This includes start-up and relocation
code plus a link script.
Signed-off-by: Simon Glass <[email protected]>
[agraf: add kconfig dep]
Signed-off-by: Alexander Graf <[email protected]>
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Add support for EFI apps on ARM. This includes start-up and relocation
code, plus a link script and some compiler setting changes.
Signed-off-by: Simon Glass <[email protected]>
[agraf: Remove whitespace change, add kconfig dep]
Signed-off-by: Alexander Graf <[email protected]>
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Rather than hard-coding the relocation type, add it to the ELF header file
and use it from there.
Signed-off-by: Simon Glass <[email protected]>
Signed-off-by: Alexander Graf <[email protected]>
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While we setup the mmu initially we mark set_section_dcache with
DCACHE_OFF flag. In case of non-LPAE mode the DCACHE_OFF macro
is rightly defined with TTB_SECT_XN_MASK set so as to mark all the
4GB XN. In case of LPAE mode XN(Execute-never) bit is not set with
DCACHE_OFF. Hence XN bit is not set by default for DCACHE_OFF which
keeps all the regions execute okay and this leads to random speculative
fetches in random memory regions which was eventually caught by kernel
omap-l3-noc driver.
Fix this to mark the regions as XN by default.
Signed-off-by: Keerthy <[email protected]>
Reviewed-by: Alexander Graf <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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Printing the option value in hex makes it more comprehensible.
Signed-off-by: Keerthy <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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Instead of using the global spl_image variable, pass the required struct in
as an argument.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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The page table is maintained by the CPU, hence it is safe to always
align cache flush to a whole cache line size. This allows to use
mmu_page_table_flush for a single page table, e.g. when configure
only small regions through mmu_set_region_dcache_behaviour.
Signed-off-by: Stefan Agner <[email protected]>
Tested-by: Fabio Estevam <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
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Add LPAE support for mmu_set_region_dcache_behaviour. The function
is in use in some LPAE capable board such TI DRA7xx or NXP i.MX 7.
Signed-off-by: Stefan Agner <[email protected]>
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This series moves the CONFIG_SYS_CACHELINE_SIZE. First, in nearly all
cases we are mirroring the values used by the Linux Kernel here. Also,
so long as (and in this case, it is true) we implement flushes in hunks
that are no larger than the smallest implementation (and given that we
mirror the Linux Kernel, again we are fine) it is OK to align higher.
The biggest changes here are that we always use 64 bytes for CPU_V7 even
if for example the underlying core is only 32 bytes (this mirrors
Linux). Second, we say ARM64 uses 64 bytes not 128 (as found in the
Linux Kernel) as we do not need multi-platform support (to this degree)
and only the Cavium ThunderX 88xx series has a use for such large
alignment.
Cc: Albert Aribaud <[email protected]>
Cc: Marek Vasut <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Prafulla Wadaskar <[email protected]>
Cc: Luka Perkov <[email protected]>
Cc: Stefan Roese <[email protected]>
Cc: Nagendra T S <[email protected]>
Cc: Vaibhav Hiremath <[email protected]>
Acked-by: Lokesh Vutla <[email protected]>
Cc: Steve Rae <[email protected]>
Cc: Igor Grinberg <[email protected]>
Cc: Nikita Kiryanov <[email protected]>
Cc: Stefan Agner <[email protected]>
Acked-by: Heiko Schocher <[email protected]>
Cc: Mateusz Kulikowski <[email protected]>
Cc: Peter Griffin <[email protected]>
Acked-by: Paul Kocialkowski <[email protected]>
Cc: Anatolij Gustschin <[email protected]>
Acked-by: "Pali Rohár" <[email protected]>
Cc: Adam Ford <[email protected]>
Cc: Steve Sakoman <[email protected]>
Cc: Grazvydas Ignotas <[email protected]>
Cc: Nishanth Menon <[email protected]>
Cc: Stephen Warren <[email protected]>
Cc: Robert Baldyga <[email protected]>
Cc: Minkyu Kang <[email protected]>
Cc: Thomas Weber <[email protected]>
Cc: Masahiro Yamada <[email protected]>
Cc: David Feng <[email protected]>
Cc: Alison Wang <[email protected]>
Cc: Michal Simek <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: York Sun <[email protected]>
Cc: Shengzhou Liu <[email protected]>
Cc: Mingkai Hu <[email protected]>
Cc: Prabhakar Kushwaha <[email protected]>
Cc: Aneesh Bansal <[email protected]>
Cc: Saksham Jain <[email protected]>
Cc: Qianyu Gong <[email protected]>
Cc: Wang Dongsheng <[email protected]>
Cc: Alex Porosanu <[email protected]>
Cc: Hongbo Zhang <[email protected]>
Cc: tang yuantian <[email protected]>
Cc: Rajesh Bhagat <[email protected]>
Cc: Josh Wu <[email protected]>
Cc: Bo Shen <[email protected]>
Cc: Viresh Kumar <[email protected]>
Cc: Hannes Schmelzer <[email protected]>
Cc: Thomas Chou <[email protected]>
Cc: Joe Hershberger <[email protected]>
Cc: Sam Protsenko <[email protected]>
Cc: Bin Meng <[email protected]>
Cc: Christophe Ricard <[email protected]>
Cc: Anand Moon <[email protected]>
Cc: Beniamino Galvani <[email protected]>
Cc: Carlo Caione <[email protected]>
Cc: huang lin <[email protected]>
Cc: Sjoerd Simons <[email protected]>
Cc: Xu Ziyuan <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "Ariel D'Alessandro" <[email protected]>
Cc: Kever Yang <[email protected]>
Cc: Samuel Egli <[email protected]>
Cc: Chin Liang See <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Hans de Goede <[email protected]>
Cc: Ian Campbell <[email protected]>
Cc: Siarhei Siamashka <[email protected]>
Cc: Boris Brezillon <[email protected]>
Cc: Andre Przywara <[email protected]>
Cc: Bernhard Nortmann <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Ben Whitten <[email protected]>
Cc: Tom Warren <[email protected]>
Cc: Alexander Graf <[email protected]>
Cc: Sekhar Nori <[email protected]>
Cc: Vitaly Andrianov <[email protected]>
Cc: "Andrew F. Davis" <[email protected]>
Cc: Murali Karicheri <[email protected]>
Cc: Carlos Hernandez <[email protected]>
Cc: Ladislav Michl <[email protected]>
Cc: Ash Charles <[email protected]>
Cc: Mugunthan V N <[email protected]>
Cc: Daniel Allred <[email protected]>
Cc: Gong Qianyu <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
Acked-by: Masahiro Yamada <[email protected]>
Acked-by: Chin Liang See <[email protected]>
Tested-by: Stephen Warren <[email protected]>
Acked-by: Paul Kocialkowski <[email protected]>
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The bootz and booti commands rely on common functionality that is found
in common/bootm.c and common/bootm_os.c. They do not however rely on
the rest of cmd/bootm.c to be implemented so split them into their own
files. Have various Makefiles include the required infrastructure for
CONFIG_CMD_BOOT[IZ] as well as CONFIG_CMD_BOOTM. Move the declaration
of 'images' over to common/bootm.c.
Cc: Masahiro Yamada <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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The firmware on TC2 needs to be configured appropriately before booting
in nonsec mode will work as expected, so test for this and fall back to
sec mode if required.
Signed-off-by: Jon Medhurst <[email protected]>
Reviewed-by: Ryan Harkin <[email protected]>
Tested-by: Ryan Harkin <[email protected]>
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As part of testing booting Linux kernels on Rockchip devices, it was
discovered by Ziyuan Xu and Sandy Patterson that we had multiple and for
some cases incomplete isb definitions. This was causing a failure to
boot of the Linux kernel.
In order to solve this problem as well as cover any corner cases that we
may also have had a number of changes are made in order to consolidate
things. First, <asm/barriers.h> now becomes the source of isb/dsb/dmb
definitions. This however introduces another complexity. Due to
needing to build SPL for 32bit tegra with -march=armv4 we need to borrow
the __LINUX_ARM_ARCH__ logic from the Linux Kernel in a more complete
form. Move this from arch/arm/lib/Makefile to arch/arm/Makefile and add
a comment about it. Now that we can always know what the target CPU is
capable off we can get always do the correct thing for the barrier. The
final part of this is that need to be consistent everywhere and call
isb()/dsb()/dmb() and NOT call ISB/DSB/DMB in some cases and the
function names in others.
Reviewed-by: Stephen Warren <[email protected]>
Tested-by: Stephen Warren <[email protected]>
Acked-by: Ziyuan Xu <[email protected]>
Acked-by: Sandy Patterson <[email protected]>
Reported-by: Ziyuan Xu <[email protected]>
Reported-by: Sandy Patterson <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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Signed-off-by: Hou Zhiqiang <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Appended the compatible strings of old version PSCI to the latest
version supported. And there are some psci functions' property must
be added to DT only for psci version 0.1, including cpu_on, cpu_off,
cpu_suspend, migrate.
Note, ARMv8 Secure Firmware Framework doesn't support PSCI ver 0.1.
Signed-off-by: Hou Zhiqiang <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Identify the PSCI node only by its name, so removed the code finding
it by compatible string.
Signed-off-by: Hou Zhiqiang <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Add new Kconfig option to disable arch_fixup_fdt() calls for cases where
U-Boot shouldn't update memory setup in DTB file.
One example of usage of this option is to boot OS with different memory
setup than U-Boot use.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Simon Glass <[email protected]>
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As part of the startup process for boards using the SPL, the
meaning of board_init_f changed such that it should return normally
rather than calling board_init_r directly. (see
db910353a126d84fe8dff7a694ea792f50fcfb6a )
This was fixed in 32-bit arm, but broke when SPL was added to
64 bit arm. This fixes crt0_64 so that it calls board_init_r
during the SPL and removes the direct call from board_init_f
from the arm SPL example.
Signed-off-by: Jeremy Hunt <[email protected]>
Acked-by: Simon Glass <[email protected]>
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Other payload than uImage is currently considered to be raw U-Boot
image. Check also for zImage in Falcon mode.
Signed-off-by: Ladislav Michl <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
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Make code 64bit aware.
Warnings:
+../arch/arm/lib/spl.c: In function ‘jump_to_image_linux’:
+../arch/arm/lib/spl.c:63:3: warning: cast to pointer from integer of
different size [-Wint-to-pointer-cast]
+../common/spl/spl_fat.c: In function ‘spl_load_image_fat’:
+../common/spl/spl_fat.c:91:33: warning: cast to pointer from integer
of different size [-Wint-to-pointer-cast]
Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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