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Merge cpu and lib cache code.
Flush cache before disabling.
Signed-off-by: Michal Simek <[email protected]>
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There is used max cache size on system which doesn't define
cache size.
Signed-off-by: Michal Simek <[email protected]>
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WB cache use different instruction that WT cache but the major code
is that same. That means that wdc.flush on system with WT cache
do the same thing as before.
You need newer toolchain with wdc.flush support.
Signed-off-by: Michal Simek <[email protected]>
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env_relocation should be called first.
Added stdio_init too.
Signed-off-by: Michal Simek <[email protected]>
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It is more accurate to show that caches are OFF instead of FAIL.
Signed-off-by: Michal Simek <[email protected]>
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It is better to read ivr and react on it than do long parsing from
two regs. Interrupt controller returs actual irq number.
Signed-off-by: Michal Simek <[email protected]>
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Move FSL out of interrupt controller.
Signed-off-by: Michal Simek <[email protected]>
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I would like to handle case where system doesn't contain
intc that's why I need timer initialization out of intc code.
Signed-off-by: Michal Simek <[email protected]>
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It is ancient code. There is possible to save several instructions
just if we use offset instead of addik
Signed-off-by: Michal Simek <[email protected]>
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This patch adds FDT (flattened device tree) support to microblaze arch.
Tested with Linux arch/microblaze kernels with and without compiled in
FDT on Xilinx ML506 board.
Signed-off-by: Arun Bhanu <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
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Signed-off-by: Peter Tyser <[email protected]>
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This helps to clean up the include/ directory so that it only contains
non-architecture-specific headers and also matches Linux's directory
layout which many U-Boot developers are already familiar with.
Signed-off-by: Peter Tyser <[email protected]>
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Also move lib_$ARCH/config.mk to arch/$ARCH/config.mk
This change is intended to clean up the top-level directory structure
and more closely mimic Linux's directory organization.
Signed-off-by: Peter Tyser <[email protected]>
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