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2022-09-23powerpc/mpc85xx: Fix re-align of unmapped DDR memory message for non-SPL buildsPali Rohár
During init_dram() is called also setup_ddr_tlbs_phys() function which may print message about unmapped DDR memory. So in this case print also re-aligning filler after unmapped DDR memory message. Signed-off-by: Pali Rohár <[email protected]>
2022-09-23powerpc/mpc85xx: Explain TLB unmapped memory messagePali Rohár
Currently U-Boot SPL prints just generic message "2 GiB left unmapped". Change it to more detailed "2 GiB of DDR memory left unmapped in U-Boot". This is just U-Boot configuration and operating system may map more (or also less) memory. Signed-off-by: Pali Rohár <[email protected]>
2022-09-19Merge branch 'master' into nextTom Rini
Signed-off-by: Tom Rini <[email protected]>
2022-09-19powerpc: mpc85xx: Fix incorrect application of patchMarek Behún
I messed up application of patch 5a428e751044 ("mmc: fsl_esdhc_spl: Add support for builds without CONFIG_SYS_MMC_U_BOOT_OFFS"). I took it from a work-in-progress branch where I changed usage of CONFIG_SDCARD to CONFIG_SD_BOOT and refactored SYS_MPC85XX_NO_RESETVEC mess. But these changes aren't in master yet. Fix the wrong usage of these macros. Fixes: 5a428e751044 ("mmc: fsl_esdhc_spl: Add support for builds without CONFIG_SYS_MMC_U_BOOT_OFFS") Signed-off-by: Marek Behún <[email protected]> Reviewed-by: Pali Rohár <[email protected]>
2022-09-18cyclic: Use schedule() instead of WATCHDOG_RESET()Stefan Roese
Globally replace all occurances of WATCHDOG_RESET() with schedule(), which handles the HW_WATCHDOG functionality and the cyclic infrastructure. Signed-off-by: Stefan Roese <[email protected]> Reviewed-by: Simon Glass <[email protected]> Tested-by: Tom Rini <[email protected]> [am335x_evm, mx6cuboxi, rpi_3,dra7xx_evm, pine64_plus, am65x_evm, j721e_evm]
2022-09-16mmc: fsl_esdhc_spl: Add support for builds without CONFIG_SYS_MMC_U_BOOT_OFFSPali Rohár
When fixed offset via CONFIG_SYS_MMC_U_BOOT_OFFS is not specified then expects that U-Boot proper is placed immediately after SPL without any additional padding. This allows to generate smaller SPL+U-Boot final binary as it is not required to specify fixed offset to U-Boot proper at SPL compile time. In this case offset to U-Boot proper is calculated at SPL compile time in linker script. Signed-off-by: Pali Rohár <[email protected]> Reviewed-by: Jaehoon Chung <[email protected]> Signed-off-by: Marek Behún <[email protected]>
2022-09-16powerpc: mpc85xx: Fix loading U-Boot proper from SD card in SPLPali Rohár
Change 8-byte alignment of SPL binary to just 4-byte alignment as objcopy trims trailing zero bytes when converting ELF file to RAW binary. This is same fix for SPL linker script as was done fix for U-Boot linker script in commit e8c0e0064c8a ("powerpc: mpc85xx: Fix CONFIG_OF_SEPARATE support"). It is required for the patch "mmc: fsl_esdhc_spl: Add support for builds without CONFIG_SYS_MMC_U_BOOT_OFFS" which triggered this issue in SPL. Signed-off-by: Pali Rohár <[email protected]> Signed-off-by: Marek Behún <[email protected]>
2022-09-16powerpc: mpc85xx: Fix check for CONFIG_SDCARDMarek Behún
Commit d433c74eecdc ("Convert CONFIG_SDCARD et al to Kconfig") converted SYS_EXTRA_OPTIONS=SDCARD or SPIFLASH to config options CONFIG_SDCARD and CONFIG_SPIFLASH, but left one occurance unchanged. Fix this. Fixes: d433c74eecdc ("Convert CONFIG_SDCARD et al to Kconfig") Signed-off-by: Marek Behún <[email protected]> Reviewed-by: Pali Rohár <[email protected]>
2022-09-06board: freescale: p1_p2_rdb_pc: Turn off watchdog before resetPali Rohár
P1/P2 RDB boards have external max6370 watchdog connected to CPLD and this watchdog is not deactivated on board reset. So if it is active during board reset, it can trigger another reset when CPU is booting U-Boot. To prevent possible infinite reset loop caused by external watchdog, turn it off before reset. Do it via a new board_reset_prepare() callback which is called from do_reset() function before any reset sequence. Signed-off-by: Pali Rohár <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2022-09-06board: freescale: p1_p2_rdb_pc: Avoid usage of CPLD's system reset registerPali Rohár
CPLD's system reset register is buggy and requires workaround in U-Boot. So use this kind of board reset only when there is no other reset option. Introduce a new board_reset_last() callback which is last-stage board-specific reset and implement CPLD's system reset in this new board_reset_last() callback instead of board_reset() callback. Fixes: 20fb58fc5a1c ("board: freescale: p1_p2_rdb_pc: Implement board_reset()") Signed-off-by: Pali Rohár <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2022-08-20powerpc: remove support for kmtergr1 and MPC8309Holger Brunck
The kmtegr1 board is out of maintenance and can be removed. As it is the only board in the tree using MPC8309 the support for this CPU is dropped completely. Signed-off-by: Holger Brunck <[email protected]>
2022-08-20ppc: Remove corenet_ds boardsTom Rini
These boards have been orphaned for some time and are behind on various DM migrations. Remove them. Cc: Priyanka Jain <[email protected]> Cc: Peng Fan <[email protected]> Signed-off-by: Tom Rini <[email protected]>
2022-08-12ppc: Remove ids8313 boardTom Rini
This board is behind on several mandatory DM migrations and is missing OF_CONTROL support that makes other conversions impossible. Remove it. Cc: Heiko Schocher <[email protected]> Signed-off-by: Tom Rini <[email protected]> Acked-by: Heiko Schocher <[email protected]>
2022-08-12Convert CONFIG_SYS_FSL_QMAN_V3 et al to KconfigTom Rini
This converts the following to Kconfig: CONFIG_FSL_NGPIXIS CONFIG_SYS_FSL_QMAN_V3 CONFIG_SYS_FSL_RAID_ENGINE CONFIG_SYS_FSL_RMU CONFIG_SYS_FSL_SINGLE_SOURCE_CLK CONFIG_SYS_FSL_SRIO_LIODN CONFIG_SYS_FSL_TBCLK_DIV CONFIG_SYS_FSL_USB1_PHY_ENABLE CONFIG_SYS_FSL_USB2_PHY_ENABLE CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY Signed-off-by: Tom Rini <[email protected]>
2022-08-12Convert CONFIG_SYS_FSL_PCIE_COMPAT to KconfigTom Rini
This converts the following to Kconfig: CONFIG_SYS_FSL_PCIE_COMPAT To do this, introduce a choice and option for each of the strings used and set CONFIG_SYS_FSL_PCIE_COMPAT based on that. Signed-off-by: Tom Rini <[email protected]>
2022-08-12Convert CONFIG_SYS_FSL_NUM_CC_PLLS to KconfigTom Rini
This converts the following to Kconfig: CONFIG_SYS_FSL_NUM_CC_PLLS Signed-off-by: Tom Rini <[email protected]>
2022-08-10common: Drop display_options.h from common headerSimon Glass
Move this out of the common header and include it only where needed. Signed-off-by: Simon Glass <[email protected]>
2022-08-08net: mpc8xx_fec: Migrate to DM_ETHChristophe Leroy
Migrate mpc8xx_fec driver to DM_ETH. Signed-off-by: Christophe Leroy <[email protected]> Reviewed-by: Ramon Fried <[email protected]>
2022-08-04Convert CONFIG_SYS_FSL_CORES_PER_CLUSTER to KconfigTom Rini
This converts the following to Kconfig: CONFIG_SYS_FSL_CORES_PER_CLUSTER As part of this, correct the dependencies on SYS_FSL_THREADS_PER_CORE. Signed-off-by: Tom Rini <[email protected]>
2022-08-04Convert CONFIG_FSL_CORENET to KconfigTom Rini
This converts the following to Kconfig: CONFIG_FSL_CORENET Signed-off-by: Tom Rini <[email protected]>
2022-07-29powerpc: mpc85xx: Add support for generating QorIQ pre-PBL eSDHC boot sectorPali Rohár
QorIQ U-Boot binary for SD card booting compiled during build process (either u-boot.bin or u-boot-with-spl.bin) cannot be directly loaded by QorIQ pre-PBL BootROM. Compiled U-Boot binary first needs to be processed by Freescale boot_format tool as described in doc/README.mpc85xx-sd-spi-boot BootROM requires that image on SD card must contain special boot sector. Implement support for generating this special boot sector directly in U-Boot start code. Boot sector needs to be at the beginning of the image, so when compiling only proper U-Boot without SPL then it needs to be in proper U-Boot. When compiling SPL with proper U-Boot then it needs to be only in SPL. Support can be enabled by a new config option FSL_PREPBL_ESDHC_BOOT_SECTOR. Via other two additional options FSL_PREPBL_ESDHC_BOOT_SECTOR_START and FSL_PREPBL_ESDHC_BOOT_SECTOR_DATA it is possible to tune how final U-Boot image could be stored on the SD card. Signed-off-by: Pali Rohár <[email protected]>
2022-07-08Convert CONFIG_SYS_CACHE_STASHING to KconfigTom Rini
This converts the following to Kconfig: CONFIG_SYS_CACHE_STASHING Signed-off-by: Tom Rini <[email protected]>
2022-07-07Convert CONFIG_SYS_FSL_CPC et al to KconfigTom Rini
This converts the following to Kconfig: CONFIG_SYS_FSL_CPC CONFIG_SYS_CPC_REINIT_F Signed-off-by: Tom Rini <[email protected]>
2022-07-07Convert CONFIG_SYS_RAMBOOT to KconfigTom Rini
This converts the following to Kconfig: CONFIG_SYS_RAMBOOT Signed-off-by: Tom Rini <[email protected]>
2022-07-07Convert CONFIG_SYS_BOOK3E_HV to KconfigTom Rini
This converts the following to Kconfig: CONFIG_SYS_BOOK3E_HV Signed-off-by: Tom Rini <[email protected]>
2022-07-07Convert CONFIG_SYS_83XX_DDR_USES_CS0 to KconfigTom Rini
This converts the following to Kconfig: CONFIG_SYS_83XX_DDR_USES_CS0 Signed-off-by: Tom Rini <[email protected]>
2022-07-05arch/Kconfig.nxp: Re-organize slightlyTom Rini
Make all of the CHAIN_OF_TRUST options be under a single menu and add a comment for the rest, so the resulting config file reads more clearly. Remove duplicate CHAIN_OF_TRUST options from board/congatec/common/Kconfig. Remove duplicate NXP_ESBC config questions and move to arch/Kconfig.nxp. Signed-off-by: Tom Rini <[email protected]>
2022-07-05Convert CONFIG_SYS_FSL_SFP_BE et al to KconfigTom Rini
This converts the following to Kconfig: CONFIG_KEY_REVOCATION CONFIG_SYS_FSL_SFP_BE CONFIG_SYS_FSL_SFP_LE CONFIG_SYS_FSL_SFP_VER_3_0 CONFIG_SYS_FSL_SFP_VER_3_2 CONFIG_SYS_FSL_SFP_VER_3_4 CONFIG_SYS_FSL_SRK_LE This partly means making sure to enable SYS_FSL_ERRATUM_A007186 only for when CHAIN_OF_TRUST is enabled. Signed-off-by: Tom Rini <[email protected]>
2022-07-05Convert CONFIG_HETROGENOUS_CLUSTERS et al to KconfigTom Rini
This converts the following to Kconfig: CONFIG_HETROGENOUS_CLUSTERS CONFIG_SYS_MAPLE CONFIG_SYS_CPRI CONFIG_PPC_CLUSTER_START CONFIG_DSP_CLUSTER_START CONFIG_SYS_CPRI_CLK CONFIG_SYS_ULB_CLK CONFIG_SYS_ETVPE_CLK Signed-off-by: Tom Rini <[email protected]>
2022-07-05Convert CONFIG_ENABLE_36BIT_PHYS to KconfigTom Rini
This converts the following to Kconfig: CONFIG_ENABLE_36BIT_PHYS Signed-off-by: Tom Rini <[email protected]>
2022-07-03powerpc: mpc85xx: Simplify jump to _start_cont in flash codePali Rohár
After more patches code for jumping to _start_cont symbol in flash memory involved to code with useless mathematical operations. Currently it does: r3 := CONFIG_SYS_MONITOR_BASE + ABS(_start_cont) - CONFIG_SYS_MONITOR_BASE jump to r3 Which is equivalent of just: r3 := ABS(_start_cont) jump to r3 The purpose of that code is just to jump to _start_code symbol, independently of program counter. So branch must be done to absolute address. Trying to write: ba _start_cont just cause linker error: LD u-boot powerpc-linux-gnuspe-ld.bfd: arch/powerpc/cpu/mpc85xx/start.o: in function `switch_as': (.bootpg+0x4b8): relocation truncated to fit: R_PPC_ADDR24 against symbol `_start_cont' defined in .text section in arch/powerpc/cpu/mpc85xx/start.o make: *** [Makefile:1801: u-boot] Error 1 Probably by the fact that absolute address cannot be expressed by 24-bits. So write the code via mtlr+blr pattern as it was before and load general purpose register with absolute address of the symbol: lis r3,_start_cont@h ori r3,r3,_start_cont@l mtlr r3 blr Seems that gcc and gnu ld linker support symbol@h and symbol@l syntax like number@h and number@l without any problem. And disassembling of compiler u-boot binary proved that lis+ori instructions are called with numbers which represent halves of absolute address of _start_cont symbol. Signed-off-by: Pali Rohár <[email protected]>
2022-06-28Convert CONFIG_USB_MAX_CONTROLLER_COUNT to KconfigTom Rini
This converts the following to Kconfig: CONFIG_USB_MAX_CONTROLLER_COUNT Signed-off-by: Tom Rini <[email protected]>
2022-06-28Convert CONFIG_SYS_MPC85XX_NO_RESETVEC to KconfigTom Rini
This converts the following to Kconfig: CONFIG_SYS_MPC85XX_NO_RESETVEC Signed-off-by: Tom Rini <[email protected]>
2022-06-28usb: ehci-fsl: Remove non-DM codeTom Rini
The deadline for DM_USB migration has passed and all users have been migrated. Remove now unused code. Signed-off-by: Tom Rini <[email protected]>
2022-06-28powerpc: mpc85xx: Set TEXT_BASE addresses to real base valuesPali Rohár
Currently CONFIG_SPL_TEXT_BASE and CONFIG_SYS_TEXT_BASE addresses are manually increased by 0x1000 due to .bootpg section. This section has size of 0x1000 bytes and is manually put by linker script before .text section (and therefore before base address) when CONFIG_SYS_MPC85XX_NO_RESETVEC is set. Due to this fact lot of other config options are manually increased by 0x1000 value to make correct layout. Note that entry point is not on CONFIG_SPL_TEXT_BASE (image+0x1000) but it is really on address CONFIG_SPL_TEXT_BASE-0x1000 (means at the start of the image). Cleanup handling of .bootpg section when CONFIG_SYS_MPC85XX_NO_RESETVEC is set. Put .bootpg code directly into .text section and move text base address to the start of .bootpg code. And finally remove +0x1000 value from lot of config options. With this removal custom PHDRS is not used anymore, so remove it too. After this change entry point would be at CONFIG_SPL_TEXT_BASE and not at address -0x1000 anymore. Tested on P2020 board with SPL and proper U-Boot. Signed-off-by: Pali Rohár <[email protected]>
2022-06-23linker_lists: Rename sections to remove . prefixAndrew Scull
Rename the sections used to implement linker lists so they begin with '__u_boot_list' rather than '.u_boot_list'. The double underscore at the start is still distinct from the single underscore used by the symbol names. Having a '.' in the section names conflicts with clang's ASAN instrumentation which tries to add redzones between the linker list elements, causing expected accesses to fail. However, clang doesn't try to add redzones to user sections, which are names with all alphanumeric and underscore characters. Signed-off-by: Andrew Scull <[email protected]> Reviewed-by: Simon Glass <[email protected]>
2022-06-20powerpc: mpc85xx: Fix compilation with CONFIG_WDTPali Rohár
When CONFIG_WDT is enabled then non-DM watchdog code cannot be used due to conflicting functions like watchdog_reset(). So disable compilation of mpc85xx watchdog_reset() function when CONFIG_WDT is enabled. Signed-off-by: Pali Rohár <[email protected]>
2022-06-06Migrate CUSTOM_SYS_INIT_SP_ADDR to Kconfig using system-constants.hTom Rini
- Make all users of CUSTOM_SYS_INIT_SP_ADDR reference SYS_INIT_SP_ADDR - Introduce HAS_CUSTOM_SYS_INIT_SP_ADDR to allow for setting the stack pointer directly, otherwise we use the common calculation. - On some platforms that were using the standard calculation but did not set CONFIG_SYS_INIT_RAM_SIZE / CONFIG_SYS_INIT_RAM_ADDR, set them. - On a small number of platforms that were not subtracting GENERATED_GBL_DATA_SIZE do so now via the standard calculation. - CONFIG_SYS_INIT_SP_OFFSET is now widely unused, so remove it from most board config header files. Signed-off-by: Tom Rini <[email protected]>
2022-06-06powerpc: Switch to using CONFIG_SYS_INIT_SP_OFFSET from ↵Tom Rini
CONFIG_SYS_GBL_DATA_OFFSET In the places where PowerPC references CONFIG_SYS_GBL_DATA_OFFSET it does so as (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET). And it defines CONFIG_SYS_GBL_DATA_OFFSET in the same manner that other architectures define CONFIG_SYS_INIT_SP_OFFSET. Other architectures define CONFIG_SYS_INIT_SP_ADDR as (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) typically. Rename things within PowerPC for consistency with other architectures. Signed-off-by: Tom Rini <[email protected]>
2022-06-06mpc85xx: Switch to setting the initial stack pointer more clearlyTom Rini
Currently, since we know that in the combination of CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET all of the "high" bits are in CONFIG_SYS_INIT_RAM_ADDR and "low" bits are in CONFIG_SYS_GBL_DATA_OFFSET we reference this separately in start.S, but added together everywhere else. For clarity consistency, reference the combined value here instead. Signed-off-by: Tom Rini <[email protected]>
2022-06-06Convert CONFIG_SPL_INIT_MINIMAL et al to KconfigTom Rini
This converts the following to Kconfig: CONFIG_SPL_INIT_MINIMAL CONFIG_SPL_FLUSH_IMAGE CONFIG_SPL_SKIP_RELOCATE Signed-off-by: Tom Rini <[email protected]>
2022-05-20caam: Fix crash in case caam_jr_probe failedYe Li
If probing caam_jr returns failure, the variable "dev" will not be initialized, so we can't use dev->name for the error print. Otherwise it will cause crash. Signed-off-by: Ye Li <[email protected]> Reviewed-by: Gaurav Jain <[email protected]>
2022-04-26powerpc: mpc85xx: Define linker sections in ascending orderPali Rohár
It is too confusing if sections are defined in non-ascending order. Also linker has to go backward and then again forward when generating final binary. To make future changes easier, define all linker sections in ascending order. Signed-off-by: Pali Rohár <[email protected]> Reviewed-by: Priyanka Jain <[email protected]>
2022-04-26powerpc: mpc85xx: Put bss after image when not including reset vectorPali Rohár
Linker knows exact size of the image, so there is no need to use CONFIG_SYS_MONITOR_LEN macro (which should be upper limit). Remove usage of CONFIG_SYS_MONITOR_LEN macro to simplify setup. Signed-off-by: Pali Rohár <[email protected]> Reviewed-by: Priyanka Jain <[email protected]>
2022-04-26powerpc: mpc85xx: Remove useless SIZEOF_HEADERS and .interp from ld scriptPali Rohár
.interp section is not available in output ELF binary and SIZEOF_HEADERS is needed at all. There is no change in generated u-boot.bin binary. Signed-off-by: Pali Rohár <[email protected]> Reviewed-by: Priyanka Jain <[email protected]>
2022-04-26powerpc: mpc85xx: Remove duplicate u-boot-nand.ldsPali Rohár
Signed-off-by: Priyanka Jain <[email protected]>
2022-04-26powerpc: mpc85xx: Remove u-boot-nand_spl.ldsPali Rohár
mpc85xx SPL NAND linker script u-boot-nand_spl.lds is not used since Jun 2014 commit 0234446fd171 ("nand_spl: remove MPC8536DS support"). Remove it. Signed-off-by: Pali Rohár <[email protected]> [Rebased] Signed-off-by: Priyanka Jain <[email protected]>
2022-04-26powerpc: mpc85xx: Fix CONFIG_OF_SEPARATE supportPali Rohár
Currently CONFIG_OF_SEPARATE is completely broken and U-Boot for some mpc85xx board (e.g. P2020) has to be compiled with CONFIG_OF_EMBED. Otherwise it crashes during early init. When debug console is enabled and all debug logging options are turned on then U-Boot on P2020 with CONFIG_OF_SEPARATE prints following error: No valid device tree binary found at 110dc300 initcall sequence 110d3560 failed at call 1109535c (err=-1) ### ERROR ### Please RESET the board ### Problem is with appended DTB. When CONFIG_SYS_MPC85XX_NO_RESETVEC is set U-Boot binary image without DTB ends immediately after the .u_boot_list section. At this position is defined _end symbol at which U-Boot expects start of the appended DTB. Problem is that after .u_boot_list section are in linker script defined another sections with 256 byte long padding which are completely empty. During conversion of U-Boot ELF binary to RAW binary u-boot-nodtb.bin, objcopy removes trailing zero padding and therefore DTB is appended at wrong position. Changing alignment from 256 bytes to 4 bytes fixes this issue. And appended DTB is finally at he correct position. With this fix U-Boot on P2020 with CONFIG_OF_SEPARATE option starts working again. Signed-off-by: Pali Rohár <[email protected]> Reviewed-by: Priyanka Jain <[email protected]>
2022-04-26powerpc: mpc85xx: Show e500 core versionPali Rohár
Distinguish between e500v1 and e500v2. Signed-off-by: Pali Rohár <[email protected]> Reviewed-by: Priyanka Jain <[email protected]>
2022-04-26powerpc: mpc85xx: Rename _start_e500 symbol to _startPali Rohár
The real entry point is _start_e500. There is no _start symbol at all. So rename _start_e500 to _start for convension that _start symbol is used as entry point. Signed-off-by: Pali Rohár <[email protected]> Reviewed-by: Priyanka Jain <[email protected]>