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2020-07-06Merge branch 'next'Tom Rini
Merge all outstanding changes from the current next branch in now that we have released.
2020-07-03riscv: use log functions in fdt_fixupHeinrich Schuchardt
Replace printf() and debug() by log_err() and log_debug(). "No reserved memory region found in source FDT\n" is not an error but a debug information. %s/can not/cannot/ - use the more common spelling. Signed-off-by: Heinrich Schuchardt <[email protected]> Reviewed-by: Bin Meng <[email protected]> Reviewed-by: Atish Patra <[email protected]>
2020-07-03riscv: Use optimized version of fdtdec_get_addr_size_no_parentAtish Patra
fdtdec_get_addr_size_no_parent is not an optimized version if parent node is already available with the caller. Use fdtdec_get_addr_size_auto_parent to read the "reg" property Signed-off-by: Atish Patra <[email protected]> Reviewed-by: Bin Meng <[email protected]>
2020-07-03riscv: Do not return error if reserved node already existsAtish Patra
Not all errors are fatal. If a reserved memory node already exists in the destination device tree, we can continue to boot without failing. Signed-off-by: Atish Patra <[email protected]> Reviewed-by: Bin Meng <[email protected]>
2020-07-03riscv: Do not build reset.c if SYSRESET is onBin Meng
SYSRESET uclass driver already provides all the reset APIs, hence exclude our own ad-hoc reset.c implementation. Signed-off-by: Bin Meng <[email protected]> Reviewed-by: Sagar Kadam <[email protected]> Reviewed-by: Pragnesh Patel <[email protected]>
2020-07-02riscv: Expand the DT size before copy reserved memory nodeBin Meng
The FDT blob might not have sufficient space to hold a copy of reserved memory node. Expand it before the copy. Reported-by: Rick Chen <[email protected]> Signed-off-by: Bin Meng <[email protected]> Reviewed-by: Atish Patra <[email protected]> Reviewed-by: Rick Chen <[email protected]>
2020-07-02riscv: Avoid the reserved memory fixup if src and dst point to the same placeBin Meng
The copy of reserved memory node from source dtb to destination dtb can be avoided if they point to the same place. This is useful when OF_PRIOR_STAGE is used. Signed-off-by: Bin Meng <[email protected]> Reviewed-by: Rick Chen <[email protected]> Reviewed-by: Atish Patra <[email protected]>
2020-07-01riscv: Allow use of reset driversSean Anderson
Currently, one cannot use a reset driver on RISC-V. Follow the MIPS example, and disable the default reset handler when the sysreset driver is enabled. Signed-off-by: Sean Anderson <[email protected]> Reviewed-by: Bin Meng <[email protected]>
2020-07-01riscv: Clean up IPI initialization codeSean Anderson
The previous IPI code initialized the device whenever the first call was made to a riscv_*_ipi function. This made it difficult to determine when the IPI device was initialized. This patch introduces a new function riscv_init_ipi. It is called once during arch_cpu_init_dm. In SPL, it is called in spl_invoke_opensbi. Before this point, no riscv_*_ipi functions should be called. Signed-off-by: Sean Anderson <[email protected]> Reviewed-by: Rick Chen <[email protected]>
2020-06-04riscv: sbi: Move sbi_probe_extension() out of CONFIG_SBI_V01Bin Meng
sbi_probe_extension() is an API defined in SBI v0.2, not v0.1. Fixes 7e249bc13aaf: ("riscv: Move all SMP related SBI calls to SBI_v01") Signed-off-by: Bin Meng <[email protected]> Reviewed-by: Rick Chen <[email protected]>
2020-06-04riscv: sbi: Remove sbi_spec_versionBin Meng
U-Boot defaults to use SBI v0.2. Howerver there is a global variable sbi_spec_version that stills refers to v0.1. Since it is not used anywhere, let's remove it. Signed-off-by: Bin Meng <[email protected]> Reviewed-by: Rick Chen <[email protected]>
2020-05-26riscv: Move all SMP related SBI calls to SBI_v01Atish Patra
SMP support for S-mode U-Boot is enabled only if SBI_V01 is enabled. There is no point in supporting SMP related (IPI and fences) SBI calls when SBI_V02 is enabled. Modify all the SMP related SBI calls to be defined only for SBI_V01. Signed-off-by: Atish Patra <[email protected]> Reviewed-by: Bin Meng <[email protected]>
2020-05-18common: Drop log.h from common headerSimon Glass
Move this header out of the common header. Signed-off-by: Simon Glass <[email protected]>
2020-05-18command: Remove the cmd_tbl_t typedefSimon Glass
We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <[email protected]>
2020-05-18common: Drop init.h from common headerSimon Glass
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <[email protected]>
2020-05-18common: Drop image.h from common headerSimon Glass
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <[email protected]>
2020-05-18common: Drop bootstage.h from common headerSimon Glass
Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <[email protected]>
2020-04-23riscv: Move all fdt fixups togetherAtish Patra
Keep all the fdt fixups together for better code management. Signed-off-by: Atish Patra <[email protected]> Reviewed-by: Bin Meng <[email protected]>
2020-04-23riscv: Copy the reserved-memory nodes to final DTAtish Patra
The DT used by U-Boot may be different from the DT being passed to the OS if the DT is loaded from external media such as network or mmc. In that case, the reserved-memory node needs to be copied to the DT passed to the OS. Signed-off-by: Atish Patra <[email protected]> Reviewed-by: Bin Meng <[email protected]> Tested-by: Bin Meng <[email protected]>
2020-04-23riscv: Setup reserved-memory node for FU540Atish Patra
FU540 uses OF_SEPARATE instead of OF_PRIOR_STAGE. Enable OF_BOARD_FIXUP to update the DT with reserved-memory node. Signed-off-by: Atish Patra <[email protected]> Reviewed-by: Bin Meng <[email protected]> Tested-by: Bin Meng <[email protected]>
2020-04-23riscv: Provide a mechanism to fix DT for reserved memoryAtish Patra
In RISC-V, M-mode software can reserve physical memory regions by setting appropriate physical memory protection (PMP) csr. As the PMP csr are accessible only in M-mode, S-mode U-Boot can not read this configuration directly. However, M-mode software can pass this information via reserved-memory node in device tree so that S-mode software can access this information. This patch provides a framework to copy to the reserved-memory node from one DT to another. This will be used to update the DT used by U-Boot and the DT passed to the next stage OS. Signed-off-by: Atish Patra <[email protected]> Reviewed-by: Bin Meng <[email protected]> Tested-by: Bin Meng <[email protected]>
2020-04-23riscv: Add boot hartid to device treeAtish Patra
Linux booting protocol mandates that register "a0" contains the hartid. However, U-Boot can not pass the hartid via a0 during standard UEFI protocol. DT nodes are commonly used to pass such information to the OS. Add a DT node under chosen node to indicate the boot hartid. EFI stub in Linux kernel will parse this node and pass it to the real kernel in "a0" before jumping to it. Signed-off-by: Atish Patra <[email protected]> Reviewed-by: Rick Chen <[email protected]> Reviewed-by: Bin Meng <[email protected]> Tested-by: Heinrich Schuchardt <[email protected]> Tested-by: Bin Meng <[email protected]>
2020-04-23riscv: Introduce SPL_SMP Kconfig option for U-Boot SPLBin Meng
With SBI v0.2 HSM extension, only a single hart need to boot and enter operating system. The booting hart can bring up secondary harts one by one afterwards. For U-Boot running in SPL, SMP can be turned on, while in U-Boot proper, SMP can be optionally turned off if using SBI v0.2 HSM. Introduce a new SPL_SMP Kconfig option to support this. Signed-off-by: Bin Meng <[email protected]> Reviewed-by: Atish Patra <[email protected]>
2020-03-17riscv: Implement new SBI v0.2 extensionsBin Meng
Few v0.1 SBI calls are being replaced by new SBI calls that follows v0.2 calling convention. Implement the replacement extensions and few additional new SBI function calls that makes way for a better SBI interface in future. Signed-off-by: Bin Meng <[email protected]> Reviewed-by: Pragnesh Patel <[email protected]>
2020-03-17riscv: Introduce a new config for SBI v0.1Bin Meng
We now have SBI v0.2 which is more scalable and extendable to handle future needs for RISC-V supervisor interfaces. Introduce a new config and move all SBI v0.1 code under that config. This allows to implement the new replacement SBI extensions cleanly and remove v0.1 extensions easily in future. Currently, the config is enabled by default. Once all M-mode software, with v0.1, is no longer in use, this config option and all relevant code can be easily removed. This commit is inspired from Linux kernel patch: https://patchwork.kernel.org/patch/11407361/ Signed-off-by: Bin Meng <[email protected]> Reviewed-by: Pragnesh Patel <[email protected]>
2020-03-17riscv: Add basic support for SBI v0.2Bin Meng
The SBI v0.2 introduces a base extension which is backward compatible with v0.1. Implement all helper functions and minimum required SBI calls from v0.2 for now. All other base extension function will be added later as per need. As v0.2 calling convention is backward compatible with v0.1, remove the v0.1 helper functions and just use v0.2 calling convention. Add a new Kconfig options CONFIG_SBI for the new SBI v0.2 codes, and let CONFIG_SBI_IPI depend on it. This commit is inspired from Linux kernel patch: https://patchwork.kernel.org/patch/11407363/ Signed-off-by: Bin Meng <[email protected]> Reviewed-by: Pragnesh Patel <[email protected]>
2020-03-17riscv: Avoid calling sbi_clear_ipi()Bin Meng
There is no need for S-mode U-Boot to call sbi_clear_ipi() as it can be cleared directly from S-mode. This saves some cycles. Signed-off-by: Bin Meng <[email protected]> Reviewed-by: Lukas Auer <[email protected]>
2020-02-11Merge tag 'dm-pull-6feb20' of https://gitlab.denx.de/u-boot/custodians/u-boot-dmTom Rini
sandbox conversion to SDL2 TPM TEE driver Various minor sandbox video enhancements New driver model core utility functions
2020-02-10riscv: Add option to print registers on exceptionSean Anderson
When debugging, it can be helpful to see more information about an unhandled exception. This patch adds an option to view the registers at the time of the trap, similar to the linux output on a kernel panic. Signed-off-by: Sean Anderson <[email protected]> Reviewed-by: Rick Chen <[email protected]> Reviewed-by: Bin Meng <[email protected]> Tested-by: Bin Meng <[email protected]>
2020-02-05dm: core: Require users of devres to include the headerSimon Glass
At present devres.h is included in all files that include dm.h but few make use of it. Also this pulls in linux/compat which adds several more headers. Drop the automatic inclusion and require files to include devres themselves. This provides a good indication of which files use devres. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Anatolij Gustschin <[email protected]>
2020-01-17common: Move hang() to the same header as panic()Simon Glass
At present panic() is in the vsprintf.h header file. That does not seem like an obvious choice for hang(), even though it relates to panic(). So let's put hang() in its own header. Signed-off-by: Simon Glass <[email protected]> [trini: Migrate a few more files] Signed-off-by: Tom Rini <[email protected]>
2020-01-17common: Move device-tree setup functions to fdt_support.hSimon Glass
These functions relate to setting up the device tree for booting the OS. The fdt_support.h header file supports similar functions, so move these there. Signed-off-by: Simon Glass <[email protected]>
2019-12-10riscv: add option to wait for ack from secondary harts in smp functionsLukas Auer
Add a wait option to smp_call_function() to wait for the secondary harts to acknowledge the call-function request. The request is considered to be acknowledged once each secondary hart has cleared the corresponding IPI. As part of the call-function request, the secondary harts invalidate the instruction cache after clearing the IPI. This adds a delay between acknowledgment (clear IPI) and fulfillment (call function) of the request. We want to use the acknowledgment to be able to judge when the request has been completed. Remove the delay by clearing the IPI after cache invalidation and just before calling the function from the request. Signed-off-by: Lukas Auer <[email protected]> Reviewed-by: Rick Chen <[email protected]> Tested-by: Rick Chen <[email protected]> Reviewed-by: Anup Patel <[email protected]>
2019-12-10riscv: add functions for reading the IPI statusLukas Auer
Add the function riscv_get_ipi() for reading the pending status of IPIs. The supported controllers are Andes' Platform Level Interrupt Controller (PLIC), the Supervisor Binary Interface (SBI), and SiFive's Core Local Interruptor (CLINT). Signed-off-by: Lukas Auer <[email protected]> Reviewed-by: Rick Chen <[email protected]>
2019-12-10riscv: andes_plic: Fix some wrong configurationsRick Chen
Fix two wrong settings of andes plic driver as below: 1. Fix wrong pending register base definition. 2. Declaring the en variable in enable_ipi() as unsigned int instead of int can help to fix wrong plic enabling setting in RV64. Signed-off-by: Rick Chen <[email protected]> Cc: KC Lin <[email protected]> Cc: Alan Kao <[email protected]>
2019-12-02common: Move interrupt functions into a new headerSimon Glass
These functions do not use driver model but are fairly widely used in U-Boot. But it is not clear that they will use driver model anytime soon, so we don't want to label them as 'legacy'. Move them to a new irq_func.h header file. Avoid the name 'irq.h' since it is widely used in U-Boot already. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Tom Rini <[email protected]>
2019-12-02common: Move ARM cache operations out of common.hSimon Glass
These functions are CPU-related and do not use driver model. Move them to cpu_func.h Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Daniel Schwierzeck <[email protected]> Reviewed-by: Tom Rini <[email protected]>
2019-12-02common: Move some cache and MMU functions out of common.hSimon Glass
These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Tom Rini <[email protected]>
2019-10-18RISC-V: Align boot image header with LinuxAtish Patra
The released Linux boot image header in v5.3 is different from the one present in U-Boot. Align the header with the new version. The changes in Linux are backward compatible. Previous U-Boot releases with older header will continue to work as well. As v5.3 kernel is the first one to support image header, there is no compatibility issue between new U-Boot (with this patch) and older kernel. Signed-off-by: Atish Patra <[email protected]> Reviewed-by: Rick Chen <[email protected]>
2019-09-03riscv: andes_plic: init plic by scanning each cpu nodeRick Chen
Initialize plic driver by ofnode_for_each_subnode() instead of cpu_get_count(). This way can support to skip some harts which maybe marked as unavailable, but the cpu node exists indeed. Signed-off-by: Rick Chen <[email protected]> Cc: KC Lin <[email protected]> Reviewed-by: Bin Meng <[email protected]>
2019-08-26riscv: add a generic FIT generator scriptLukas Auer
Add a generic FIT generator script for RISC-V to generate images containing U-Boot, OpenSBI FW_DYNAMIC firmware, and optionally one or more device trees. The location of the OpenSBI firmware binary can be specified with the OPENSBI environment variable. By default, it is assumed to be "fw_dynamic.bin", located in the U-Boot top-level. Device trees are passed as arguments to the generator script. A separate configuration entry is created for each device tree. The load addresses of U-Boot and OpenSBI are parsed from the U-Boot configuration. They can be overwritten with the UBOOT_LOAD_ADDR and OPENSBI_LOAD_ADDR environment variables. The script is based on the i.MX (arch/arm/mach-imx/mkimage_fit_atf.sh) and Allwinner sunxi (board/sunxi/mksunxi_fit_atf.sh) FIT generator scripts. Signed-off-by: Lukas Auer <[email protected]> Reviewed-by: Bin Meng <[email protected]> Tested-by: Bin Meng <[email protected]> Reviewed-by: Anup Patel <[email protected]>
2019-08-26riscv: add SPL supportLukas Auer
U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly jumping to the image and via OpenSBI firmware. In the first case, both U-Boot SPL and proper must be compiled to run in the same privilege mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine mode and U-Boot proper for supervisor mode. To be able to use SPL, boards have to provide a supported SPL boot device. Signed-off-by: Lukas Auer <[email protected]> Reviewed-by: Bin Meng <[email protected]> Tested-by: Bin Meng <[email protected]> Reviewed-by: Anup Patel <[email protected]>
2019-08-26riscv: add run mode configuration for SPLLukas Auer
U-Boot SPL can be run in a different privilege mode from U-Boot proper. Add new configuration entries for SPL to allow the run mode to be configured independently of U-Boot proper. Extend all uses of the CONFIG_RISCV_SMODE and CONFIG_RISCV_MMODE configuration symbols to also cover the SPL equivalents. Ensure that files compatible with only one privilege mode are not included in builds targeting an incompatible privilege mode. Signed-off-by: Lukas Auer <[email protected]> Reviewed-by: Bin Meng <[email protected]> Tested-by: Bin Meng <[email protected]> Reviewed-by: Anup Patel <[email protected]>
2019-07-16efi_loader: use predefined constants in crt0_*_efi.SHeinrich Schuchardt
We should use predefined constants instead of magic numbers. Move some constant definitions from include/pe.h to include/asm-generic/pe.h. Use these constants in crt0_*_efi.S. Signed-off-by: Heinrich Schuchardt <[email protected]>
2019-05-09RISCV: image: Add booti supportAtish Patra
This patch adds booti support for RISC-V Linux kernel. The existing bootm method will also continue to work as it is. It depends on the following kernel patch which adds the header to the flat Image. Gzip compressed Image (Image.gz) support is not enabled with this patch. https://patchwork.kernel.org/patch/10925543/ Tested on HiFive Unleashed and QEMU. Signed-off-by: Atish Patra <[email protected]> Reviewed-by: Tom Rini <[email protected]> Tested-by: Karsten Merker <[email protected]> Reviewed-by: Marek Vasut <[email protected]>
2019-05-09riscv: Introduce CONFIG_XIP to support booting from flashRick Chen
When U-Boot boots from flash, during the boot process, hart_lottery and available_harts_lock variable addresses point to flash which is not writable. This causes boot failures on AE350. Introduce a config option CONFIG_XIP to support such configuration. Signed-off-by: Rick Chen <[email protected]> Cc: Greentime Hu <[email protected]> Reviewed-by: Lukas Auer <[email protected]> Reviewed-by: Bin Meng <[email protected]>
2019-04-08riscv: Add a SYSCON driver for Andestech's PLMTRick Chen
The platform-Level Machine Timer (PLMT) block holds memory-mapped mtime register associated with timer tick. This driver implements the riscv_get_time() which is required by the generic RISC-V timer driver. Signed-off-by: Rick Chen <[email protected]> Cc: Greentime Hu <[email protected]> Reviewed-by: Bin Meng <[email protected]> Reviewed-by: Lukas Auer <[email protected]>
2019-04-08riscv: Add a SYSCON driver for Andestech's PLICRick Chen
The Platform-Level Interrupt Controller (PLIC) block holds memory-mapped claim and pending registers associated with software interrupt. It is required for handling IPI. Signed-off-by: Rick Chen <[email protected]> Cc: Greentime Hu <[email protected]> Reviewed-by: Bin Meng <[email protected]> Reviewed-by: Lukas Auer <[email protected]>
2019-04-08riscv: boot images passed to bootm on all hartsLukas Auer
Signed-off-by: Lukas Auer <[email protected]> Reviewed-by: Anup Patel <[email protected]> Reviewed-by: Bin Meng <[email protected]> Tested-by: Bin Meng <[email protected]>
2019-04-08riscv: add support for multi-hart systemsLukas Auer
On RISC-V, all harts boot independently. To be able to run on a multi-hart system, U-Boot must be extended with the functionality to manage all harts in the system. All harts entering U-Boot are registered in the available_harts mask stored in global data. A hart lottery system as used in the Linux kernel selects the hart U-Boot runs on. All other harts are halted. U-Boot can delegate functions to them using smp_call_function(). Every hart has a valid pointer to the global data structure and a 8KiB stack by default. The stack size is set with CONFIG_STACK_SIZE_SHIFT. Signed-off-by: Lukas Auer <[email protected]> Reviewed-by: Anup Patel <[email protected]> Reviewed-by: Bin Meng <[email protected]> Tested-by: Bin Meng <[email protected]>
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