| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2017-04-13 | board_f: Rename initdram() to dram_init() | Simon Glass | |
| This allows us to use the same DRAM init function on all archs. Add a dummy function for arc, which does not use DRAM init here. Signed-off-by: Simon Glass <[email protected]> [trini: Dummy function on nios2] Signed-off-by: Tom Rini <[email protected]> | |||
| 2016-08-15 | xtensa: add support for the xtensa processor architecture [2/2] | Chris Zankel | |
| The Xtensa processor architecture is a configurable, extensible, and synthesizable 32-bit RISC processor core provided by Tensilica, inc. This is the second part of the basic architecture port, adding the 'arch/xtensa' directory and a readme file. Signed-off-by: Chris Zankel <[email protected]> Signed-off-by: Max Filippov <[email protected]> Reviewed-by: Simon Glass <[email protected]> Reviewed-by: Tom Rini <[email protected]> | |||
