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2017-04-05board_f: Make relocation functions genericSimon Glass
This header file is used by three archs. It could be used by all of them since relocation is a common function. Move it into a generic file. Signed-off-by: Simon Glass <[email protected]>
2016-09-23Remove arch/${ARCH}/include/asm/errno.hMasahiro Yamada
Unlike Linux, nothing about errno.h is arch-specific in U-Boot. As you see, all of arch/${ARCH}/include/asm/errno.h is just a wrapper of <asm-generic/errno.h>. Actually, U-Boot does not export headers to user-space, so we just have to care about the consistency in the U-Boot tree. Now all of include directives for <asm/errno.h> are gone. Deprecate <asm/errno.h>. Signed-off-by: Masahiro Yamada <[email protected]> Acked-by: Alexey Brodkin <[email protected]>
2016-08-15xtensa: add core information for the de212 processorMax Filippov
DE212 is a general purpose xtensa processor without full MMU. Core information files are autogenerated from the processor description and are not meant to be edited. Signed-off-by: Max Filippov <[email protected]> Reviewed-by: Simon Glass <[email protected]> Reviewed-by: Tom Rini <[email protected]>
2016-08-15xtensa: add core information for the dc233c processorMax Filippov
DC233C is an xtensa processor with full MMUv3 capable of running Linux. Core information files are autogenerated from the processor description and are not meant to be edited. Signed-off-by: Max Filippov <[email protected]> Reviewed-by: Simon Glass <[email protected]> Reviewed-by: Tom Rini <[email protected]>
2016-08-15xtensa: add core information for the dc232b processorChris Zankel
DC232B is an xtensa processor with full MMUv2 capable of running Linux. Core information files are autogenerated from the processor description and are not meant to be edited. Signed-off-by: Chris Zankel <[email protected]> Signed-off-by: Max Filippov <[email protected]> Reviewed-by: Simon Glass <[email protected]> Reviewed-by: Tom Rini <[email protected]>
2016-08-15xtensa: add support for the xtensa processor architecture [2/2]Chris Zankel
The Xtensa processor architecture is a configurable, extensible, and synthesizable 32-bit RISC processor core provided by Tensilica, inc. This is the second part of the basic architecture port, adding the 'arch/xtensa' directory and a readme file. Signed-off-by: Chris Zankel <[email protected]> Signed-off-by: Max Filippov <[email protected]> Reviewed-by: Simon Glass <[email protected]> Reviewed-by: Tom Rini <[email protected]>