| Age | Commit message (Collapse) | Author |
|---|
|
Sync include/ec_commands.h from upstream commit 4f3d17aa34
("skywalker: set SLEEP_TIMEOUT_MS to 50 seconds"). The new file makes
two build assumptions that do not hold for U-Boot.
It hides '<stdint.h>' from __KERNEL__ builds, leaving UINT16_MAX
(used by EC_RES_MAX) undefined for U-Boot; widen the gate to
'!defined(__KERNEL__) || defined(__UBOOT__)'
It gates '<linux/limits.h>' on '#ifdef __KERNEL__'; the matching
'#else' branch defines BIT()/BIT_ULL()/GENMASK()/GENMASK_ULL()
locally, assuming kernel headers provide those macros otherwise.
U-Boot defines __KERNEL__ too but has no <linux/limits.h>. Nest a
'!defined(__UBOOT__)' check around the include so the __UBOOT__ path
stays in the __KERNEL__ branch (no local BIT/GENMASK defines), which
avoids redefinition warnings against U-Boot's linux/bitops.h. Pull
in linux/bitops.h up front for U-Boot so the file's own BIT() and
GENMASK() uses still resolve.
Adapt callers to two interface changes. The 'ec_current_image' enum
tag is now 'ec_image' (EC_IMAGE_* constants unchanged); rename it in
affected files to match. The VBNV-context interface was dropped
upstream, but it still used in lab Chromebooks; keep those constants and
structs in cros_ec.h
Likewise, MEC_EMI_BASE and MEC_EMI_SIZE are a U-Boot-local addition to
ec_commands.h that the upstream sync removes; preserve them in cros_ec.h
next to the VBNV block, and switch the only consumer
(arch/x86/cpu/apollolake/cpu_spl.c) to include cros_ec.h
Signed-off-by: Simon Glass <[email protected]>
|
|
Prepare v2026.07-rc3
|
|
Anshul Dalal <[email protected]> says:
This patch series fixes firewall exceptions observed on AM62 family of
devices due to speculative accesses made by the A53 core to secure DDR
regions.
Link: https://lore.kernel.org/r/[email protected]
|
|
Currently the sequence to enable caches for the A53/A72 core on K3
devices looks as follows:
1. Map entire DDR banks
2. Setup page tables (done by mmu_setup)
3. Enable MMU
4. Unmap reserved-memory regions
5. Enable caches
However there is a brief period of execution between #3 and #4 where the
core can issue speculative accesses to the entire DDR space (including
the reserved-memory regions) despite the caches being disabled.
A firewall exception is triggered whenever such speculative access is
made to secure DDR region of TFA or OP-TEE. This patch fixes the issue
by re-ordering the sequence as follows:
1. Map entire DDR banks
2. Setup page tables
3. Unmap reserved-memory regions
4. Enable MMU
5. Enable caches
Fixes: f1c694b8fdde ("mach-k3: map all banks using mem_map_from_dram_banks")
Reported-by: Suhaas Joshi <[email protected]>
Signed-off-by: Anshul Dalal <[email protected]>
Reviewed-by: Ilias Apalodimas <[email protected]>
|
|
Currently mmu_setup for ARMv8 performs two functions, first it sets up
the page tables based the memory map provided by the board and then it
enables the MMU.
However for some platforms runtime fixes to the generated page tables
are required before the MMU can be enabled, such as K3 family of SoCs.
Therefore this patch moves the enablement of the MMU out of mmu_setup
and to a standalone mmu_enable function to give more granular control to
the platforms.
Note that no functional changes are intended from this patch.
Reviewed-by: Ilias Apalodimas <[email protected]>
Signed-off-by: Anshul Dalal <[email protected]>
|
|
So that you can use virtio network, block etc create the virtio mmio
instances. There are 128 of these even if they are not all used, a
single mmio base value is passed via bootinfo.
Reviewed-by: Angelo Dureghello <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Kuan-Wei Chiu <[email protected]>
Tested-by: Kuan-Wei Chiu <[email protected]>
Signed-off-by: Daniel Palmer <[email protected]>
|
|
In Linux these are meant to read a little-endian value and swap
to the CPU endian.
In u-boot for m68k this is currently broken and prevents
virtio-mmio from functioning.
This change is only for classic m68k. Coldfire has read big-endian,
no swap for these in u-boot and Linux and existing drivers probably
depend on this.
Tested-by: Angelo Dureghello <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Acked-by: Kuan-Wei Chiu <[email protected]>
Acked-by: Angelo Dureghello <[email protected]>
Signed-off-by: Daniel Palmer <[email protected]>
|
|
Add support for building U-Boot for Cortex-M33 RSIP core in Renesas
R-Car Gen5 R8A78000 X5H SoC. The main goal is to start U-Boot on the
Cortex-M33 RSIP core, which initializes the hardware and then starts
the Cortex-M33 SCP and Cortex-A720 cores which run the SCP firmware
and applications software respectively. The SCP is responsible for
platform resource management, and is used to start other CPU cores.
The Cortex-M33 build contains its own r8a78000_ironhide_cm33_defconfig
which configures the build for aarch32 instruction set compatible with
the ARMv8M core. The build also uses -cm33 DT and -u-boot.dtsi which
are derived from their non-CM33 counterparts, and add CM33 specifics.
The arch/arm/mach-renesas/u-boot-rsip.lds is derived from generic
arch/arm/cpu/u-boot.lds with adjustments to cater to the RSIP core,
those are entrypoint before vectors, __data_start/__data_end symbols
for data-only relocation, and placement of BSS into read-write SRAM
area.
Signed-off-by: Marek Vasut <[email protected]>
|
|
Add target to generate u-boot-elf.shdr for R-Car Gen5 Cortex-M33
RSIP core. The resulting .shdr SREC file can be written into the
HF at offset 0.
Signed-off-by: Marek Vasut <[email protected]>
|
|
Add target to generate u-boot-elf.scif for R-Car Gen5 Cortex-M33
RSIP core. The resulting .scif SREC file can be loaded using the
SCIF loader to start U-Boot on the RSIP core.
Signed-off-by: Marek Vasut <[email protected]>
|
|
Point every direct user of SCMI clock protocol at CPG node instead
of SCMI clock protocol node. Point every direct user of SCMI reset
and power domain protocol at a matching newly introduced MDLC node
instead of the SCMI reset and power domain protocol nodes.
This allows the CPG and MDLC remap drivers bound to CPG node and MDLC
nodes to remap between DT clock, reset and power domain IDs and SCMI
clock, reset and power domain IDs. This makes U-Boot on R-Car X5H
compatible with multiple SCP firmware versions. Currently supported
versions of SCP firmware are 4.28, 4.31 and 4.32.
Signed-off-by: Marek Vasut <[email protected]>
|
|
driver
Select the R8A78000 power domain and reset driver on R-Car Gen5 X5H
SoC by default. The power domain and reset driver is used to remap
DT power domain and reset IDs to SCMI power domain and reset IDs,
which is necessary to support multiple SCP firmware versions with
varying SCMI clock IDs across versions.
Signed-off-by: Marek Vasut <[email protected]>
|
|
Select the R8A78000 clock driver on R-Car Gen5 X5H SoC by default.
The clock driver is used to remap DT clock IDs to SCMI clock IDs,
which is necessary to support multiple SCP firmware versions with
varying SCMI clock IDs across versions.
Signed-off-by: Marek Vasut <[email protected]>
|
|
Use macro SCP_CLOCK_ID_CLK_S0D6_PERE_MAIN for SCMI clock 1691
instead of hardcoding the number in DT. No functional change.
Signed-off-by: Marek Vasut <[email protected]>
|
|
Enable OF_UPSTREAM to use upstream Linux kernel DT source as a base
for U-Boot control DT. Retain currently present parts of the DT which
are not yet part of upstream Linux kernel DT in -u-boot.dtsi files
until they get replaced by upstream equivalents. Add renesas/ prefix
to the DEFAULT_DEVICE_TREE as part of the switch.
Unused i2c2..i2c8 nodes have been removed, and will become available
once upstream Linux kernel DT adds those nodes.
The DRAM_RSV_SIZE has been updated to cover first 518 MiB of DRAM,
which are reserved for firmware and other use.
Note that all DT parts in -u-boot.dtsi are not considered stable DT
bindings and may change before they land in Linux kernel and become
stable DT ABI.
Signed-off-by: Marek Vasut <[email protected]>
|
|
Fix typo, addreses -> addresses. No functional change.
Signed-off-by: Marek Vasut <[email protected]>
Acked-by: Ilias Apalodimas <[email protected]>
|
|
https://source.denx.de/u-boot/custodians/u-boot-snapdragon into next
- SM6125 gains initial support
- The qcom clock drivers get better support for configuring UFS clocks
- ufetch gets some aesthetic improvements
- A minor bug in the qcm2290 clock driver is fixed
- A few qcom drivers get static/constified
- The GENI serial driver has the RX watermark register properly set
|
|
Add initial support for the lemans EVK platform based on lemans SoC.
Define memory layout statically.
Signed-off-by: Aswin Murugan <[email protected]>
Signed-off-by: Sumit Garg <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Casey Connolly <[email protected]>
|
|
Change to not use NXP_RECOG fuse, but detect part number according
to feature disable fuses and SPEED fuse.
Signed-off-by: Ye Li <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
|
|
Add config.h to fix CAAM_BASE_ADDR undeclared build error when
CONFIG_CMD_PRIBLOB enabled.
Signed-off-by: Ye Li <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
|
|
Update node path for 5.10 Kernel.
- aips-bus renamed to bus
- gpmi-nand renamed to nand-controller
cherry picked from https://github.com/nxp-imx/uboot-imx,
tag lf-6.12.3-1.0.0,
commit feb8178e97d4 ("LF-2637 mx6: fuse: update node path")
add changes node path for Linux 6.13
Signed-off-by: Peng Fan <[email protected]>
Signed-off-by: Max Merchel <[email protected]>
|
|
The RGPIO2P driver contains legacy handling for compatible combinations
that expose two reg ranges (dual base) for i.MX8ULP and i.MX93.
The i.MX95 GPIO controller exposes a single register range, so the
dual-base handling is unnecessary.
Additionally, the second address of the gpio1 reg property was wrong.
When used, it needs to be offsetted by 0x40 to start at the Port Data
Output register.
Fixes: 60d8255d8dc0 ("board: toradex: add Toradex Verdin iMX95")
Signed-off-by: Antoine Gouby <[email protected]>
|
|
The RGPIO2P driver contains legacy handling for compatible combinations
that expose two reg ranges (dual base) for i.MX8ULP and i.MX93.
The i.MX95 GPIO controller exposes a single register range, so the
dual-base handling is unnecessary.
Signed-off-by: Antoine Gouby <[email protected]>
|
|
Call qb save automatically in the board-specific
spl_board_init(), if SPL_IMX_QB option is enabled.
This makes sure qb_save is called before any image
loading is done by the SPL. This option is also
suitable for the case where U-Boot proper is
missing (Falcon mode).
qb save refers to saving DDR training data to NVM,
so that OEI runs Quickboot flow on next reboot,
skipping full training and achieveing a lower boot
time.
Signed-off-by: Simona Toaca <[email protected]>
|
|
This command exposes 3 methods:
- check -> checks if the data in volatile memory is valid
(integrity check)
- save -> saves the data to non-volatile memory and
erases the data in volatile memory
- erase -> erases the data in non-volatile memory
cmd_qb can be used either directly in the U-Boot console
or in an uuu script to save the QB data during flashing.
It supports specifying a different boot medium than the
current boot device for saving the data.
Signed-off-by: Viorel Suman <[email protected]>
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Simona Toaca <[email protected]>
|
|
DDR training data can be saved to NVM and be available
to OEI at boot time, which will trigger QuickBoot flow.
U-Boot only checks for data integrity (CRC32), while
OEI is in charge of authentication when it tries to
load the data from NVM.
On iMX95 A0/A1, 'authentication' is done via another
CRC32. On the other SoCs, authentication is done by
using ELE to check the MAC stored in the ddrphy_qb_state
structure.
Supported platforms: iMX94, iMX95, iMX952 (using OEI)
Supported storage types: eMMC, SD, SPI flash.
Signed-off-by: Viorel Suman <[email protected]>
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Simona Toaca <[email protected]>
|
|
When loading container image, the container header is loaded into
heap memory. If ahab is enabled, the header is be copied to another
fixed RAM for authentication in ahab_auth_cntr_hdr. The better method
is using container header memory being authenticated for following
image loading.
So update ahab_auth_cntr_hdr to return the address of container header
being authenticated. Caller uses this header for following parsing
and image loading.
Signed-off-by: Ye Li <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
|
|
The break is missed for ARM_PLL_CLK in get_clk_src_rate.
Signed-off-by: Ye Li <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
|
|
When ROM boots from secondary container set, SPL should select
correct offset to load u-boot-atf container.
The implementation uses ROM passover information:
1) For non-eMMC boot partition device, use image offset in ROM
passover data to get u-boot-atf container offset.
2) For eMMC boot partition device, use boot stage (secondary)
in ROM passover data to select correct eMMC boot partition
for u-boot-atf container.
Signed-off-by: Ye Li <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
|
|
Implement the 'getprisec' subcommand of 'bmode' command for i.MX95 by
reading out the ROM log events. This event is set by the BootROM if it
switched to the secondary copy due to primary copy being corrupted.
Signed-off-by: Fedor Ross <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
|
|
Query the SM via SCMI, obtain rom_passover_t->img_set_sel and based on
that, add 0 or 0x400000 offset (A or B copy offset) to boot container
read address.
Signed-off-by: Marek Vasut <[email protected]>
Signed-off-by: Fedor Ross <[email protected]>
|
|
imx8m[m,n]-beacon-baseboard.dtsi was missed to be deleted in
commit f5585124c90a ("arm64: imx: imx8mm-beacon: Migrate to OF_UPSTREAM")
commit a64feb974f66 ("arm64: imx: imx8mn-beacon: Migrate to OF_UPSTREAM")
arch/arm/dts/imx8mn-evk.dtsi was missed to be deleted in
commit 73d57e0aa45f ("imx: imx8mn-evk: convert to OF_UPSTREAM")
Drop them.
Signed-off-by: Peng Fan <[email protected]>
|
|
scripts/Makefile.lib already handles the including path for imx8mq.dtsi
from dts/upstream. No need to keep a copy in arch/arm/dts/, and there
is very minimal changes compared with the one in dts/upstream, so remove
the copy.
Signed-off-by: Peng Fan <[email protected]>
|
|
arch/arm/dts/imx8mq-kontron-pitx-imx8m.dts is almost same as upstream Linux
dts, so switch to OF_UPSTREAM by dropping the U-Boot copy of the dts,
enabling OF_UPSTREAM and updating CONFIG_DEFAULT_DEVICE_TREE.
Signed-off-by: Peng Fan <[email protected]>
|
|
arch/arm/dts/imx8mq-librem5-r[4,3].dts is almost same as upstream Linux dts,
and arch/arm/dts/imx8mq-librem5.dtsi is out of sync with upstream linux
dts, but it should not break U-Boot after using OF_UPSTREAM. So switch to
OF_UPSTREAM by dropping the U-Boot copy of the dts, enabling OF_UPSTREAM and
updating CONFIG_DEFAULT_DEVICE_TREE.
Signed-off-by: Peng Fan <[email protected]>
|
|
arch/arm/dts/imx8mq-pico-pi.dts is almost same as upstream Linux dts,
so switch to OF_UPSTREAM by dropping the U-Boot copy of the dts,
enabling OF_UPSTREAM and updating CONFIG_DEFAULT_DEVICE_TREE.
Signed-off-by: Peng Fan <[email protected]>
|
|
arch/arm/dts/imx8mq-phanbell.dts is almost same as upstream Linux dts,
so switch to OF_UPSTREAM by dropping the U-Boot copy of the dts,
enabling OF_UPSTREAM and updating CONFIG_DEFAULT_DEVICE_TREE.
Signed-off-by: Peng Fan <[email protected]>
|
|
arch/arm/dts/imx8mq-mnt-reform2.dts are almost same as upstream Linux
imx8mq-mnt-reform2.dts, so switch to OF_USPTREAM for this board, with
only updating imx8mq-mnt-reform2-u-boot.dtsi to keep "simple-panel"
compatible string for display panel.
Signed-off-by: Peng Fan <[email protected]>
|
|
The shared LX2160A board file calls helpers that only exist when
their subsystem is enabled. Gate them on the matching CONFIG_*:
- pci_init() under CONFIG_PCI.
- fdt_fixup_mc_ddr() and fsl_rgmii_init() under CONFIG_FSL_MC_ENET.
- qixis_*() and the QIXIS branch of checkboard() under
CONFIG_FSL_QIXIS; cpu_name(buf) moves out so the non-QIXIS path
still prints "Board: <name>".
- EVENT_SPY_SIMPLE on init_func_vid moves inside the
CONFIG_VOL_MONITOR_LTC3882_READ guard (was outside, dangling
symbol when LTC3882 off).
#if / #ifdef, not IS_ENABLED(), because the helpers are themselves
conditionally compiled.
While here, lx2160a_common.h: fix BOOT_TARGET_DEVICES_MMC
1 arg vs 2 args and gate the MMC target on CONFIG_CMD_MMC,
not CONFIG_MMC.
No functional change for NXP boards: LX2160ARDB, LX2160AQDS, or
LX2162AQDS, but mainly build clean up in order to support
other NXP lx2160a boards without those HW dependencies.
Signed-off-by: Vincent Jardin <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
|
|
Switch to the upstream device tree, which already includes the UART
nodes we need for the DM.
We also need to increase malloc area before relocation otherwise you'll
get the following error and the board panics:
DRAM: Initializing....using SPD
alloc space exhausted ptr 414 limit 400
Signed-off-by: Michael Walle <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
|
|
For non-secure boot environments pamu_init() isn't called but the CAAM
will still call sec_config_pamu_table() -> config_pamu() which then uses
an uninitialized ppaact variable. In fact, that variable is initialized
with 0, so the config_pamu() will happily assume the structure is there
and will operate on that memory. Call pamu_init() in the non-secure boot
case, too.
Signed-off-by: Michael Walle <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
|
|
The combined boot firmware firmware-aquila-am69-gp.bin depends on
tiboot3-am69-gp-aquila.bin, which in turn requires the GP variant
of the TI system firmware blob (ti-fs-firmware-j784s4-gp.bin).
Fix the combined boot firmware image build by adding the missing binman
nodes.
Fixes: f62d4535cf17 ("arm: dts: k3-am69-aquila: add combined boot firmware image")
Signed-off-by: Emanuele Ghidoli <[email protected]>
Reviewed-by: Francesco Dolcini <[email protected]>
Reviewed-by: Neha Malcom Francis <[email protected]>
|
|
https://source.denx.de/u-boot/custodians/u-boot-stm
CI: https://source.denx.de/u-boot/custodians/u-boot-stm/-/pipelines/30081
- reset: stm32: Fix compilation error
- Remove remaining non-existant STM32_RESET flag
- configs: stm32mp13: Add SPI-NAND UBI boot support
- Support metadata-driven A/B boot for STM32MP25
|
|
Apple's M3 SoC is similar to M1 and M2 but uses a different memory map.
The main difference is that RAM starts at 0x100_0000_0000 like on t600x
and t602x (M1 and M2 Pro/Max/Ultra). Otherwise IO blocks have been
rearranged.
U-boot's existing drivers are compatible with the hardware and M3 device
trees will carry "apple,t8103-*" compatible strings. Only
apple-atcphy-reset might need a new compatible due to USB4 / DisplayPort
changes the Linux driver has to deal with.
Signed-off-by: Janne Grunau <[email protected]>
Acked-by: Mark Kettenis <[email protected]>
|
|
Janne Grunau <[email protected]> says:
The Linux device trees for Apple silicon devices cover now most of the
hardware as u-boot's internal device trees for M1 devices. Linux has in
addition device trees M2 and M1 and M2 Pro/Max/Ultra devices which were
never added in u-boot.
The most common use case for u-boot on Apple silicon devices does not
use DTBs from u-boot but passes runtime modified device trees from an
earlier boot loader (m1n1).
This change regresses support for the SPI on M1 and M1 Pro/Max notebooks
as SPI keyboard support is not in upstream Linux. This regression is in
my opinion acceptable due to the limited use of u-boot's DTBs for these
targets.
Link: https://lore.kernel.org/r/[email protected]
|
|
The device tree on Apple silicon devices is passed from a previous
bootloader stage. The bootloader fills in dynamic information so
u-boot can not use its own device tree.
As documented in doc/board/apple/m1.rst it is possible to build boot
bundles (bootloader + device tree + gzipped u-boot binary). These are
useful for testing.
Instead of using u-boot's own device trees for M1 (t8103) devices use
upstream device trees from dts/upstream/src/arm64/apple. The u-boot
device trees have not seen updates since 2022. The upstream linux device
trees have feature parity for the M1 devices. In addition linux has
device trees for M1 Pro/Max/Ultra, M2 and M2 Pro/Max/Ultra devices.
Keep t8103-j274 as default device tree to avoid further updates.
Signed-off-by: Janne Grunau <[email protected]>
Acked-by: Mark Kettenis <[email protected]>
|
|
The main use case for u-boot on Apple silicon based devices is to
provide an EFI based bootloader for operating systems. This uses a
generic u-boot image with DTBs passed from an earlier boot loader
(m1n1). Use the generic board name "mac" for this purpose.
Signed-off-by: Janne Grunau <[email protected]>
|
|
Add nodes to the binman configuration to create single binaries that
combine tiboot3-am69-*-aquila.bin, tispl.bin and u-boot.img into
firmware-aquila-am69-*.bin, with the proper offsets.
These binaries can be used to flash U-Boot via a single binary of three,
as it is done now.
Signed-off-by: Ernest Van Hoecke <[email protected]>
Reviewed-by: Neha Malcom Francis <[email protected]>
Acked-by: Francesco Dolcini <[email protected]>
|
|
Symbol CONFIG_STM32_RESET does not exist.
Don't select it.
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Quentin Schulz <[email protected]>
|
|
Udit Kumar <[email protected]> says:
Add a necessary hardware errata workaround for J721S2 and J784S4.
Bootlogs
https://gist.github.com/uditkumarti/da2a489a78d3241ecd2791c9df1c1317
Link: https://lore.kernel.org/r/[email protected]
|
