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After opening pathname, we must close ifd once we are done with it.
Fixes: b9274095c2c ("sandbox: Add a way to map a file into memory")
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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The H616 SoC family has support for several types of DRAM: DDR3,
LPDDR3, DDR4 and LPDDR4.
At the moment, the driver only supports DDR3 and LPDDR3 memory.
Let's extend the driver to support the LPDDR4 memory. This type
of memory widely used in device with T507(-H) SoC and new orangepi
zero3 with H618.
The compatibility with T507 is not yet complete, because there
is difference in the phy_init array.
The LPDDR4-2133 timings correspond to DRAM Rayson RS1G32LO4D2BDS-53BT
found on the NOR SPI from the Orangepi Zero 3 4GB.
Signed-off-by: Mikhail Kalashnikov <[email protected]>
Tested-by: Piotr Oniszczuk <[email protected]>
Reviewed-by: Jernej Skrabec <[email protected]>
Acked-by: Andre Przywara <[email protected]>
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The original H616 DDR3 ODT configuration code wrote board specific values
into a sequence of paired registers.
For LPDDR3 support we needed to special-case one group of registers,
because for that DRAM type we need to write 0 into the lower register of
each pair. That already made the code less readable.
LPDDR4 support will make things even messier, so let's refactor that
code now: We allow to write different values into the lower and upper
half of each pair. The masking is moved into a macro, and use in each
write statement.
The effect is not as obvious yet, as we don't need the full flexibility at
the moment, but the motivation will become clearer with LPDDR4 support.
Signed-off-by: Andre Przywara <[email protected]>
Reviewed-by: Jernej Skrabec <[email protected]>
Reviewed-by: Mikhail Kalashnikov <[email protected]>
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On boards using the AXP313 PMIC, the DRAM rail is often not setup
correctly at reset time, so we have to program the PMIC very early in
the SPL, before running the DRAM initialisation.
Add a simple AXP313 PMIC driver that knows about DCDC2(CPU) and
DCDC3(DRAM), so that we can bump up the voltage before the DRAM init.
Signed-off-by: Andre Przywara <[email protected]>
Acked-by: Jernej Skrabec <[email protected]>
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Add board support for ICnova A20 SomPi compute module on
ICnova ADB4006 development board.
Specification:
SoM
- Processor: Allwinner A20 Cortex-A7 Dual Core at 1GHz
- 512MB DDR3 RAM
- Fast Ethernet (Phy: Realtek RTL8201CP)
ADB4006
- I2C
- 2x USB 2.0
- 1x Fast Ethernet port
- 1x SATA
- 2x buttons (PWRON, Boot)
- 2x LEDS
- serial console
- HDMI
- µSD-Card slot
- Audio Line-In / Line-Out
- GPIO pinheaders
https://wiki.in-circuit.de/index.php5?title=ICnova_ADB4006
https://wiki.in-circuit.de/index.php5?title=ICnova_A20_SODIMM
devicetree upstreamed with linux 6.5
Signed-off-by: Ludwig Kormann <[email protected]>
Reviewed-by: Andre Przywara <[email protected]>
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The MMC controller driver is (and ought to be) the only user of these
register definitions. Put them in a header next to the driver to remove
the dependency on a specific ARM platform's headers.
Due to the sunxi_mmc_init() prototype, the file was not renamed. None of
the register definitions were changed.
Signed-off-by: Samuel Holland <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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To quote the author:
Since commit [1], Ethernet is broken on TI AM62 and AM64 platforms.
The commit [1] is not the culprit. It just unearths the problem by fixing
the error check in k3-udma.c. This issue was silently being ignored earlier
due to wrong error check. [NULL instead of FDT_ADDR_T_NONE].
Fix the issue by adding the necessary register spaces for the u-boot K3-UDMA
driver for AM62 and AM64 platforms.
These properties will eventually make it into the SoC DTSi files [2] after
which these can be dropped from k3-*-u-boot.dtsi files.
[1] - 5fecea171de3dd ("treewide: use dev_read_addr_*_ptr() where appropriate")
[2] - https://lore.kernel.org/linux-arm-kernel/[email protected]/
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Update main_bcdma and main_pktdma nodes for native configuration in the
absence of DM services.
Drop duplicate main_pktdma node in k3-am642-sk-u-boot.dtsi.
Reported-by: Nishanth Menon <[email protected]>
Signed-off-by: Siddharth Vadapalli <[email protected]>
Signed-off-by: Roger Quadros <[email protected]>
Reviewed-by: Nishanth Menon <[email protected]>
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Update main_bcdma and main_pktdma nodes for native configuration in the
absence of DM services. u-boot k3-udma driver expects these additional
register fields else probe will fail.
Reported-by: Nishanth Menon <[email protected]>
Signed-off-by: Roger Quadros <[email protected]>
Reviewed-by: Nishanth Menon <[email protected]>
Tested-by: Marcel Ziswiler <[email protected]>
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Update main_bcdma and main_pktdma nodes for native configuration in the
absence of DM services.
Reported-by: Nishanth Menon <[email protected]>
Signed-off-by: Siddharth Vadapalli <[email protected]>
Signed-off-by: Roger Quadros <[email protected]>
Reviewed-by: Nishanth Menon <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-stm
_ Fix compilation issue when SYS_DCACHE_OFF and/or SYS_DCACHE_SYS are enabled
_ Fix issue following DT sync with kernel 6.3 for stm32mp15xx-ev1 and DHSOM SoM
_ Enable TCP, IPv6, wget on DH STM32MP15 DHSOM
_ Limit u-boot.itb size to 0x160000 bytes on DH STM32MP15 DHSOM
_ Read auth stats and boot_partition from tamp
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- Fix some issues Coverity has reported, update MAINTAINERS file,
another bootstd fix, typo fix in error message, gitignore fix and
update TI's URL in many places.
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Replace instances of http://www.ti.com with https://www.ti.com
Signed-off-by: Nishanth Menon <[email protected]>
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Keep track of the re-entries with help of the lr register.
This binary can be re-used and called from various BROM functions.
Only when it's called from the part that handles SPI, NAND or EMMC
hardware it needs to early return to BROM ones.
In download mode when it handles data on USB OTG and UART0
this section must be skipped.
Unlike newer Rockchip SoC models the rk3066 BROM code does not have built-in
support to enter download mode on return to BROM. This binary must check
the boot mode register for the BOOT_BROM_DOWNLOAD flag and reset if it's set.
It then returns to BROM to the end of the function that reads boot blocks.
From there the BROM code goes into a download mode and waits for data
on USB OTG and UART0.
Signed-off-by: Johan Jonker <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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Provide configuration to read cpuid and generate a persistent
MAC address in ethaddr
Signed-off-by: Tim Lunn <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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RV1126 fails to boot on 2024.01-rc1.
Commit 9e644284ab81 ("dm: core: Report bootph-pre-ram/sram node as
pre-reloc after relocation") changed the behaviour of bootph-pre-ram, to
limit nodes to spl phase. This caused rv1126 boards to fail to boot with
the current dts.
This patch updates the pmu/grf nodes to bootph-all tags as they are
needed in all phases. This fixes the boot issue on rv1126 boards.
Signed-off-by: Tim Lunn <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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Obtain from TAMP backup register information about image authorization
status and partition id used for booting. Store this info in
environmental variables ("boot_auth" and "boot_part" correspondingly).
Image authorization supported values:
0x0 - No authentication done
0x1 - Authentication done and failed
0x2 - Authentication done and succeeded
These values are stored to TAMP backup register by Trusted Firmware-A [1].
Testing:
STM32MP> print boot_part
boot_part=1
STM32MP> print boot_auth
boot_auth=2
[1] https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git/commit/?h=refs/heads/integration&id=ab2b325c1ab895e626d4e11a9f26b9e7c968f8d8
Signed-off-by: Igor Opaniuk <[email protected]>
Co-developed-by: Oleksandr Suvorov <[email protected]>
Signed-off-by: Oleksandr Suvorov <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
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The patch fixed by this commit renders ST STM32MP15xx EV1 board and
all DHSOM SoM based boards unbootable from SPI NOR. Fix the damage
by updating -u-boot.dtsi to match the stm32mp15-pinctrl.dtsi update.
Fixes: 08002ffd083d ("ARM: dts: stm32mp: alignment with v6.3")
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
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SYS_DCACHE_SYS are enabled
While 23e20b2fa6 ("arm: stm32mp: Fix compilation issue when
SYS_DCACHE_OFF and/or SYS_DCACHE_SYS are enabled") tried fixing
this issue, fix it really by adding #if checks for SYS_ICACHE_OFF
and SYS_DCACHE_OFF.
Cc: Patrice Chotard <[email protected]>
Cc: Patrick Delaunay <[email protected]>
Signed-off-by: Bhupesh Sharma <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
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QuartzPro64 is a Rockchip RK3588 based SBC by Pine64.
UART and boot over SD/eMMC/RJ45 are tested to work.
Linux commits from next-20231013:
8152d3d070a9 ("arm64: dts: rockchip: Add QuartzPro64 SBC device tree")
Signed-off-by: Tom Fitzhenry <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
Cc: Eugen Hristev <[email protected]>
Cc: Jonas Karlman <[email protected]>
Cc: Ondrej Jirman <[email protected]>
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Based on discussion with DT folks at link below there is not going to be
any name restrictions for child names. That's why add description for
current nvmem layout.
Link: https://lore.kernel.org/lkml/[email protected]/
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/af81299cafc2bd13ed30dcd69bdf6efb5fbb7f68.1698840373.git.michal.simek@amd.com
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Xilinx is using standard mtd partition layout for quite a long time. It is
used for testing purpose on evaluation boards.
Also #address/size-cells shouldn't be present without nodes which should
use them that's why move them from zynq-7000.dtsi to nand/nor nodes
directly.
The patch was tested on zc706 and zedboard(with also increasing max
frequency and rx bus width).
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/4c3348981bba32d3892194420d78fe8621c47534.1698837725.git.michal.simek@amd.com
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SMMU is disabled by default and not all masters can be enabled at the same
time because of limited number of entries. That's why comment all iommu
properties but keep them for reference in DT. In XEN case they should be
added back and Xen should have SMMU enabled by default.
Also add IDs for DP and DPDMA.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/e868c27c52ded5d8ef25f75ba394b1ab3b31b80a.1698825657.git.michal.simek@amd.com
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Mini U-Boot is running out of OCM and it's only purpose is to program non
volatile memories. There are different configurations which ospi/qspi can
be that's why describe them via DT.
DT binding is already approved that's why there is no reason not to add it.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/a99a8d72201a782fc811715942dea97fb5ab583b.1698329087.git.michal.simek@amd.com
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Mini U-Boot is running out of OCM and it's only purpose is to program non
volatile memories. There are different configurations which ospi/qspi can
be that's why describe them via DT.
DT binding is already approved that's why there is no reason not to add it.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/9518ab1c4299a45e800b8611172edd78c9243132.1698329087.git.michal.simek@amd.com
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Mini U-Boot is running out of OCM and it's only purpose is to program non
volatile memories. There are different configurations which qspi can be
that's why describe them via DT.
DT binding is already approved that's why there is no reason not to add it.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/e7d31a9d9c4a76e171eefc619f31fabd0831a614.1698329087.git.michal.simek@amd.com
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Mini U-Boot is running out of OCM and it's only purpose is to program non
volatile memories. There are different configurations which qspi can be
that's why describe them via DT.
DT binding is already approved that's why there is no reason not to add it.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/28b3cdd7e91b2b4c3c36d0bf65aa5bac042f248c.1698329087.git.michal.simek@amd.com
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Use tabs instead of space for entry indentation which is standard coding
style.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/ff28e719de82258c066f1fedae87f88597f367b5.1698302068.git.michal.simek@amd.com
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Describe flash memories based on the latest DT binding.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/cddf2909d0445eba08b998d42ffc31c1fa3132b9.1698045694.git.michal.simek@amd.com
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gpio38 is used in SOM's kv260 to reset the Ethernet PHY.
At present, HW reset is not working properly as Tri-state
is enabled for MIO38, causing inappropriate PHY register reads.
Disabled Tri-state for MIO38 to make HW reset work.
Tri-state disable :
ZynqMP> md 0xFF180208 2
ff180208: 00bfe7a3 00000540
Tri-state enable :
ZynqMP> md 0xFF180208 2
ff180208: 00bfe7e3 00000540
Signed-off-by: Tejas Bhumkar <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
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Except for Linux no other component (i.e., u-boot, fsbl or BootRom) of the
software stack supports software ecc engine. So, make hw-ecc as the default
ecc mode.
Signed-off-by: Amit Kumar Mahapatra <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/f47b95616eb40d3a9908ca60df94ec6e873b071c.1697119098.git.michal.simek@amd.com
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To sync up with the upstream bulk-stream feature, removed
'snps,xhci-stream-quirk' DT property for usb.
Signed-off-by: Piyush Mehta <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/1f4ecfe3ea6a4d0d8d8de324f5dffd3efc86656a.1697115523.git.michal.simek@amd.com
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Remove unused address/size-cells which is also done upstream that's why
this is pretty much sync patch with upstream.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/0ca8d8fe245ad7cb665f5333202d83f70acfc11f.1697115523.git.michal.simek@amd.com
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This reverts commit d59fac2f3f247470708a1aed1af96802a05e0e61.
This power domain shouldn't be enabled by default. Power domain behavior
should be handled on case by case basis. Adding this property to
zynqmp.dtsi is breaking some suspend/resume cases that's why remove it
from this file.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/7ed2a46383c6918fbbaca2d618459b1ee58f865c.1697115523.git.michal.simek@amd.com
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AES can be discovered via firmware interface that's why remove node for it.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/eaf575a6ca92f8c10cefb447c08c1292025deb74.1697115523.git.michal.simek@amd.com
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All boards have been converted to use mdio node that's why move ethernet
phys under mdio node too.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/6c60f5d29b9d9992bd0130fd263c8ed13cb8166c.1697115523.git.michal.simek@amd.com
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fclk will never go upstream that's why removing this node from DT.
All PL (programmable logic) based IPs should handle clocks self without
using this workaround.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/fbb8665b8a58dbe96349abfe5492a509939e165b.1697098930.git.michal.simek@amd.com
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The baudrate configured in .config is taken by default by serial. If
change of baudrate is required then the .config needs to changed and
u-boot recompilation is required or the u-boot environment needs to be
updated.
To avoid this, support is added to fetch the baudrate directly from the
device tree file and update.
The serial, prints the log with the configured baudrate in the dtb.
The commit c4df0f6f315c ("arm: mvebu: Espressobin: Set default value for
$fdtfile env variable") is taken as reference for changing the default
environment variable.
The default environment stores the default baudrate value, When default
baudrate and dtb baudrate are not same glitches are seen on the serial.
So, the environment also needs to be updated with the dtb baudrate to
avoid the glitches on the serial.
Also add test to cover this new function.
Signed-off-by: Algapally Santosh Sagar <[email protected]>
Signed-off-by: Venkatesh Yadav Abbarapu <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
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This adds support for the Inteno XG6846 board based on the
Broadcom MIPS 6328 SoC.
The default boot will read a uImage from flash and boot it.
Reviewed-by: Daniel Schwierzeck <[email protected]>
Signed-off-by: Linus Walleij <[email protected]>
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Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Board specific late init allows vendors to set up different device
or board specific env variables (like serial number, platform name).
In case this information is missing, u-boot will lack info regards
serial or platform.
To avoid this prior nvidia_board_late_init internal generic function
is called which fills required data. In this case platform name is
obtained from get_chip and serialno is filled with SoC id.
Though SoC id is not dedicated to be devices serial but it fits well
in case of restriction of data about device and since SoC is basically
a main chip of the device.
Tested-by: Andreas Westman Dorcsak <[email protected]> # ASUS Transformers
Tested-by: Svyatoslav Ryhel <[email protected]> # Nvidia Tegratab
Signed-off-by: Svyatoslav Ryhel <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Re-crypt support was extended to devices without burnt SBK. In case
SBK is not set, place from where it is read is filled with zeroes.
This patch adds support for ebtupdate function to detect nosbk device
and avoid crypto operations for it.
Tested-by: Maksim Kurnosenko <[email protected]>
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Tegra 4, same as Tegra 3, requires configuration of CPU and CORE
voltages in the SPL stage to boot properly. Expose function to be
able perform this configuration in the SPL section of the device
board.
Tested-by: Svyatoslav Ryhel <[email protected]> # ASUS TF701T
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Clean up the tree and prepare for DM PMIC migration.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Clean up the tree and prepare for DM PMIC migration.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Clean up the tree and prepare for DM PMIC migration.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Clean up the tree and prepare for DM PMIC migration.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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TF201 unlike other transformers uses non-fused xcvr value for
its dock USB port. With out it dock USB and SD reader will not
work.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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TF600T has significant differences (Tegra DSI and DSI panel,
own power supply system) which makes use of common transformer
device tree complicated.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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P1801-T has significant differences (hdmi panel and backlight,
own power supply system) which makes use of common transformer
device tree complicated.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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