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Enable watchdog on zcu100 to make sure if there is a bug in the u-boot
there is proper reset.
Watchdog expires and PMU fw is informed and based on setting proper
action is taken.
The patch is enabling reset-on-timeout feature and also fixing fixed
clock rate for watchdog where 100MHz is max (and also default) clock value.
Signed-off-by: Michal Simek <[email protected]>
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This patch enables support zc1275 revB board. It has
SD added compared to revA. The same configuration will
work for RevC boards aswell.
Signed-off-by: Siva Durga Prasad Paladugu <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
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Now that showing silicon version is part of the CPU
info display, let's remove checkboard().
Note that the generic show_board_info() will still
show the DT 'model' property. For instance:
U-Boot 2018.05-rc2-00025-g611b3ee0159b (Apr 19 2018 - 11:23:12 +0200)
CPU: Zynq 7z045
Silicon: v1.0
Model: Zynq ZC706 Development Board
I2C: ready
Based on patches from Ariel D'Alessandro <[email protected]>,
and Ezequiel Garcia <[email protected]>
mini configuration doesn't need to show this information.
Signed-off-by: Michal Simek <[email protected]>
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This commit moves the FPGA descriptor definition
to mach-zynq, where it makes more sense.
Based on patches from Ariel D'Alessandro <[email protected]>
and Ezequiel Garcia <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
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In past this code was commented and was used for debug purpose.
But there is no reason not to enabled it based on macros.
Signed-off-by: Michal Simek <[email protected]>
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find_next_zero_bit() incorrectly handles cases when:
- total bitmap size < 32
- rest of bits to process
static inline int find_next_zero_bit(void *addr, int size, int offset)
{
unsigned long *p = ((unsigned long *)addr) + (offset >> 5);
unsigned long result = offset & ~31UL;
unsigned long tmp;
if (offset >= size)
return size;
size -= result;
offset &= 31UL;
if (offset) {
tmp = *(p++);
tmp |= ~0UL >> (32-offset);
if (size < 32)
[1]
goto found_first;
if (~tmp)
goto found_middle;
size -= 32;
result += 32;
}
while (size & ~31UL) {
tmp = *(p++);
if (~tmp)
goto found_middle;
result += 32;
size -= 32;
}
[2]
if (!size)
return result;
tmp = *p;
found_first:
[3] tmp |= ~0UL >> size;
^^^ algo can reach above line from from points:
[1] offset > 0 and size < 32, tmp[offset-1..0] bits set to 1
[2] size < 32 - rest of bits to process
in both cases bits to search are tmp[size-1..0], but line [3] will simply
set all tmp[31-size..0] bits to 1 and ffz(tmp) below will fail.
example: bitmap size = 16, offset = 0, bitmap is empty.
code will go through the point [2], tmp = 0x0
after line [3] => tmp = 0xFFFF and ffz(tmp) will return 16.
found_middle:
return result + ffz(tmp);
}
Fix it by correctly seting tmp[31..size] bits to 1 in the above case [3].
Fixes: 81e9fe5a2988 ("arm: implement find_next_zero_bit function")
Signed-off-by: Grygorii Strashko <[email protected]>
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The clock node is used by the serial driver and it's needed
before relocation.
This patch ensures that the msm-serial driver can actually
use the clock node.
Signed-off-by: Ramon Fried <[email protected]>
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STiH410 has 2 PHYs wired on the DWC3 IP, USB2 and USB3 PHYs.
As currently no U-boot driver is available for the USB3 PHY and to avoid
issue during DWC3 drive probe, we use DWC3 IP with only USB2 PHY
using stih410-b2260-u-boot.dtsi file.
Fixes: 2fd4242cc50e ("ubs: xhci-dwc3: Enable USB3 PHY when available")
Signed-off-by: Patrice Chotard <[email protected]>
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Add vrefbuf device tree node. This allows to get
a voltage reference for ADCs.
Signed-off-by: Patrice Chotard <[email protected]>
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Add regulator nodes needed by stpmu1 regulator driver
Add vmmc-supply and vqmmc-supply regulator property for
sdmmc1 and sdmmc2.
Signed-off-by: Christophe Kerello <[email protected]>
Signed-off-by: Patrice Chotard <[email protected]>
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Add SoC power regulator entry for reg11, reg18 and usb33
regulator.
Signed-off-by: Patrice Chotard <[email protected]>
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This driver binds and manages the following regulator of
SoC's PWR block :
- reg11
- reg18
- usb33
Signed-off-by: Patrick Delaunay <[email protected]>
Signed-off-by: Patrice Chotard <[email protected]>
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Since kirkwook SPI was recently converted to DM, add compatible strings
to the SPI flash devices to make them work with the new driver.
Signed-off-by: Mario Six <[email protected]>
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'commit dda0bd674481 ("arm: dra762: Add support for device package identification")'
introduces ABZ and ACD package identification.
This patch is to extend usage of "fastboot getvar cpu" for
DRA76x ABZ and ACD devices.
Helps in fixing the boot warning.
Warning: fastboot.cpu: unknown CPU rev: 123863298
on
CPU : DRA762-GP ES1.0 ABZ package
Model: TI AM5748 IDK
Board: AM574x IDK REV 1.0A
Signed-off-by: Praneeth Bajjuri <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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When a pin is muxed to a peripheral or as a GPIO, the only
configuration that can be set is the pullup. It is too restrictive
so this patch allows to give a full configuration.
Signed-off-by: Ludovic Desroches <[email protected]>
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Macros for drive strength configuration were missing.
Signed-off-by: Ludovic Desroches <[email protected]>
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Synchronize the Linux Device Tree for Amlogic Meson GX boards from Linux 4.16.0.
Signed-off-by: Neil Armstrong <[email protected]>
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Taking into account the Amlogic Family name starts with GX, including
the GXBB, GXL and GXM SoCs.
Signed-off-by: Neil Armstrong <[email protected]>
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Add two more gpio-leds to sandbox test device tree with default-state
property set to "on"/"off".
Add dm_test_led_default_state() to check that these new LED's are set to
LEDST_ON and LEDST_OFF.
dm: led: add testcase for "default-state" property
Add two more gpio-leds to sandbox test device tree with default-state
property set to "on"/"off".
Add dm_test_led_default_state() to check that these new LED's are set to
LEDST_ON and LEDST_OFF.
Signed-off-by: Patrick Bruenn <[email protected]>
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Cache maintenance procedure is same for v7A and v7R
processors. So re-use cache-cp15.c file except for
mmu parts.
Tested-by: Michal Simek <[email protected]>
Signed-off-by: Lokesh Vutla <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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The Memory Protection Unit(MPU) allows to partition memory into regions
and set individual protection attributes for each region. In absence
of MPU a default map[1] will take effect. Add support for configuring
MPU on Cortex-R, by reusing the existing support for Cortex-M processor.
[1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0460d/I1002400.html
Tested-by: Michal Simek <[email protected]>
Signed-off-by: Lokesh Vutla <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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The Cortex-R* processors are a mid-range CPUs for use in deeply-embedded,
real-time systems. It implements the ARMv7-R architecture, and includes
Thumb-2 technology for optimum code density and processing throughput.
Except for MPU(Memory Protection Unit) and few CP15 registers, most of the
features are compatible with v7 architecture. So,reuse the same armv7
folder and introduce a new config CPU_V7R in order to differentiate
from v7 based platforms.
Tested-by: Michal Simek <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Signed-off-by: Lokesh Vutla <[email protected]>
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Certain ARM architectures like ARMv7-A, ARMv7-R has support for
enabling caches using CP15 registers. To have a common support
for all these architectures, introduce a Kconfig symbol
SYS_ARM_CACHE_CP15 that selects cache-cp15.c
Tested-by: Michal Simek <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Signed-off-by: Lokesh Vutla <[email protected]>
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Add a Kconfig entry for MMU and imply for all platforms using
cache-cp15.c containing MMU setup. Using imply instead of select so that
MMU can be disabled by defconfigs when not needed.
Tested-by: Michal Simek <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Signed-off-by: Lokesh Vutla <[email protected]>
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Currently CPU_V7 kconfig symbol supports only ARMv7A architectures under
armv7 folder. This led to a misconception of creating separate folders
for armv7m and armv7r. There is no reason to create separate folder for
other armv7 based architectures when it can co-exist with few Kconfig
symbols.
As a first step towards a common folder, rename CPU_V7 as CPUV7A. Later
separate Kconfig symbols can be added for CPU_V7R and CPU_V7M and
can co exist in the same folder.
Reviewed-by: Tom Rini <[email protected]>
Tested-by: Michal Simek <[email protected]>
Suggested-by: Alexander Graf <[email protected]>
Signed-off-by: Lokesh Vutla <[email protected]>
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Not all ARM V7 based cpus has VBAR for remapping
vector base address. So, update VBAR only if it available.
Reviewed-by: Tom Rini <[email protected]>
Signed-off-by: Lokesh Vutla <[email protected]>
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Like Linux, syscon_node_to_regmap() allows a node to work as a syscon
provider without binding it to a syscon driver. Test this.
Requested-by: Simon Glass <[email protected]>
Signed-off-by: Masahiro Yamada <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Currently, regmap_init_mem() takes a udevice. This requires the node
has already been associated with a device. It prevents syscon/regmap
from behaving like those in Linux.
Change the first argumenet to take a device node.
Signed-off-by: Masahiro Yamada <[email protected]>
Acked-by: Neil Armstrong <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Putting zero length array at the end of struct is a common technique
to embed arbitrary length of members. There is no good reason to let
regmap_alloc_count() branch by "if (count <= 1)".
As far as I understood the code, regmap->base is an alias of
regmap->ranges[0].start, but it is not helpful but make the code
just ugly.
Rename regmap_alloc_count() to regmap_alloc() because the _count
suffix seems pointless.
Signed-off-by: Masahiro Yamada <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
[trini: fixup cpu_info-rcar.c]
Signed-off-by: Tom Rini <[email protected]>
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This function is no more used, and replaced by psci_save
which save also context id as requested by PSCI requirements.
Even if the context id is not used by Linux, it should be saved
and restored in r0 when the CPU_ON is performed.
Signed-off-by: Patrick Delaunay <[email protected]>
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Replace the psci_save_target_pc call by the new function
psci_save(cpu, pc,context_id)
Signed-off-by: Patrick Delaunay <[email protected]>
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Replace the psci_save_target_pc call by the new function
psci_save(cpu, pc,context_id)
Signed-off-by: Patrick Delaunay <[email protected]>
Acked-by: Masahiro Yamada <[email protected]>
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Replace the psci_save_target_pc call by the new function
psci_save(cpu, pc,context_id)
Signed-off-by: Patrick Delaunay <[email protected]>
Reviewed-by: Stephen Warren <[email protected]>
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Replace the psci_save_target_pc call by the new function
psci_save(cpu, pc,context_id)
Signed-off-by: Patrick Delaunay <[email protected]>
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Replace the psci_save_target_pc call by the new function
psci_save(cpu, pc,context_id)
Signed-off-by: Patrick Delaunay <[email protected]>
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Add PSCI v1.0 support for Linux and manage PSCI state
for each CPU (affinity 0 level) with all mandatory functions:
- PSCI_VERSION
- CPU_SUSPEND
- CPU_OFF
- CPU_ON
- AFFINITY_INFO
- SYSTEM_OFF
- SYSTEM_RESET
- PSCI_FEATURES
and 1 optional to avoid Linux warning
- MIGRATE_INFO_TYPE
Signed-off-by: Patrick Delaunay <[email protected]>
Reviewed-by: CITOOLS <[email protected]>
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The added function psci_arch_cpu_entry() is called
during psci_cpu_entry() and can be used by arch to handle
PSCI state transition from ON_PENDING to ON.
The default weak function is empty: not behavior change.
Signed-off-by: Patrick Delaunay <[email protected]>
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Save and use the 3rd parameter of PSCI CPU_ON request: context_id.
The context_id parameter is only meaningful to the caller.
U-Boot PSCI preserves a copy of the value passed in this parameter.
Following wakeup from a powerdown state, U-BOOT PSCI places
this value in R0 when it first enters the OS.
NB: this context id is not (yet?) used by Linux but it is mandatory
to be PSCI compliant.
update armv7 psci functions:
- psci_save_target_pc(): keep for backward compatibility with
current platform (only save PC and force context id to 0)
=> should be removed when all platform migrate to the new API
- psci_save(): new API to use by ARMv7 platform with PSCI,
save pc (= entry_point_address) and context_id
Signed-off-by: Patrick Delaunay <[email protected]>
Reviewed-by: Stephen Warren <[email protected]>
Reviewed-by: Masahiro Yamada <[email protected]>
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When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.
In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.
This commit changes all instances where we have multiple licenses (in
these cases, dual license) declared in the SPDX-License-Identifier tag.
In this case we change from listing "LICENSE-A LICENSE-B" or "LICENSE-A
or LICENSE-B" or "(LICENSE-A OR LICENSE-B)" to "LICENSE-A OR LICENSE-B"
as per the Linux Kernel style document. Note that parenthesis are
allowed so when they were used before we continue to use them.
Reviewed-by: Fabio Estevam <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.
In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.
This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.
Signed-off-by: Tom Rini <[email protected]>
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Banana Pi BPI-M2 Berry is a quad-core mini single board computer
built with Allwinner V40 SoC. It features
- Quad Core ARM Cortex A7 CPU V40
- 1GB of RAM .
- microSD/SATA port..
- onboard WiFi and BT
- 4 USB A 2.0 ports
- 1 USB OTG port
- 1 HDMI port
- 1 audio jack
- DC power port
Signed-off-by: Jagan Teki <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
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Sync sun8i-r40.dtsi changes from Linux with
Merge: a406778618d0 088345fc3553
Author: Stephen Rothwell <[email protected]>
Date: Tue Apr 24 14:15:02 2018 +1000
Merge branch 'akpm/master'
Signed-off-by: Jagan Teki <[email protected]>
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omap-common cache enabling sequence relies on cpu_init_cp15()
(inside start.S) for enabling I-caches. But cpu_init_cp15()
can be skipped if CONFIG_SKIP_LOWLEVEL_INIT is defined. So
enable I-caches if not enabled already.
Debugged-by: Jean-Jacques Hiblot <[email protected]>
Tested-by: Steve Kipisz <[email protected]>
Signed-off-by: Lokesh Vutla <[email protected]>
Tested-by: Jean-Jacques Hiblot <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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Pull the symbol from the boards and zap struct rmobile_sysinfo as they
are rather useless. The entire purpose of that whole machinery was to
print board name in the CONFIG_ARCH_RMOBILE_BOARD_STRING. Do that in a
far simpler and more contained manner.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Nobuhiro Iwamatsu <[email protected]>
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Convert the symbol to Kconfig, no functional change.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Nobuhiro Iwamatsu <[email protected]>
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The dts Makefile entries for the H3 are not ordered correctly.
Move the Nano Pi entries before the Orange Pi so they are.
Signed-off-by: Chen-Yu Tsai <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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This patch adds a device tree file for the H5 version of the Libre
Computer Board ALL-H3-CC. It is the same board first introduced in
commit afe27544125e ("sunxi: Add support for Libre Computer Board
ALL-H3-CC H3 ver."), with the H3 SoC replaced with the H5 SoC, and
has 4Gb DDR3 chips instead of 2Gb ones.
The device tree utilizes the common board design file for ALL-H3-CC,
providing just the model strings and SoC specifics.
Signed-off-by: Chen-Yu Tsai <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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This patch adds a device tree file for the H2+ version of the Libre
Computer Board ALL-H3-CC. It is the same board first introduced in
commit afe27544125e ("sunxi: Add support for Libre Computer Board
ALL-H3-CC H3 ver."), with the H3 SoC replaced with the H2+ SoC, and
has only two 2Gb DDR3 chips instead of four.
The device tree utilizes the common board design file for ALL-H3-CC,
providing just the model strings and SoC specifics.
Signed-off-by: Chen-Yu Tsai <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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The Libre Computer Project ALL-H3-CC has three models, all using the
same board design, but with different pin compatible SoCs and amount of
DRAM.
Currently only the H3 1GB DRAM variant is supported. To support the two
other variants, first split the original device tree into a common board
design part and an SoC specific part.
The SoC part only defines which SoC is used and model name, and includes
the SoC specific dtsi file and the common design dtsi file.
Also fix up the SPDX identifier line to use the correct comment style,
and place it on the first line.
Signed-off-by: Chen-Yu Tsai <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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