| Age | Commit message (Collapse) | Author |
|---|
|
Fix SSCG_PLL_REFCLK_SEL_x, the offset starts from 0, not 16
Reported-by: Coverity 3448860
Signed-off-by: Peng Fan <[email protected]>
Reviewed-by: Ye Li <[email protected]>
|
|
Coverity reported dead code, however it is FRAC_PLL_REFCLK_SEL_MASK
was wrongly set.
Reported-by: Coverity 10045172
Signed-off-by: Peng Fan <[email protected]>
Reviewed-by: Ye Li <[email protected]>
|
|
According to i.MX 7Dual Applications Processor Reference Manual, Rev. 1
The target interface CCM root index ranges [0,124], so the number
should be 125.
Reported-by: Coverity 18045
Signed-off-by: Peng Fan <[email protected]>
Reviewed-by: Ye Li <[email protected]>
|
|
enable DTS support for keymile mpc83xx based boards.
get rid of compile warning:
===================== WARNING ======================
This board does not use CONFIG_DM_ETH (Driver Model
for Ethernet drivers). Please update the board to use
CONFIG_DM_ETH before the v2020.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
Therefore done:
- add DTS for all mpc83xx based boards from keymile
mainly they are not mainlined to linux.
- add u-boot specific dtsi
- add stdout-path
- add missing ucc4 par_io definitions, which were
in board code, but not in linux DTS
- remove not used ethernet nodes
Signed-off-by: Heiko Schocher <[email protected]>
Patch-cc: Mario Six <[email protected]>
Patch-cc: Qiang Zhao <[email protected]>
Series-to: u-boot
Series-version: 3
Series-changes: 3
- rebase patchset to current mainline commit
c0192950df
- update defconfig files
Series-changes: 2
- add patch which fixes Codingstyle errors in drivers/qe
- add patch which converts the mpc83xx based boards from
keymile to DM_ETH
Cover-letter:
powerpc, mpc83xx: add DM_ETH support
This patch series adds DM ethernet support for mpc83xx based
keymile boards.
Travis build:
END
|
|
add DM support for parallel I/O ports on QUICC Engine Block
Signed-off-by: Heiko Schocher <[email protected]>
Patch-cc: Mario Six <[email protected]>
Patch-cc: Qiang Zhao <[email protected]>
Patch-cc: Holger Brunck <[email protected]>
Series-changes: 2
- remove RFC
- fixed Codingstyle errors, therefore new patch
powerpc, mpc83xx: fix codingstyle issues for qe_io.c
- moved DM part to drivers/pinctrl
Commit-notes:
Open questions / discussion:
- I let the old none DM based implementation in code
so boards should work with old implementation.
This should be removed if all boards are converted to
DM/DTS.
- Unfortunately linux DTS does not use "pinctrl-"
properties, instead "pio-handle" properties.
Even worser old U-Boot code initializes all pins
defined in "const qe_iop_conf_t qe_iop_conf_tab[]"
table in board code. As linux does the same I decided
to also scan through all subnodes containing "pio-map"
property and initialize them too.
The proper solution would be to check for "pio-handle"
when a device is probed.
END
|
|
fix Codingstyle for files in drivers/qe, remaining following
check warnings:
$ ./scripts/checkpatch.pl -f drivers/qe/uec.h
CHECK: Macro argument reuse '_bd' - possible side-effects?
+#define BD_ADVANCE(_bd, _status, _base) \
+ (((_status) & BD_WRAP) ? (_bd) = \
+ ((struct buffer_descriptor *)(_base)) : ++(_bd))
total: 0 errors, 0 warnings, 1 checks, 692 lines checked
$ ./scripts/checkpatch.pl -f drivers/qe/uec_phy.h
total: 0 errors, 0 warnings, 0 checks, 214 lines checked
$ ./scripts/checkpatch.pl -f drivers/qe/uccf.c
total: 0 errors, 0 warnings, 0 checks, 507 lines checked
$ ./scripts/checkpatch.pl -f drivers/qe/uec.c
total: 0 errors, 0 warnings, 0 checks, 1434 lines checked
$ ./scripts/checkpatch.pl -f drivers/qe/uec_phy.c
total: 0 errors, 0 warnings, 0 checks, 927 lines checked
$ ./scripts/checkpatch.pl -f drivers/qe/qe.c
CHECK: Lines should not end with a '('
+U_BOOT_CMD(
total: 0 errors, 0 warnings, 1 checks, 830 lines checked
Signed-off-by: Heiko Schocher <[email protected]>
|
|
remove
extern void qe_init(uint qe_base);
extern void qe_reset(void);
and include fsl_qe.h instead.
Signed-off-by: Heiko Schocher <[email protected]>
Series-changes: 2
- new in v2
|
|
https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2020-10-rc5
The following bugs are fixed:
* unaligned access in br_i32_decode()
* missing restore of global data pointer in UEFI selftest
* missing restore of global data pointer on RISC-V in UEfI subsystem
* efi_var_mem_notify_exit_boot_services() should not be __efi_runtime
|
|
The linker sometimes creates PT_LOAD segments with length (p_filesz) zero
as described in https://man7.org/linux/man-pages/man5/elf.5.html. This
leads to build failures. We should ignore empty segments.
Signed-off-by: Heinrich Schuchardt <[email protected]>
Tested-by: Tom Rini <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
|
|
The grf node will be used before relocate, enable it in dts.
Signed-off-by: Kever Yang <[email protected]>
|
|
https://gitlab.denx.de/u-boot/custodians/u-boot-ti into next
- Hyperflash boot for J7200
- Update Main R5FSS lockstep mode
- R5F remoteproc support for J7200
- Minor env fixes
- Add SPI boot support for am335x-icev2
|
|
Add platform data and a device structure for the spi device
present on am335x-icev2. This requires moving all omap3_spi
platform data structures and symbols to an omap3_spi.h so that
the board file can access them.
Signed-off-by: Faiz Abbas <[email protected]>
|
|
Add spi and spi nor flash nodes for am335x-icev2.
Signed-off-by: Faiz Abbas <[email protected]>
|
|
Add a generic fs_loader node to the K3 J7200 R5 common board dts
file and use it as the chosen firmware-loader so that it can be
used for loading various firmwares from a boot media/filesystem
in R5 SPL on K3 J7200 EVM.
Signed-off-by: Suman Anna <[email protected]>
|
|
The J7200 SoCs have 2 dual-core Arm Cortex-R5F processor (R5FSS)
subsystems/clusters. One R5F cluster is present within the MCU
domain (MCU_R5FSS0), and the other one is present within the MAIN
domain (MAIN_R5FSS0). Each of these can be configured at boot time
to be either run in a LockStep mode or in an Asymmetric Multi
Processing (AMP) fashion in Split-mode. These subsystems have 64 KB
each Tightly-Coupled Memory (TCM) internal memories for each core
split between two banks - ATCM and BTCM (further interleaved into
two banks). The TCMs of both Cores are combined in LockStep-mode
to provide a larger 128 KB of memory.
Add the DT node for the MAIN domain R5F cluster/subsystem, the two
R5F cores are added as child nodes to the main cluster/subsystem node.
The cluster is configured to run in Split-mode by default, with the
ATCMs enabled to allow the R5 cores to execute code from DDR with
boot-strapping code from ATCM. The inter-processor communication
between the main A72 cores and these processors is achieved through
shared memory and Mailboxes.
Signed-off-by: Suman Anna <[email protected]>
|
|
The J7200 SoCs have 2 dual-core Arm Cortex-R5F processor (R5FSS)
subsystems/clusters. One R5F cluster is present within the MCU
domain (MCU_R5FSS0), and the other one is present within the MAIN
domain (MAIN_R5FSS0). Each of these can be configured at boot time
to be either run in a LockStep mode or in an Asymmetric Multi
Processing (AMP) fashion in Split-mode. These subsystems have 64 KB
each Tightly-Coupled Memory (TCM) internal memories for each core
split between two banks - ATCM and BTCM (further interleaved into
two banks). The TCMs of both Cores are combined in LockStep-mode
to provide a larger 128 KB of memory.
Add the DT node for the MCU domain R5F cluster/subsystem, the two
R5F cores are added as child nodes to the main cluster/subsystem node.
The cluster is configured to run in LockStep mode by default, with
the ATCMs enabled to allow the R5 cores to execute code from DDR with
boot-strapping code from ATCM. The inter-processor communication
between the main A72 cores and these processors is achieved through
shared memory and Mailboxes.
Signed-off-by: Suman Anna <[email protected]>
|
|
The A72 U-Boot code can load and boot a number of the available
R5FSS Cores on the J7200 SoC. Change the memory attributes for the
DDR regions used by the remote processors so that the cores can see
and execute the proper code.
The J7200 SoC has less number of remote processors compared to J721E,
so use less memory for the remote processors. So, a separate table
based on the current J721E table is added for J7200 SoCs, and selected
using the appropriate Kconfig CONFIG_TARGET_J7200_A72_EVM symbol.
Signed-off-by: Suman Anna <[email protected]>
|
|
Switch the MAIN R5FSS1 cluster to be configured for Split-mode as the
default so that two different applications can be run on each of the
R5F cores in performance mode. LockStep-mode would be available only
on SoCs efused with the appropriate bit, and Split-mode is the mode
that is available on all J721E SoCs.
Signed-off-by: Suman Anna <[email protected]>
|
|
Enable HyperBus and HyperFlash to support HyperFlash boot.
Signed-off-by: Vignesh Raghavendra <[email protected]>
|
|
HBMC controller on TI K3 SoC provides MMIO access to HyperFlash similar
to legacy Parallel CFI NOR flashes. Therefore alias HyperFlash bootmode
to NOR boot to enable SPL to load next stage using NOR boot flow.
Signed-off-by: Vignesh Raghavendra <[email protected]>
|
|
Function set_gd() is needed in the UEFI sub-system if the global data
pointer is stored in a register.
Signed-off-by: Heinrich Schuchardt <[email protected]>
|
|
The description for MT8512 has some mistake, so correct it.
Signed-off-by: Mingming Lee <[email protected]>
|
|
Include ast2500-evb.dtb for CONFIG_ASPEED_AST2500 instead of
for all aspeed targets.
ast2400 is based on ARM926EJ-S processor (ARMv5-architecture).
ast2500 is based on ARM1176JZS processor (ARMv6-architecture).
ast2600 is based on Cortex A7 processor (ARMv7-A architecture).
Each of the above SOC is using a different ARM CPU(s) with different ARM
architecture revision. It is not possible to support all 3 of these
families in a single binary. So there is no need to build ast2500-evb.dtb
for other SOC families.
Signed-off-by: Thirupathaiah Annapureddy <[email protected]>
|
|
Modify SPDX-License for furture patch warning
Signed-off-by: Ryan Chen <[email protected]>
Reviewed-by: Chia-Wei, Wang <[email protected]>
|
|
v2: modify title description aspeed:clock -> clock:aspeed
Use kernel include/dt-bindings/clock/aspeed-clock.h define
for clock driver.
Signed-off-by: Ryan Chen <[email protected]>
Reviewed-by: Chia-Wei, Wang <[email protected]>
|
|
Rename the ast2500-scu.h to aspeed-clock.h.
Signed-off-by: Ryan Chen <[email protected]>
Reviewed-by: Chia-Wei, Wang <[email protected]>
Reviewed-by: Cédric Le Goater <[email protected]>
|
|
PLL4Q is supplying both FDCAN and LTDC. In case HDMI is in use, the
50 MHz generated from PLL4Q cannot be divided well enough to produce
accurate clock for HDMI pixel clock. Adjust it to generate 74.25 MHz
instead. The PLL4P/PLL4R are generating 99 MHz instead of 100 MHz,
which is in tolerance for the SDMMC.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Gerald Baeza <[email protected]>
Cc: Patrick Delaunay <[email protected]>
Cc: Patrice Chotard <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
|
|
There is no dedicated pull resistor on the AV96 UART4 (console UART)
pin. In case there is no UART adapter installed on the AV96, the line
is floating and can trigger reception of garbage characters, which in
turn can abort U-Boot autoboot. Add default pull up to mitigate this
problem.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Patrick Delaunay <[email protected]>
Cc: Patrice Chotard <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
|
|
Remove the unnecessary inversion on the eth_env_set_enetaddr() result which
only make complex the code of setup_mac_address() and display an invalid
value in the associated pr_err.
Signed-off-by: Patrick Delaunay <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
|
|
As the error message is now displayed by generic phy functions,
the pr_err can be change to pr_debug.
Signed-off-by: Patrick Delaunay <[email protected]>
Acked-by: Neil Armstrong <[email protected]>
|
|
https://gitlab.denx.de/u-boot/custodians/u-boot-marvell into next
|
|
- Mostly DFU fixes and r8152 fixes
|
|
Instead of querying SDM for FPGA configuration status through mailbox
messages, U-Boot now checks System Manager's FPGA Config status register
for FPGA configuration status before resetting bridge.
Signed-off-by: Chee Hong Ang <[email protected]>
Reviewed-by: Ley Foon Tan <[email protected]>
|
|
Add g_dnl_get_board_bcd_device_number, the new BCD value is used by uuu to distinguish
if the SPL supports the SDPV.
Signed-off-by: Peng Fan <[email protected]>
Reviewed-by: Lukasz Majewski <[email protected]>
|
|
Extend fastboot_set_reboot_flag arguments with reboot reason so that
it could handle different reboot cases in future.
Signed-off-by: Roman Kovalivskyi <[email protected]>
|
|
This function is not actually used in U-Boot. Drop it.
Suggested-by: Bin Meng <[email protected]>
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
|
|
Introduce USE_EARLY_BOARD_INIT option and select it by the actual users.
Cc: George McCollister <[email protected]>
Signed-off-by: Andy Shevchenko <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
Reviewed-by: Aiden Park <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
|
|
https://gitlab.denx.de/u-boot/custodians/u-boot-ti
- Update to ABI 3.0
- Fix i2c write in eeprom driver
|
|
Enabled SDIO slot 0 (south bridge) for SD card on
Espressobin board.
Change-Id: I51a2debf9fba276b9c4a2bc6da91328d47f443e3
Signed-off-by: Wilson Ding <[email protected]>
Signed-off-by: Konstantin Porotchkin <[email protected]>
Reviewed-on: http://vgitil04.il.marvell.com:8080/60945
Tested-by: iSoC Platform CI <[email protected]>
Reviewed-by: Igal Liberman <[email protected]>
[pali: Define cd-gpios and enable CONFIG_DM_REGULATOR_GPIO]
Signed-off-by: Pali Rohár <[email protected]>
Reviewed-by: Konstantin Porotchkin <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
Tested-by: Andre Heider <[email protected]>
|
|
Change active-high to active-low and change DT property name from
reset-gpio to reset-gpios. This format of gpio reset is used by
pci-aardvark driver in Linux kernel.
Signed-off-by: Pali Rohár <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
Reviewed-by: Konstantin Porotchkin <[email protected]>
Tested-by: Andre Heider <[email protected]>
|
|
This commit fixes initialization of COMPHY on EspressoBin.
Commit 22f418935be4 ("phy: marvell: a3700: Use comphy_mux on Armada
37xx.") introduced usage of comphy_mux on Armada 37xx comphy driver.
The lanes are defined in comphy_a3700.c as described in functional
specification, that is:
lane 0 is SGMII1 or USB3
lane 1 is PCIe or SGMII0
lane 2 is SATA or USB3
But the DTS for EspressoBin configures PCIe on lane 0 and USB3 on
lane 1, which is wrong in the sense of the specification and doesn't
work with the comphy_mux code, which is 2 years now (the aardvark driver
causes synchronous abort in U-Boot).
It worked till the above mentioned commit, because the code for powering
up PCIe PHY doesn't work with lane number at all, and the code for
powering up USB3 PHY works differently only if USB3 is on lane 2, ie.
the check goes like:
if (lane == 2)
something
else
something else
so it does not differentiate between lanes 0 and 1.
In the future I shall post patches that remove the comphy_a3700 driver
and add comphy driver which uses calls to ATF, like Linux' driver does.
This will have the advantage of same DTS bindings as Linux', but till
this is done, we need this patch.
Signed-off-by: Marek Behún <[email protected]>
Tested-by: Pali Rohár <[email protected]>
Cc: Stefan Roese <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
Tested-by: Andre Heider <[email protected]>
|
|
Update the ringacc and udma dt nodes to use the latest RM resource types
similar to the ones used in k3-j721e dt nodes.
Signed-off-by: Lokesh Vutla <[email protected]>
|
|
ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.
Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>
Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
|
|
arch_setup_bdinfo() only configures the deprecated bi_memstart &
bi_memsize values, which should not be needed any more. Lets remove
this file completely.
Signed-off-by: Stefan Roese <[email protected]>
Reviewed-by: Ovidiu Panait <[email protected]>
|
|
With the planned removal of bi_memstart & bi_memsize, this patch now
moves the references to the better suiting gd->ram_base/ram_size
variables.
Signed-off-by: Stefan Roese <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
|
|
Since commit 86cf1c82850f ("configs: Migrate CONFIG_NR_DRAM_BANKS") &
commit 999a772d9f24 ("Kconfig: Migrate CONFIG_NR_DRAM_BANKS"),
CONFIG_NR_DRAM_BANKS is always defined with a value (4 is default).
It makes no sense to still carry code that is guarded with
"#ifndef CONFIG_NR_DRAM_BANKS" (and similar). This patch removes
all these unreferenced code paths.
Signed-off-by: Stefan Roese <[email protected]>
Reviewed-by: Pali Rohár <[email protected]>
Reviewed-by: Andy Shevchenko <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
|
|
https://gitlab.denx.de/u-boot/custodians/u-boot-imx
For 2020.10
-----------
- mx6: SOCs user selectable
Fix for imx6q_logic
Some DM conversion
- mx7: introduce secondary boot device
Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/720918010
Signed-off-by: Tom Rini <[email protected]>
|
|
- Add basic Marvell/Cavium OcteonTX/TX2 support (Suneel)
- Infrastructure changes to PCI uclass to support these SoC's (Suneel)
- Add PCI, MMC & watchdog driver drivers for OcteonTX/TX2 (Suneel)
- Increase CONFIG_SYS_MALLOC_F_LEN for qemu-x86 (Stefan)
|
|
https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- Fix rk3399 evb sdcard support
- Fix for SPL_LED support
|
|
- Sipeed Maix support S-mode.
- Provide command sbi.
- Use fdtdec_get_addr_size_auto_parent to get fu540 cache base address.
- Fix a compiler error with CONFIG_SPL_SMP=n.
- Fix sifive ram driver 32 compiler warnings.
- Fix kendryte/pll.h redefine nop() warning.
|
