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2019-10-08ARM: dts: at91: sama5d27_wlsom1_ek: add support for qspiEugen Hristev
Add node for qspi1 memory connected on the wlsom Signed-off-by: Eugen Hristev <[email protected]>
2019-10-08ARM: dts: at91: sama5d2: add seq for qspi1Eugen Hristev
qspi1 does not have an alias/seq number. This is required for SPL default SF bus booting for the boards that have this SoC Signed-off-by: Eugen Hristev <[email protected]>
2019-10-08board: atmel: sama5d2_wlsom1_ek: add SPL supportEugen Hristev
Add support for SPL for this board: DRAM initialization, PMC initialization, MMC boot. Signed-off-by: Eugen Hristev <[email protected]>
2019-10-08ARM: at91: mpddrc: add lpddr2 initialization procedureEugen Hristev
Implement the lpddr2 initialization procedure for at91 mpddrc multi-port ddram controller. Signed-off-by: Eugen Hristev <[email protected]>
2019-10-08board: laird: wb50n: use configure_ddrcfg_input_buffersEugen Hristev
Replace code with new function configure_ddrcfg_input_buffers from SFR mach driver. Signed-off-by: Eugen Hristev <[email protected]>
2019-10-08ARM: at91: sfr: implement DDR input buffers open functionEugen Hristev
Add a function in SFR implementation that will open the DDR input buffers. This can be called at DRAM initialization time. Signed-off-by: Eugen Hristev <[email protected]>
2019-10-08ARM: at91: sfr: convert to KconfigEugen Hristev
This converts the at91 sfr to Kconfig Signed-off-by: Eugen Hristev <[email protected]>
2019-10-08board: atmel: add sama5d27_wlsom1_ek boardNicolas Ferre
Add support for the SAMA5D27-WLSOM1-EK. It's based on the Microchip WireLess SoM which contains the SAMa5D27 LPDDR2 2Gbits SiP. Signed-off-by: Nicolas Ferre <[email protected]> [[email protected]]: added u-boot specific dtsi and ported to 2019.10 Signed-off-by: Eugen Hristev <[email protected]>
2019-10-08ARM: at91: Add the chip ID for SAMA5D2 LPDDR2 SiPNicolas Ferre
The SAMA5D2 LPDDR2 SiP (System in Package) is added for SoC identification. Signed-off-by: Nicolas Ferre <[email protected]>
2019-10-08x86: Use mtrr_commit() with FSP2Simon Glass
With FSP2 we use MTRRs in U-Boot proper even though the 32-bit init happens in TPL. Enable this, using a variable to try to make the conditions more palatable. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Bin Meng <[email protected]>
2019-10-08x86: cpu: Don't include the cpu driver in TPLSimon Glass
We don't need this driver very early in boot and it adds code size. Drop it. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Bin Meng <[email protected]>
2019-10-08x86: Add a function to set variable MTRRsSimon Glass
Normally U-Boot handles MTRRs through an add/commit process which overwrites all MTRRs. But in very early boot it is not desirable to clear the existing MTRRs since they may be in use and it can cause a hang. Add a new mtrr_set_next_var() function which sets up the next available MTRR to the required region. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Bin Meng <[email protected]> [bmeng: pass 'type' to set_var_mtrr() in mtrr_set_next_var()] Signed-off-by: Bin Meng <[email protected]>
2019-10-08x86: Refactor mtrr_commit() to allow for shared codeSimon Glass
Move the code that actually sets up the MTRR into another function so it can be used elsewhere in the file. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Bin Meng <[email protected]>
2019-10-08x86: Allow the PCH and LPC uclasses to work with of-platdataSimon Glass
At present these uclasses assumes that they are used with a device tree. Update them to support of-platdata as well. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Bin Meng <[email protected]>
2019-10-08sandbox: pci: Create a new sandbox_pci_read_bar() functionSimon Glass
The code in swapcase can be used by other sandbox drivers. Move it into a common place to allow this. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Bin Meng <[email protected]> Tested-by: Bin Meng <[email protected]> [bmeng: remove inclusion of <asm/test.h> in pci_sandbox.c] Signed-off-by: Bin Meng <[email protected]>
2019-10-08x86: Add new common CPU functions for turbo/burst modeSimon Glass
Add a few more CPU functions that are common on Intel CPUs. Also add attribution for the code source. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Bin Meng <[email protected]> [bmeng: add missing MSR_IA32_MISC_ENABLE write back in cpu_set_eist(); fix 2 typos in cpu_get_burst_mode_state() comments] Signed-off-by: Bin Meng <[email protected]>
2019-10-08x86: Tidy up some duplicate MSR definesSimon Glass
Some MSR registers are defined twice in different parts of the file. Move them together and remove the duplicates. Also drop some thermal defines which are not used. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Bin Meng <[email protected]>
2019-10-08x86: Add common functions for TDP and perf controlSimon Glass
These functions are the same on modern Intel CPUs, so use common code to set them. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Bin Meng <[email protected]> [bmeng: return false instead of 0 in cpu_ivybridge_config_tdp_levels(); fix 'muiltiplier' and 'desgn' typos] Signed-off-by: Bin Meng <[email protected]>
2019-10-08x86: Use a common bus clock for Intel CPUsSimon Glass
Modern Intel CPUs use a standard bus clock value of 100MHz, so put this in a common file and tidy up the copies. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Bin Meng <[email protected]>
2019-10-08x86: Add a common function to set CPU thermal targetSimon Glass
This code appears in a few places, so move it to a common file. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Bin Meng <[email protected]>
2019-10-08x86: Use a common definition of MSR_IA32_PERF_CTLSimon Glass
Remove the duplicate definition as it is not needed. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Bin Meng <[email protected]>
2019-10-08x86: pci: Drop the first parameter in pci_x86_r/w_config()Simon Glass
This parameter is needed by the PCI driver-mode interface but is always NULL on x86. There are a number of calls to this function so it makes sense to minimise the parameters. Adjust the x86 function to omit the first parameter, and introduce stub functions to handle the conversion. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Bin Meng <[email protected]> [bmeng: rebase the patch against u-boot-x86/next to get it applied cleanly] Signed-off-by: Bin Meng <[email protected]>
2019-10-08x86: Move acpi_s3.h to a common locationSimon Glass
At present this hedaer is only available on x86. To allow sandbox to use it for testing, move it to a common location. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Bin Meng <[email protected]>
2019-10-08spl: Convert CONFIG_SPL_SIZE_LIMIT to hexSimon Glass
This is currently a decimal value which is not as convenient or meaningful. Also U-Boot tends to use hex everywhere. Convert this option to hex and add a comment for the size_check macro. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Simon Goldschmidt <[email protected]> Acked-by: Bin Meng <[email protected]> [bmeng: correct the typo in the commit title] Signed-off-by: Bin Meng <[email protected]>
2019-10-08spl: Allow tiny printf() to be controlled in SPL and TPLSimon Glass
At present there is only one control for this and it is used for both SPL and TPL. But SPL might have a lot more space than TPL so the extra cost of a full printf() might be acceptable. Split the option into two, providing separate SPL and TPL controls. The TPL setting defaults to the same as SPL. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Bin Meng <[email protected]>
2019-10-08arm: mxs: Correct CONFIG_SPL_NO_CPU_SUPPORT optionSimon Glass
At present this is defined in Kconfig but there is a separate one in the CONFIG whitelist. It looks like these are duplicates. Rename the non-Kconfig one and remove it from the whitelist. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Bin Meng <[email protected]>
2019-10-08dm: pci: Add a function to read a PCI BARSimon Glass
At present PCI address transaction is not supported so drivers must manually read the correct BAR after reading the device tree info. The ns16550 has a suitable implementation, so move this code into the core DM support. Note that there is no live-tree equivalent at present. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Bin Meng <[email protected]> Tested-by: Bin Meng <[email protected]> [bmeng: correct the unclear comments in test.dts] Signed-off-by: Bin Meng <[email protected]>
2019-10-08pci: sandbox: Move the emulators into their own nodeSimon Glass
Sandbox pci works using emulation drivers which are currently children of the pci device: pci-controller { pci@1f,0 { compatible = "pci-generic"; reg = <0xf800 0 0 0 0>; emul@1f,0 { compatible = "sandbox,swap-case"; }; }; }; In this case the emulation device is attached to pci device on address f800 (device 1f, function 0) and provides the swap-case functionality. However this is not ideal, since every device on a PCI bus has a child device. This is only really the case for sandbox, but we want to avoid special-case code for sandbox. Worse, child devices cannot be probed before their parents. This forces us to use 'find' rather than 'get' to obtain the emulator device. In fact the emulator devices are never probed. There is code in sandbox_pci_emul_post_probe() which tries to track when emulators are active, but at present this does not work. A better approach seems to be to add a separate node elsewhere in the device tree, an 'emulation parent'. This could be given a bogus address (such as -1) to hide the emulators away from the 'pci' command, but it seems better to keep it at the root node to avoid such hacks. Then we can use a phandle to point from the device to the correct emulator, and only on sandbox. The code to find an emulator does not interfere with normal pci operation. Add a new UCLASS_PCI_EMUL_PARENT uclass which allows finding an emulator given a bus, and finding a bus given an emulator. Update the existing device trees and the code for finding an emulator. This brings PCI emulators more into line with I2C. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Bin Meng <[email protected]> Tested-by: Bin Meng <[email protected]> [bmeng: fix 3 typos in the commit message; encode bus number in the labels of swap_case_emul nodes; mention commit 4345998ae9df in sandbox_pci_get_emul()] Signed-off-by: Bin Meng <[email protected]>
2019-10-08sandbox: Allow use of real I/O with readl(), etc.Simon Glass
At present these functions are stubbed out. For more comprehensive testing with PCI devices it is useful to be able to fully emulate I/O access. Add simple implementations for these. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Bin Meng <[email protected]> Tested-by: Bin Meng <[email protected]> [bmeng: change to use 'const void *' in sandbox_write(); cast 'addr' in read/write macros in arch/sandbox/include/asm/io.h; remove the unnecessary cast in readq/writeq in nvme.h] Signed-off-by: Bin Meng <[email protected]>
2019-10-08sandbox: pci: Increase the memory spaceSimon Glass
Increase the memory space so we can support the p2sb bus which needs multiples of 1MB. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Bin Meng <[email protected]>
2019-10-08sandbox: Add a -T flag to use the test device treeSimon Glass
U-Boot already supports using -D to indicate that it should use the normal device tree. It is sometimes useful to run with the test device tree, e.g. when running a test. Add a -T option for this along with some documentation. It can be used like this: /tmp/b/sandbox/u-boot -T -c "ut dm pci_busdev" (this will use /tmp/b/sandbox/arch/sandbox/dts/test.dtb as the DT) Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Bin Meng <[email protected]> Tested-by: Bin Meng <[email protected]>
2019-10-08sandbox: Add support for clrsetio_32() and friendsSimon Glass
These functions are available on x86 but not sandbox. They are useful shortcuts and clarify the code, so add them to sandbox. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Bin Meng <[email protected]>
2019-10-08sandbox: Rename PCI ID for swap_case to be more specificSimon Glass
Rename this ID to SANDBOX_PCI_SWAP_CASE_EMUL_ID since it is more descriptive and allows us to add new PCI emulators without any conflict or confusion. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Bin Meng <[email protected]>
2019-10-08sandbox: spmi: Add ranges property for address translationSimon Glass
At present address translation does not work since there is no ranges property in the spmi nodes. Add empty ranges properties and a little more logging so that this shows the error: /tmp/b/sandbox/u-boot -d /tmp/b/sandbox/arch/sandbox/dts/test.dtb \ -c "ut dm spmi_access_peripheral" -L7 -v ... pm8916_gpio_probe() bad address: returning err=-22 Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Bin Meng <[email protected]> Tested-by: Bin Meng <[email protected]>
2019-10-08dm: core: Add device_foreach_child()Simon Glass
We have a 'safe' version of this function but sometimes it is not needed. Add a normal version too and update a few places that can use it. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Bin Meng <[email protected]>
2019-10-08x86: Rename turbo ratio MSR to MSR_TURBO_RATIO_LIMITSimon Glass
This MSR number is used on most modern Intel processors, so drop the confusing NHM prefix (which might mean Nehalem). Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Bin Meng <[email protected]> [bmeng: drop MSR_IVT_TURBO_RATIO_LIMIT as no code uses it] Signed-off-by: Bin Meng <[email protected]>
2019-10-08x86: Add various MTRR indexes and valuesSimon Glass
Add some new MTRRs used by Apollolake as well as a mask for the MTRR type. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Bin Meng <[email protected]>
2019-10-08x86: Add more comments to the start-up codeSimon Glass
The full start-up sequence (TPL->SPL->U-Boot) can be a bit confusing since each phase has its own 'start' file. Add comments to explain this. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Bin Meng <[email protected]>
2019-10-08x86: Change condition for using CARSimon Glass
At present we assume that CAR (Cache-as-RAM) is used if HOBs (Hand-off blocks) are not, since HOBs typically indicate that an FSP is in use, and FSPs handle the CAR init. However this is a bit indirect, and for FSP2 machines which use their own CAR implementation (such as apollolake) but use the FSP for other functions, the logic is wrong. To fix this, add a dedicated Kconfig option to indicate when CAR is used. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Bin Meng <[email protected]> [bmeng: fix a typo in the commit message] Signed-off-by: Bin Meng <[email protected]>
2019-10-08x86: fsp: Save usable RAM and hob_list in the handoff areaSimon Glass
The useable RAM is calculated when the RAM is inited. Save this value so that it can be easily used in U-Boot proper. Also save a pointer to the hob list so that it is accessible (before relocation only) in U-Boot proper. This avoids having to scan it in SPL, for everything U-Boot proper might need later. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Bin Meng <[email protected]> [bmeng: guard handoff_arch_save() with IS_ENABLED(CONFIG_USE_HOB)] Signed-off-by: Bin Meng <[email protected]>
2019-10-08x86: spl: Move broadwell-specific code out of generic x86 splSimon Glass
When TPL is running, broadwell needs to do different init from SPL. There is no need for this code to be in the generic x86 SPL file, so move it to arch_cpu_init(). Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Bin Meng <[email protected]>
2019-10-08x86: spl: Reduce priority of the basic SPL image loaderSimon Glass
This image loader works on systems where the flash is directly mapped to the last part of the 32-bit address space. On recent Intel systems (such as apollolake) this is not the case. Reduce the priority of this loader so that another one can override it. While we are here, rename the loader to BOOT_DEVICE_SPI_MMAP since BOOT_DEVICE_BOARD is not very descriptive. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Bin Meng <[email protected]>
2019-10-08x86: spl: Use hang() instead of a while() loopSimon Glass
Use the standard hang() function when booting fails since this implements the defined U-Boot behaviour for this situation. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Bin Meng <[email protected]>
2019-10-08x86: pci: Add a function to clear and set PCI config regsSimon Glass
At present the x86 pre-DM equivalent of pci_bus_clrset_config32() does not exist. Add it to simplify PCI init code on x86. Also add the missing functions to this header. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Bin Meng <[email protected]>
2019-10-08x86: Add binman symbols to the imageSimon Glass
It is useful in SPL and TPL to access symbols from binman, such as the position and size of an entry in the ROM. Collect these symbols together in the SPL binaries. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Bin Meng <[email protected]>
2019-10-08x86: Move common Intel CPU info code into a functionSimon Glass
Add cpu_intel_get_info() to find out the CPU info on modern Intel CPUs. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Bin Meng <[email protected]> [bmeng: add parameter and return value descriptions] Signed-off-by: Bin Meng <[email protected]>
2019-10-08x86: fsp: Add access to variable MRC dataSimon Glass
With FSP2 the non-volatile storage used by the FSP to init memory can be split into a fixed piece (determined at compile time) and a variable piece (determined at run time). Add support for reading the latter. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Bin Meng <[email protected]>
2019-10-08x86: fsp: Add a few more definitions for FSP2Simon Glass
Add definitions for the FSP signature and the FSP init phase. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Bin Meng <[email protected]>
2019-10-08x86: fsp: Move common support functions into a common fileSimon Glass
Some of this file can be shared between FSP1 and FSP2. Move it into a shared file. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Bin Meng <[email protected]> Tested-by: Bin Meng <[email protected]>
2019-10-08x86: Move common fsp functions into a common fileSimon Glass
Some of this file can be shared between FSP1 and FSP2. Move it into a shared file. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Bin Meng <[email protected]> Tested-by: Bin Meng <[email protected]>