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Add the VTM node to the R5 boot stage so that AVS is correctly
configured for AM68 SK.
Signed-off-by: Neha Malcom Francis <[email protected]>
Reviewed-by: Manorit Chawdhry <[email protected]>
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Add VTM node to R5 boot stage so that AVS gets correctly configured for
J784S4 EVM and AM69 SK.
Signed-off-by: Neha Malcom Francis <[email protected]>
Reviewed-by: Manorit Chawdhry <[email protected]>
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Enable OSPI node to allow OSPI boot on AM68
Signed-off-by: Udit Kumar <[email protected]>
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Introduce CONFIG_PHYTEC_K3_DDR_PATCH to make DDR timing patch code
optional for PHYTEC K3 boards. This allows better control over which
boards receive DDR timing patches, rather than compiling the code for
all boards with K3_DDRSS enabled.
Also enable the feature by default for PHYCORE_AM62X_R5.
Signed-off-by: Garrett Giordano <[email protected]>
Reviewed-by: Wadim Egorov <[email protected]>
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Given that ARCH_SUNXI already implies that USB_GADGET should be enable,
we should also imply USB being enabled.
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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It is not the case that we can only pick ASPEED_AST2500 if DM_RESET
is enabled, but rather choosing ASPEED_AST2500 means we must select
DM_RESET.
Signed-off-by: Tom Rini <[email protected]>
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https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next
AMD/Xilinx changes for v2025.04-rc1
binman:
- Separate binman description from main DT
zynqmp:
- Enable binman for ZynqMP platforms
- DT sync with Linux v6.12
- Update usb5744 hub for SOMs
common:
- Drop SPL_FIT_GENERATOR support
versal2
- Enable OPTEE layers
ospi:
- Refactor the flash reset functionality
pytest:
- Fix tcminit mode handling
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The cache-flush function is incorrect which causes a crash in the
remoteproc tests with arm64.
Fix both problems by using map_sysmem() to convert an address to a
pointer and map_to_sysmem() to convert a pointer to an address.
Also update the image-loader's cache-flushing logic.
Signed-off-by: Simon Glass <[email protected]>
Fixes: 3286d223fd7 ("sandbox: implement invalidate_icache_all()")
Acked-by: Heinrich Schuchardt <[email protected]>
Changes in v6:
- Re-introduce
Changes in v2:
- Drop message about EFI_LOADER
arch/sandbox/cpu/cache.c | 8 +++++++-
drivers/remoteproc/rproc-elf-loader.c | 18 +++++++++++-------
lib/efi_loader/efi_image_loader.c | 3 ++-
3 files changed, 20 insertions(+), 9 deletions(-)
Reviewed-by: Heinrich Schuchardt <[email protected]>
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This breaks chromebook_coral which says:
Video: No video mode configured in FSP!
This reverts commit 2e9313179a846b581c0fc3f6a49e19f3d343efa8.
Signed-off-by: Simon Glass <[email protected]>
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It doesn't make sense for these files to have the x bit set. It was,
probably accidentally, added in:
Fixes: 2c494e62c31a (arm: dts: Stratix10: Add QSPI node)
Signed-off-by: Rasmus Villemoes <[email protected]>
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Updating the usb5744 hub node as per the latest upstream DT binding
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/
tree/Documentation/devicetree/bindings/usb/microchip,usb5744.yaml?h=v6.8.8
Signed-off-by: Venkatesh Yadav Abbarapu <[email protected]>
Acked-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
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Sync zynqmp* DTS files with v6.12 Linux kernel.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/cf37760117765c4cece94736dc2a7b583d5987de.1732805351.git.michal.simek@amd.com
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Enable PCIe/NVMe support on Data Modul i.MX8M Mini eDM SBC. Except for
the configuration options which are enabled, add slight adjustment
to board u-boot.dtsi, which is necessary as there is currently no
driver for the I2C PCIe clock generator. Since the generator is
strapped to be always on, it is possible to supplant the generator
functionality by fixed-clock.
Signed-off-by: Marek Vasut <[email protected]>
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The YModem support in SPL was never really used on this device,
the SDP support is much more convenient on i.MX8M Mini based
hardware. Replace the YModem support with SDP support.
The SDP can be utilized by forcing the board into SDP boot mode
by grounding test point right next to silkscreen label U30, and
then by using mfgtools 'uuu -brun spl flash.bin' once the device
enumerates on host system USB bus. The SDP capable USB port is
available on the USB micro-B port on the base board.
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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Modul i.MX8M Mini/Plus eDM SBC
The DRAM configuration GPIO straps must be accessible in SPL and before
relocation because the GPIOs are sampled both in U-Boot SPL as well as early
on in U-Boot proper. The already present bootph-pre-ram DT property made the
GPIO controllers available in SPL, but not early on in U-Boot proper, which
made gpio_request_list_by_name_nodev() in board dmo_get_memcfg() fail. Add
missing bootph-some-ram DT property to all GPIO controllers which are
referenced in dmo,ram-coding-gpios DT property to make those GPIO
controllers available early in U-Boot proper as well.
Fixes: 8c103c33fb14 ("dm: dts: Convert driver model tags to use new schema")
Signed-off-by: Marek Vasut <[email protected]>
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Create u-boot-single.itb where only actual DTB is used not really multiple
of DTS from OF_LIST. This results in small files without option to change
DT.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/9362da506c13382da0c0d41ad8a111d9c1150f08.1732089924.git.michal.simek@amd.com
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For enabling binman by default there is a need to have at least empty node
present that's why create -u-boot.dtsi with empty node to cover all ZynqMP
platforms.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/14d874ad4568fa8e3178e893224fecc5c676f04c.1730452668.git.michal.simek@amd.com
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Platform has been switched to binman that's why there is no need for this
script and also Kconfig symbols.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/cf438091e43c4c9d535a9cfa2886673aa42a4370.1730452668.git.michal.simek@amd.com
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u-boot.itb has been generated via mkimage_fit_atf.sh but it is on the way
out that's why convert it's description to binman.
Compare to script binman description is not able to configure BL31 and BL32
load/entry addresses which should be done separately.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/90b613796aee38158252c8bb1dfc3da0420f089d.1730452668.git.michal.simek@amd.com
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There is necessary to do some steps to compose boot images. These steps
were in scripts in layers for a while. That's why introduce description via
binman to simplify wiring and remove all scripting around.
This should make sure that everybody is up2date with the latest versions.
The first step is to create fit image with DTBs with descriptions in
configuration node which is written as regular expression to match all SOM
versions.
Description is there for k24 and k26 in spite of low level psu_init
configuration is different. The reason is that it goes to u-boot.itb image
which is the same for k24 and k26.
u-boot.itb is another image which is generated. It is normally generated
via arch/arm/mach-zynqmp/mkimage_fit_atf.sh but this script is supposed to
be deprecated.
FIT image by purpose is using 64bit addresses to have default option to
move images to high DDR (above 4GB). TF-A and TEE are optional components
but in the most cases TF-A is present all the time and TEE(OP-TEE) is used
by some configurations too.
3rd generated image is boot.bin with updated user field which contains
version number. This image can be used with updated Image Selector
which supports A/B update mechanisms with rollback protection.
4th image is image.bin which binary file which contains boot.bin and
u-boot.itb together and can be programmed via origin Image Selector.
This image can be also used for creating one capsule which contains both
boot images (in SPL boot flow).
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/35bc47a4a4799c5f5dbea56a45340a2810538330.1730452668.git.michal.simek@amd.com
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Make use of OF_UPSTREAM which uses Linux dts.
Signed-off-by: david regan <[email protected]>
Reviewed-by: Linus Walleij <[email protected]>
Reviewed-by: Sumit Garg <[email protected]>
Reviewed-by: William Zhang <[email protected]>
Reviewed-by: Anand Gore <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-dfu into next
CI: https://source.denx.de/u-boot/custodians/u-boot-dfu/-/pipelines/23573
Android:
- bootstd: Implement bootimage v2 support
- bootstd: Support non-A/B in bootmeth_android
- Migrate VIM3 and VIM3L to use bootmeth_android
- bootstd: Additional test for bootimage v2
- bootstd: Optimize load time when reading partitions
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The x250 and SE250 are series of 10G L2+ switches from Allied Telesis.
There are a number of them in the range but as far as U-Boot is
concerned all the CPU block components are the same so there's only one
board defined.
Signed-off-by: Chris Packham <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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Use standard boot instead of the distro boot scripts. Regenerate the
board defconfig now that some options are selected automatically.
Signed-off-by: Chris Packham <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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Rename actual android bootmethod test to specify it's for boot image
version 4.
Add a unit test for testing the Android bootmethod with boot image
version 2.
This requires another mmc image (mmc8) to contain the following
partitions:
- misc: contains the Bootloader Control Block (BCB)
- boot_a: contains a fake generic kernel image
we can test this with:
$ ./test/py/test.py --bd sandbox --build -k test_ut # build the mmc8.img
$ ./test/py/test.py --bd sandbox --build -k bootflow_android
Reviewed-by: Mattijs Korpershoek <[email protected]>
Signed-off-by: Guillaume La Roque <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Mattijs Korpershoek <[email protected]>
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Add EEPROM detection initialisation for phyCORE-i.MX8MM.
Signed-off-by: Yunus Bas <[email protected]>
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The phyCORE-i.MX 93 is available in various variants (e.g. different ram
sizes, eMMC HS400 yes/no). Enable hardware introspection for the
imx93-phyboard-segin_defconfig, so that during startup the SOM module
variant can be detected, and the hardware can be configured accordingly.
The resulting SPL and u-boot binary shall able to boot each
phyCORE-i.MX 93 module variant on each carrier board. Finally rename
imx93-phyboard-segin_defconfig to imx93-phycore_defconfig, to highlight
its SOM scope.
Signed-off-by: Christoph Stoidner <[email protected]>
Reviewed-by: Wadim Egorov <[email protected]>
Reviewed-by: Yannic Moog <[email protected]>
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The phyCORE-i.MX 93 is available in various variants. Relevant variant
options for the spl/u-boot are:
- with or without HS400 support for the eMMC
- with 1GB ram chip, or 2GB ram chip
The phyCORE's eeprom contains all information about the existing variant
options. Add evaluation of the eeprom data to the spl/u-boot to
enable/disable HS400 and to select the appropriate ram configuration at
startup.
Signed-off-by: Christoph Stoidner <[email protected]>
Reviewed-by: Wadim Egorov <[email protected]>
Reviewed-by: Yannic Moog <[email protected]>
Tested-by: Primoz Fiser <[email protected]>
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add wdt device
Signed-off-by: Heiko Schocher <[email protected]>
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current generated flash.bin image does not longer
boot on cxg3 board.
Rename bootph-pre-ram to bootph-all so flash.bin
boots again!
Add u-boot specific change (add bootph-all property)
in A35_0 node to imx8qxp-capricorn-u-boot.dtsi
Signed-off-by: Heiko Schocher <[email protected]>
Reviewed-by: Alexander Sverdlin <[email protected]>
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We have many HW with capricorn i.MX8X boards. The difference in u-boot is
at all by the display of the LEDs.
* put upstream a reference project & board for DT and defconfig
* use the capricorn prefix outside the board/siemens/capricorn folder
Signed-off-by: Enrico Leto <[email protected]>
Signed-off-by: Heiko Schocher <[email protected]>
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imx8qxp based boards which use SPL drop error when
calling make all:
"""
Writing image to './flash.bin'
Node '/binman/imx-boot/spl': GetData: size 0x0
Node '/binman/imx-boot': GetPaddedDataForEntry: size 0x0
Node '/binman/imx-boot': GetData: 1 entries, total size 0x0
Node '/binman/imx-boot': GetPaddedDataForEntry: size 0x0
Wrote 0x0 bytes
Image 'imx-boot' is missing external blobs and is non-functional: spl
/binman/imx-boot/spl (spl.bin):
Missing blob
Some images are invalid
"""
Guard creation of flash.bin with CONFIG_XPL_BUILD option.
Signed-off-by: Heiko Schocher <[email protected]>
Fixes: c9713c155127 ("imx8-u-boot: Fix SPL guard option")
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Prepare v2025.01-rc3
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u-boot was crashing in qemu as the modeled hardware enforced overly
strict memory reads.
While this code will work on existing hardware, fix to avoid future issues.
Fixes: 12770d0df0e8 ("ast2600: spl: Add boot mode detection")
Link: https://gitlab.com/qemu-project/qemu/-/issues/2636
Signed-off-by: Joel Stanley <[email protected]>
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Janne Grunau <[email protected]> says:
Starting with v2024.10 dev_iommu_dma_unmap calls during device removal
trigger a NULL pointer dereference in the Apple dart iommu driver. The
iommu device is removed before its user. The sparsely used DM_FLAG_VITAL
flag is intended to describe this dependency. Add it to the driver.
Adding this flag is unfortunately not enough since the boot routines
except the arm one simply remove all drivers. Add and use a new function
which calls
dm_remove_devioce_flags(DM_REMOVE_ACTIVE_ALL | DM_REMOVE_NON_VITAL);
dm_remove_devices_flags(DM_REMOVE_ACTIVE_ALL);
to ensure this order dependency is head consistently.
Link: https://lore.kernel.org/r/[email protected]
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This replaces dm_remove_devices_flags() calls in all boot
implementations to ensure non vital devices are consistently removed
first. All boot implementation except arch/arm/lib/bootm.c currently
just call dm_remove_devices_flags(DM_REMOVE_ACTIVE_ALL). This can result
in crashes when dependencies between devices exists. The driver model's
design document describes DM_FLAG_VITAL as "indicates that the device is
'vital' to the operation of other devices". Device removal at boot
should follow this.
Instead of adding dm_remove_devices_flags() with (DM_REMOVE_ACTIVE_ALL |
DM_REMOVE_NON_VITAL) everywhere add dm_remove_devices_active() which
does this.
Fixes a NULL pointer deref in the apple dart IOMMU driver during EFI
boot. The xhci-pci (driver which depends on the IOMMU to work) removes
its mapping on removal. This explodes when the IOMMU device was removed
first.
dm_remove_devices_flags() is kept since it is used for testing of
device_remove() calls in dm.
Signed-off-by: Janne Grunau <[email protected]>
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Since 50cdd3f74af3 ("clk: imx: clk-imx8mn Fix nand and spi clock parent"),
drivers/clk/imx/clk-imx8mn.c clk_get_by_name(dev, "osc_24m", &osc_24m_clk)
fails with error -22 EINVAL in SPL. This is because clk_get_by_name() in the
end calls fdtdec_parse_phandle_with_args(), which iterates over all phandles
in clock-controller@30380000 { clocks = <&osc_32k>, <&osc_24m>, ... } node
'clocks' property in an attempt to find the "osc_24m" clock, but fails to
resolve the &osc_32k phandle and returns with -EINVAL.
Include the osc_32k clock in SPL DTs as a low risk fix for v2025.01 release.
This way, fdtdec_parse_phandle_with_args() can resolve both the osc_32k and
following osc_24m phandle and successfully look up the osc_24m clock.
Fixes: 50cdd3f74af3 ("clk: imx: clk-imx8mn Fix nand and spi clock parent")
Signed-off-by: Marek Vasut <[email protected]>
Tested-by: Adam Ford <[email protected]> #imx8mn-beacon
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https://source.denx.de/u-boot/custodians/u-boot-snapdragon
CI: https://source.denx.de/u-boot/custodians/u-boot-snapdragon/-/pipelines/23474
- UFS support is enabled for SC7280 and SM8150 platforms.
- Qualcomm dt-bindings headers are all dropped in favour of
dts/upstream.
- The SMMU driver now correctly handles stream ID 0 and is disabled in
EL2.
- Initial support for capsule updates (using the new dynamic UUIDs) is
added for the RB3 Gen 2 board alongside a new SCSI backend for DFU.
- CONFIG_PINCONF is enabled in qcom_defconfig.
- The vqmmc supply is now enabled for sdcard support on boards that need
it.
- A quirk is added for reading GPIOs on the PM8550 PMIC
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Qualcomm boards flash U-Boot a variety of partitions, implement support
for determining which slot U-Boot is running from, finding the correct
partition for that slot and configuring the appropriate DFU string.
Initially, we only support the RB3 Gen 2 where U-Boot is flashed to the
UEFI partition, and ignore handling of slots. In the future we will
additionally support booting U-Boot from other partitions (e.g. boot)
and correct handling for A/B.
Reviewed-by: Neil Armstrong <[email protected]>
Acked-by: Ilias Apalodimas <[email protected]>
Signed-off-by: Caleb Connolly <[email protected]>
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Set LOG_CATEGORY and pr_fmt. Also fix the time.h include.
Reviewed-by: Neil Armstrong <[email protected]>
Signed-off-by: Caleb Connolly <[email protected]>
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Fastboot is very hungry when it flashes larges chunks, and 8MiB
is way too small, allocate a much bigger size like other platforms
using Fastboot.
Signed-off-by: Neil Armstrong <[email protected]>
Tested-by: Caleb Connolly <[email protected]> # rb1
Reviewed-by: Caleb Connolly <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-microblaze
AMD/Xilinx changes for v2025.01-rc3:
- microblaze:
- Disable JFFS2
- fpga:
- pass compatible flag to fpga_load()
- zynqmp:
- SOM RTC fix
- SC(system controller) PMW polarity fix
- Fix ram_top calculation with introducing XILINX_MINI
- Fix RPU release command
- versal:
- Enable capsule update
- Enable soft reset and Micron octal flashes
- xilinx:
- Align Kconfig regarding SPI_STACKED_PARALLEL
- bootcount:
- Add new zynqmp driver
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Usually ARMv8 platforms allow unaligned access for Normal memory. But
some chips might not allow it by default, having SCTLR.A bit set to 1
before U-Boot execution. One such example is Exynos850 SoC. As
allow_unaligned() is not implemented for ARMv8 at the moment, its __weak
implementation is used, which does nothing. That might lead to unaligned
access abort, for example when running EFI selftest. Fix that by
implementing allow_unaligned() for ARMv8.
The issue was found when running EFI selftest on E850-96 board
(Exynos850 based):
=> bootefi selftest $fdtcontroladdr
...
Executing 'HII database protocols'
"Synchronous Abort" handler, esr 0x96000021, far 0xbaac0991
...
resetting ...
Unaligned abort happens in u16_strnlen(), which is called from
efi_hii_sibt_string_ucs2_block_next():
u16_strlen(blk->string_text)
where 'blk' type is struct efi_hii_sibt_string_ucs2_block. Because this
struct is packed, doing "->string_text" makes 'blk' address incremented
by 1 byte, which makes it unaligned. Although allow_unaligned() was
called in efi_init_early() before EFI selftest execution, it wasn't
implemented for ARMv8 CPUs, so data abort happened.
Signed-off-by: Sam Protsenko <[email protected]>
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SCTLR_EL2 is a 64-bit register [1]. Return its value as long (64 bit)
instead of int (32 bit) in get_sctlr() to make sure it's not trimmed.
[1] https://developer.arm.com/documentation/ddi0595/2021-06/AArch64-Registers/SCTLR-EL2--System-Control-Register--EL2-?lang=en
Fixes: 0ae7653128c8 ("arm64: core support")
Suggested-by: Heinrich Schuchardt <[email protected]>
Signed-off-by: Sam Protsenko <[email protected]>
Reviewed-by: Ilias Apalodimas <[email protected]>
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Fix the critical thermal threshold for i.MX processors, this was changed
while moving the code from imx8m/imx9 directories into a shared place.
There is no need to keep the critical threshold 5 degrees less than the
SoC maximum temperature threshold, what is actually going to happen in
practice is that we are going to power-off the board when the SoC is
still within its working temperature range.
In addition to that this is a change in the actual behavior, that is
introducing a regression to users, and it was hidden within a software
refactoring.
Fixes: d0fe80890ab1 ("imx: Generalize fixup_thermal_trips")
Signed-off-by: Francesco Dolcini <[email protected]>
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Add native support of the bootcount mechanism in the ZynqMP by
utilising internal PMU registers. The Persistent Global Storage
Registers of the Platform Management Unit can keep their value
during reboot cycles unless there is a POR reset, making them
appropriate for the bootcount mechanism.
Signed-off-by: Vasileios Amoiridis <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
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The cpu release command for r5 mode (lockstep/split) argument
accepts only string. But the zynqmp tcminit command accepts
string or number for r5 mode (lockstep/split or 0/1) argument.
To fix the r5 mode argument, the common argument (lockstep/split
or 0/1) is used across different u-boot commands. Use the strcmp()
instead of strncmp() to make uniform the r5 mode (lockstep/split
or 0/1) for the zynqmp tcminit and cpu release command.
Signed-off-by: Padmarao Begari <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
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Wadim Egorov <[email protected]> says:
Our SoMs are available in multiple configurations, managed via device
tree overlays. To determine the specific variant in use, we read the
EEPROM and apply the appropriate overlays during boot to the device tree
used by the OS.
Apply overlays for phyCORE-AM62x and phyCORE-AM64x SoMs.
Future K3 SoMs will be able to reuse this logic and overlays.
Link: https://lore.kernel.org/r/[email protected]
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Include SoM dt-overlays that handle variants of our SoMs into
u-boot's FIT image.
Signed-off-by: Wadim Egorov <[email protected]>
Reviewed-by: Neha Malcom Francis <[email protected]>
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