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DEV_EXT_VIDEO does not have any actual meaning, hence drop it.
Signed-off-by: Bin Meng <[email protected]>
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DEV_FLAGS_SYSTEM does not have any actual meaning, hence drop it.
Signed-off-by: Bin Meng <[email protected]>
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With a working QSPI calibration, the SCLK can now run up to 100MHz
Signed-off-by: Chin Liang See <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Marek Vasut <[email protected]>
Cc: Stefan Roese <[email protected]>
Cc: Vikas Manocha <[email protected]>
Cc: Jagannadh Teki <[email protected]>
Cc: Pavel Machek <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
Acked-by: Marek Vasut <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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This board runs a P5020 or P5040 chip, and utilizes
an EEPROM with similar formatting to the Freescale P5020DS.
Large amounts of this code were developed by
Adrian Cox <adrian at humboldt dot co dot uk>
Signed-off-by: Andy Fleming <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Remove zc70x target which was one setting for zc702 and zc706.
Currently zc702 and zc706 are separated.
Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Joe Hershberger <[email protected]>
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Update this driver to use driver model and change all users.
Signed-off-by: Simon Glass <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
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SPI requires DM and OF that's why enable DM for ZynqMP
and start to use configuration based on embedded OF.
Signed-off-by: Michal Simek <[email protected]>
Signed-off-by: Simon Glass <[email protected]>
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We need to mark some device tree nodes so that they are available before
relocation. This enables driver model to find these automatically. In the
case of SPL it ensures that these nodes will be retained in SPL.
Signed-off-by: Simon Glass <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
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Move to using device tree control in SPL so that we can use the same driver
code in both SPL and U-Boot proper.
Signed-off-by: Simon Glass <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
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Add support for the debug UART to assist with early debugging. Enable it
for Zybo as an example.
Signed-off-by: Simon Glass <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
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Move to the new way of starting up SPL. Clearing of BSS and calling
board_init_r() is now handled by crt0.S.
Also tidy up the header include order.
Signed-off-by: Simon Glass <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
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Add DTS for ep108 board.
Signed-off-by: Michal Simek <[email protected]>
Series-to: u-boot
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The DMA, QSPI, and SD/MMC reset bits are located in the permodrst register,
not the mpumodrst. So the bank for these reset bits should be 1, not 0.
Signed-off-by: Dinh Nguyen <[email protected]>
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The SDHCI is introduced by sama5d2, named as Secure Digital Multimedia
Card Controller(SDMMC). It supports the embedded MultiMedia Card (e.MMC)
Specification V4.41, the SD Memory Card Specification V3.0, and the SDIO
V3.0 specification. It is compliant with the SD Host Controller Standard
V3.0 specification.
Signed-off-by: Wenyou Yang <[email protected]>
Reviewed-by: Andreas Bießmann <[email protected]>
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Some peripherals may need a second clock source that may be different
from the system clock. This second clock is the generated clock (GCK)
and is managed by the PMC via PMC_PCR.
For simplicity, the clock source of the GCK is fixed to PLLA_CLK.
Signed-off-by: Wenyou Yang <[email protected]>
Reviewed-by: Andreas Bießmann <[email protected]>
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Provide the specific addresses for the Chip ID and Chip ID Extension
registers, instead of the offset, which make it use on other chips.
Signed-off-by: Wenyou Yang <[email protected]>
Reviewed-by: Andreas Bießmann <[email protected]>
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T2081 rev 1.1 changes MEM_PLL_RAT in RCW which requires new parsing
for PLL ratio.
Signed-off-by: Shengzhou Liu <[email protected]>
Reviewed-by: York Sun <[email protected]>
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qe-tdm is muxed with diu, if hwconfig setted as qe-tdm,
assign muxed pins to qe-tdm, then delete diu node from
device tree.
Signed-off-by: Zhao Qiang <[email protected]>
Reviewed-by: York Sun <[email protected]>
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This patch will fix these checkpatch issues.
ERROR: Macros with complex values should be enclosed in parentheses
+#define DEFAULT_DQS_X4 (DEFAULT_DQS << 24) || (DEFAULT_DQS << 16) \
+ || (DEFAULT_DQS << 8) || (DEFAULT_DQS << 0)
ERROR: space prohibited before that ',' (ctx:WxW)
+ writel(val , &drex0->concontrol);
^
ERROR: space prohibited before that ',' (ctx:WxW)
+ writel(val , &drex1->concontrol);
^
Signed-off-by: Minkyu Kang <[email protected]>
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There are 8 pins for SD card in Exynos, but the MUX was configured
only for 7, since the one was used for card detection.
This caused the pin's pull wrong configuration.
This commit fixes this and the card detect can work properly,
after call this function.
Tested-on: Odroid U3 and Odroid X2.
Signed-off-by: Przemyslaw Marczak <[email protected]>
Cc: Guillaume GARDET <[email protected]>
Cc: Lukasz Majewski <[email protected]>
Cc: Jaehoon Chung <[email protected]>
Cc: Minkyu Kang <[email protected]>
Cc: Simon Glass <[email protected]>
Acked-by: Jaehoon Chung <[email protected]>
Tested-by: Lukasz Majewski <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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This commit adds implementation of Sandbox ADC device emulation.
The device provides:
- single and multi-channel conversion
- 4 channels with predefined conversion output data
- 16-bit resolution
Signed-off-by: Przemyslaw Marczak <[email protected]>
Cc: Simon Glass <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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This ADC is required for Odroid's board revision detection.
The pre-reloc request is enabled, since board detection will
be done in one of early function call.
Signed-off-by: Przemyslaw Marczak <[email protected]>
Cc: Minkyu Kang <[email protected]>
Cc: Simon Glass <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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This commit adds common ADC node, which is disabled as default.
Signed-off-by: Przemyslaw Marczak <[email protected]>
Cc: Minkyu Kang <[email protected]>
Cc: Simon Glass <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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Signed-off-by: Przemyslaw Marczak <[email protected]>
Cc: Minkyu Kang <[email protected]>
Cc: Simon Glass <[email protected]>
Tested-by: Anand Moon <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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This commit adds driver for Exynos54xx ADC subsystem.
The driver is implemented using driver model, amd provides
ADC uclass's methods for ADC single channel operations:
- adc_start_channel()
- adc_channel_data()
- adc_stop()
The basic parameters of ADC conversion, are:
- sample rate: 600KSPS
- output the data as average of 8 time conversion
ADC features:
- sample rate: 600KSPS
- resolution: 12-bit
- channels: 10 (analog multiplexer)
Signed-off-by: Przemyslaw Marczak <[email protected]>
Cc: Minkyu Kang <[email protected]>
Cc: Simon Glass <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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The proper CPU ID for those Exynos variants is 0x5422,
but before the 0x5800 was set. This commit fix this back.
Changes:
- set cpu id to 0x5422 instead of 0x5800
- remove macro proid_is_exynos5800()
- add macro proid_is_exynos5422()
- change the calls to proid_is_exynos5800() with new macro
Signed-off-by: Przemyslaw Marczak <[email protected]>
Cc: Minkyu Kang <[email protected]>
Cc: Simon Glass <[email protected]>
Tested-by: Anand Moon <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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This platform is based on Exynos5800 but the cpu id is 0x5422.
This doesn't fit the common Exynos SoC name convention, so now,
the CPU name is defined by device tree string, to be printed
properly.
Signed-off-by: Przemyslaw Marczak <[email protected]>
Cc: Minkyu Kang <[email protected]>
Cc: Simon Glass <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Tested-by: Anand Moon <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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The CPU name for Exynos was concatenated with cpu id,
but for new Exynos platforms, like Chromebook Peach Pi
based on Exynos5800, the name of SoC variant does not
include the real SoC cpu id (0x5422).
For such case, the CPU name should be defined in device tree.
This commit introduces new device-tree property for Exynos:
- "cpu-model" - with cpu name string
If defined, then the cpu id is not printed.
Signed-off-by: Przemyslaw Marczak <[email protected]>
Cc: Minkyu Kang <[email protected]>
Cc: Simon Glass <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Tested-by: Anand Moon <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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crt0.S do both memset the bss section and call board_init_r for us, so
remove them from board_init_f().
Signed-off-by: Josh Wu <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Andreas Bießmann <[email protected]>
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Add mx7 secure boot support, add helper macro IS_HAB_ENABLED_BIT
to get the corresponding bit mask per SoC (mx7 or mx6) to identify
if securue boot feature is enabled/disabled.
On authenticate_image only check for mmu enabled on mx6 SoC to
force pu_irom_mmu_enabled so ROM code can perform mmu cache flush
mx7 SoC ROM code does not have this issue as ROM enables cache support
based on fuse settings.
Signed-off-by: Adrian Alonso <[email protected]>
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Use read_fuse api fuction call to read secure boot fuse
settings (enabled/disabled).
Signed-off-by: Adrian Alonso <[email protected]>
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Add secure boot fuse details (location) bank = 1, word = 3;
for imx7 SoC platforms.
Signed-off-by: Adrian Alonso <[email protected]>
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Add secure boot fuse details (location) bank = 0, word = 6;
for imx6 SoC platforms.
Signed-off-by: Adrian Alonso <[email protected]>
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Add secure boot fuse helper struct to abstract the way
to find out secure boot settings per SoC iMX family
Signed-off-by: Adrian Alonso <[email protected]>
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Rework unified section macro select via Kconfig option
instead of macro definition in mx7_common header file.
Signed-off-by: Adrian Alonso <[email protected]>
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Add CONFIG_ROM_UNIFIED_SECTIONS for mx6sx and mx6ul target
platforms to resolve corresponding HAB_RVT_BASE base address,
the RVT table contains pointers to the HAB API functions in
ROM code.
Signed-off-by: Adrian Alonso <[email protected]>
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Rework secure boot support for imx6, move existing hab support
for imx6 into imx-common for SoC reuse.
Signed-off-by: Adrian Alonso <[email protected]>
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Move common chip revision id's to main cpu header file
mx25 generic include cpu header for chip revision
Signed-off-by: Adrian Alonso <[email protected]>
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add some missing gpr register defines.
Signed-off-by: Heiko Schocher <[email protected]>
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We can reuse common functions in lib/time.c, but not reimplement
functions in imx-common/time.c.
Only keep timer_init ,get_tbclk and implement timer_read_counter in
imx-common/time.c.
Signed-off-by: Peng Fan <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Fabio Estevam <[email protected]>
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Freescale ARM-based Layerscape LS102xA contain a SATA controller
which comply with the serial ATA 3.0 specification and the
AHCI 1.3 specification.
This patch adds SATA feature on ls1021aqds and ls1021atwr boards.
Signed-off-by: Tang Yuantian <[email protected]>
Reviewed-by: York Sun <[email protected]>
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After the secondary cores enter U-Boot, use CONFIG_ARMV8_MULTIENTRY to
make secondary cores excute in spin loop.
Signed-off-by: Hou Zhiqiang <[email protected]>
Signed-off-by: Mingkai Hu <[email protected]>
Signed-off-by: Gong Qianyu <[email protected]>
Reviewed-by: York Sun <[email protected]>
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This patch adds esdhc support for ls1043ardb.
Signed-off-by: Yangbo Lu <[email protected]>
Signed-off-by: Gong Qianyu <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Signed-off-by: Hou Zhiqiang <[email protected]>
Signed-off-by: Shaohui Xie <[email protected]>
Signed-off-by: Mingkai Hu <[email protected]>
Signed-off-by: Gong Qianyu <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Signed-off-by: Gong Qianyu <[email protected]>
Signed-off-by: Hou Zhiqiang <[email protected]>
Signed-off-by: Shaohui Xie <[email protected]>
Signed-off-by: Mingkai Hu <[email protected]>
Reviewed-by: York Sun <[email protected]>
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