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Signed-off-by: Masahiro Yamada <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
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Move arch/arm/include/asm/arch-zynq/*
-> arch/arm/mach-zynq/include/mach/*
Signed-off-by: Masahiro Yamada <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
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Move arch/arm/cpu/armv7/zynq/* -> arch/arm/mach-zynq/*
Signed-off-by: Masahiro Yamada <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
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The comment line in arch/arm/cpu/armv7/zynq/config.mk says that
the option "-mfpu=neon" is necessary for compiling lowlevel_init.S.
We do not have to give it to all the source files.
Signed-off-by: Masahiro Yamada <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
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Enable SDHCI0 for zynqmp.
Add empty gpio.h because of sdhci requirement.
Signed-off-by: Michal Simek <[email protected]>
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Added the SPI driver support for ZynqMP
The controller is same as zynq SPI controller
Signed-off-by: Siva Durga Prasad Paladugu <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Jagannadha Sutradharudu Teki <[email protected]>
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Enable the i2c driver for ZynqMP
Also enable the eeprom for read and writes
to eeprom on ZynqMP
ZynqMP uses the same i2c controller as in Zynq
Signed-off-by: Siva Durga Prasad Paladugu <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
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Add support for EMMC bootmode.
Signed-off-by: Michal Simek <[email protected]>
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Add support for Veloce - zynqmp emulation platform.
Platform doesn't support SDHCI.
Signed-off-by: Michal Simek <[email protected]>
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Fix wrong timer calculation in get_timer_masked incase of
overflow.
This fixes the issue of getting wrong time from get_timer()
calls.
Signed-off-by: Siva Durga Prasad Paladugu <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
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Add support for loading sw for R5 with enabling for zynqmp.
Signed-off-by: Michal Simek <[email protected]>
Signed-off-by: Siva Durga Prasad Paladugu <[email protected]>
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Define the mmu table till 2MB granularity
enable dcaches for zynqmp.
Signed-off-by: Siva Durga Prasad Paladugu <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
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Disable all level shifters before enabling
the PS-to-PL level shifters as it would
be good to disable all level shifters before
enabling the PS-to-PL in order to ensure that
it is in proper state
Signed-off-by: Siva Durga Prasad Paladugu <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
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We are about to change the location for ps7_init files, breaking the
current work-flows. It is good time to drop the legacy ps7_init.c/h
support.
Going forward, please use ps7_init_gpl.c/h all the time.
If you are still using old Xilinx tools that are only able to
generate ps7_init.c/h, rename them into ps7_init_gpl.c/h.
Signed-off-by: Masahiro Yamada <[email protected]>
Suggested-by: Sören Brinkmann <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
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The PicoZed is a System-on-Module board which is marketed as part of
the ZedBoard/MicroZed/etc. collection. It includes a Zynq-7000
processor.
This patch adds support that covers all the variants of the PicoZed
including the SKUs with Z7010/Z7020 and Z7015/Z7030 Zynq chips. This
patch set however only covers support for the System-on-Module and does
not cover any extra components that are available on carrier boards
(except those that are fanned out of the module itself).
More information on this board, its variants and available carrier
boards is available at: http://zedboard.org/product/picozed
Signed-off-by: Nathan Rossi <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
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Most of the code is taken (and adapted) from Linux kernel driver.
Just add CONFIG_ZYNQ_GPIO to you config to enable it
Signed-off-by: Andrea Scian <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
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Arria V SocDK has same QSPI and SPI flash configuration as Socrates. Add
support for it.
Signed-off-by: Pavel Machek <[email protected]>
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Add device-tree handover to Linux kernel conforming with MIPS UHI [1].
Register $a0 will be set to the reserved value -2. The address of
the device-tree blob will be stored as KSEG0 address in $a1. $a2 and
$a3 are set to zero.
[1] http://prplfoundation.org/wiki/MIPS_documentation
Signed-off-by: Daniel Schwierzeck <[email protected]>
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SocDK has same QSPI and SPI flash configuration as Socrates. Add
support for it.
Signed-off-by: Pavel Machek <[email protected]>
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This erratum requires setting GLITCH_EN bit in debug register to
enable digital filter to improve clock stability.
Signed-off-by: York Sun <[email protected]>
CC: Heiko Schocher <[email protected]>
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This patch adds esdhc support for ls2085a.
Signed-off-by: Yangbo Lu <[email protected]>
Signed-off-by: York Sun <[email protected]>
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Enable NAND boot support using SPL framework. To boot from
NAND, either use DIP switches on board, or "qixis_reset nand"
command. Details of forming NAND image can be found in README.
Signed-off-by: Scott Wood <[email protected]>
[York Sun: Remove +S from defconfig after commit 252ed872]
Signed-off-by: York Sun <[email protected]>
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This adds NAND boot support for LS2085AQDS, using SPL framework.
Details of forming NAND image can be found in README.
Signed-off-by: Scott Wood <[email protected]>
[York Sun: Remove +S from defconfig after commit 252ed872]
Signed-off-by: York Sun <[email protected]>
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IFC has two register pages.Till IFC version 1.4 each
register page is 4KB each.But IFC ver 2.0 register page
size is 64KB each.IFC regiters structure is break into
two viz FCM and RUNTIME.FCM(Flash control machine) registers
are defined in PAGE0 and controls IFC generic functionality.
RUNTIME registers are defined in PAGE1 and controls NAND and
GPCM funcinality.
FCM and RUNTIME structures defination is common for IFC
version 1.4 and 2.0.
Signed-off-by: Jaiprakash Singh <[email protected]>
Signed-off-by: York Sun <[email protected]>
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This driver adds support for the USB peripheral on Freescale Vybrid
SoC's.
Signed-off-by: Sanchayan Maity <[email protected]>
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This adds initial support for Colibri VF50/VF61 based on Freescale
Vybrid SoC.
- CPU clocked at 396/500 MHz
- DDR3 at 396MHz
- for VF50, use PLL2 as memory clock (synchronous mode)
- for VF61, use PLL1 as memory clock (asynchronous mode)
- Console on UART0 (Colibri UART_A)
- Ethernet on FEC1
- PLL5 based RMII clocking (E.g. No external crystal)
- UART_A and UART_C I/O muxing
- Boot from NAND by default
Tested on Colibri VF50/VF61 booting using serial loader over UART.
Signed-off-by: Sanchayan Maity <[email protected]>
Acked-by: Stefan Agner <[email protected]>
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Enables caches which provides a rather huge speedup of the boot loader.
Also mark the on-chip RAM as cachable since this is the area U-Boot runs
from.
Signed-off-by: Sanchayan Maity <[email protected]>
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Vybrid product family consists of several rather similar SoC which
can be determined by softare during boot time. This allows use of
variable ${soc} for Linux device tree files. Detect VF5xx CPU's by
reading the CPU count register. We can determine the second number
of the CPU type (VF6x0) which indicates the presence of a L2 cache.
Signed-off-by: Stefan Agner <[email protected]>
Signed-off-by: Sanchayan Maity <[email protected]>
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Enable the SCSC (Slow Clock Source Controller) and select the external
32KHz oscillator. This improves the accuracy of the RTC.
Signed-off-by: Sanchayan Maity <[email protected]>
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In order to avoid code duplication, move the DDR3 initialization to the
common place under imx-common. Currently ROW_DIFF and COL_DIFF can be
chosen from the board file. The JEDEC timings are specified using a
common ddr3_jedec_timings structure.
Signed-off-by: Stefan Agner <[email protected]>
Signed-off-by: Sanchayan Maity <[email protected]>
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Correct and complete the mux names following AM437x Technical Reference Manual.
Signed-off-by: Bryan De Faria <[email protected]>
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Add architecture-specific u-boot.lds and remove all board-specific
u-boot.lds.
All the .text customization that was board-specific have been
moved inside the related include/configs, inside a
LDS_BOARD_TEXT define.
Signed-off-by: Angelo Dureghello <[email protected]>
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Implemented fb_set_reboot_flag() for OMAP5 to set
an environment variable 'dofastboot' when reboot-bootloader called.
This environment variable will be checked in boot command and fastboot
will be called if the variable is set.
If the bootcmd env variable of OMAP5 common is overwritten with board-specific
command, then these changes will not apply.
This was originally intended for DRA7 platform, but now applies to all OMAP5.
Ref:
http://git.omapzoom.org/?p=repo/u-boot.git;a=commit;h=19da2e436e9806259cf1f4988b9e046ab256bf2c
Signed-off-by: Angela Stegmaier <[email protected]>
Signed-off-by: Dileep Katta <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
[trini: Make it check for !CONFIG_ENV_IS_NOWHERE as we can't saveenv()
in that case]
Signed-off-by: Tom Rini <[email protected]>
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This patch populates serial number environment variable from
die_id_0 and die_id_1 register values for DRA7xx boards.
The function is added in omap common code so that this can be re-used.
Serial# environment variable will be useful to show correct
information in "fastboot devices" commands.
Ref:
http://git.omapzoom.org/?p=repo/u-boot.git;a=commit;h=a6bcaaf67f6e4bcd97808f53d0ceb4b0c04d583c
Signed-off-by: Angela Stegmaier <[email protected]>
Signed-off-by: Dileep Katta <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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Signed-off-by: Peter Howard <[email protected]>
[trini: Add config file, update for ..._ether_addr() -> ..._ethaddr() rename]
Signed-off-by: Tom Rini <[email protected]>
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The LS2085ARDB is a evaluation platform that supports LS2085A
family SoCs. This patch add sbasic support for the platform.
Signed-off-by: York Sun <[email protected]>
Signed-off-by: Prabhakar Kushwaha <[email protected]>
Signed-off-by: Bhupesh Sharma <[email protected]>
Signed-off-by: Scott Wood <[email protected]>
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The LS2085AQDS is an evaluatoin platform that supports the LS2085A
family SoCs. This patch add basic support of the platform.
Signed-off-by: York Sun <[email protected]>
Signed-off-by: Prabhakar Kushwaha <[email protected]>
Signed-off-by: Bhupesh Sharma <[email protected]>
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Wire rate IO Processor (WRIOP) provide support of receive and transmit
ethernet frames from the ethernet MAC. Here Each WRIOP block supports
upto 64 DPMACs.
Create a house keeping data structure to support upto 16 DPMACs and
store external phy related information.
Signed-off-by: Prabhakar Kushwaha <[email protected]>
Signed-off-by: York Sun <[email protected]>
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This patch adds support to print out the Reset Configuration Word
information.
Signed-off-by: Bhupesh Sharma <[email protected]>
Signed-off-by: York Sun <[email protected]>
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The memac for PHY management on little endian SoCs is similar on big
endian SoCs, so we modify the driver by using I/O accessor function to
handle the endianness, so the driver can be reused on little endian
SoCs, we introduce CONFIG_SYS_MEMAC_LITTLE_ENDIAN for little endian
SoCs, if the CONFIG_SYS_MEMAC_LITTLE_ENDIAN is defined, the I/O access
is little endian, if not, the I/O access is big endian. Move fsl_memac.h
out of powerpc include.
Signed-off-by: Shaohui Xie <[email protected]>
Signed-off-by: York Sun <[email protected]>
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Changed MC firmware loading to comply with the new MC boot architecture.
Flush D-cache hierarchy after loading MC images. Add environment
variables "mcboottimeout" for MC boot timeout in milliseconds,
"mcmemsize" for MC DRAM block size. Check MC boot status before calling
flib functions.
Signed-off-by: J. German Rivera <[email protected]>
Signed-off-by: York Sun <[email protected]>
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Add support of SerDes framework for Layerscape Architecture.
- Add support of 2 SerDes block
- Add SerDes protocol parsing and detection
- Create table of SerDes protocol supported by LS2085A
Signed-off-by: Prabhakar Kushwaha <[email protected]>
Signed-off-by: Minghuan Lian <[email protected]>
Reviewed-by: York Sun <[email protected]>
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The serial nodes in the fsl-lsch3 device trees have compatible =
"fsl,ns16550", "ns16550a" -- so don't look for "ns16550".
Signed-off-by: Scott Wood <[email protected]>
Signed-off-by: York Sun <[email protected]>
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Without this "USB may not work" according to the erratum text, though I
did not notice a problem without it.
Signed-off-by: Scott Wood <[email protected]>
Signed-off-by: York Sun <[email protected]>
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