| Age | Commit message (Collapse) | Author |
|---|
|
Signed-off-by: Scott Wood <[email protected]>
Signed-off-by: York Sun <[email protected]>
|
|
During booting, IFC is mapped to low region. After booting up, IFC is
remapped to high region for larger space. The environmental variables are
also stored at high region. In order to read the variables during booting,
a virtual mapping is required.
Cache was enabled for entire IFC space before. Actually the first two
entries are big enough (4MB) to cover the boot code and environmental
variables. Remove extra entries. Move OCRAM entry out of ifdef.
Signed-off-by: York Sun <[email protected]>
|
|
This is required for TLB invalidation broadcasts to work.
Signed-off-by: Scott Wood <[email protected]>
Signed-off-by: York Sun <[email protected]>
|
|
Add support for reset_cpu() by asserting RESET_REQ_B.
Signed-off-by: pankaj chauhan <[email protected]>
Signed-off-by: York Sun <[email protected]>
|
|
The timer clock is system clock divided by 4, not fixed 12MHz.
This is common to the SoC, not board specific. Primary core is
fixed when u-boot still runs in board_f. Secondary cores are
fixed by reading a variable set by u-boot.
Signed-off-by: York Sun <[email protected]>
CC: Mark Rutland <[email protected]>
|
|
Platform clock is half of platform PLL. There is an additional divisor
in place. Clean up code copied from powerpc.
Signed-off-by: York Sun <[email protected]>
|
|
ls2085a_common.h contains hard-coded information for NOR/NAND flash,
I2C, DDR, etc. These are platform specific. Move them out of common
header file and placed into respective board header files.
Move TEXTBASE to 1MB offset to fit NOR flash with up to 1MB sector
size.
Enable command auto complete. Update prompt symbol. Set fdt_high to
0xa0000000 because Linux requires that the fdt be 8-byte aligned
and below 512 MiB. Besides ensuring compliance with the 512 MiB
limit, this avoids problems with the dtb being misaligned within
the FIT image.
Change the MC FW, MC DPL and Debug server NOR addresses in compliance
with the NOR flash layouts for 128MB flash.
Add PCIe macros. Enable "loadb" command. Disable debug server.
Enable workaround for erratum A008511.
Stop reset on panic for postmortem debugging.
Signed-off-by: Prabhakar Kushwaha <[email protected]>
Signed-off-by: Scott Wood <[email protected]>
Signed-off-by: Bhupesh Sharma <[email protected]>
Signed-off-by: Minghuan Lian <[email protected]>
Signed-off-by: York Sun <[email protected]>
|
|
Generic Timer may contain an erroneous value. The workaround is to
read it twice until getting the same value.
Signed-off-by: York Sun <[email protected]>
|
|
LDPAA Ethernet driver is a freescale's new ethernet driver based on
Layerscape architecture.
Every ethernet driver controls on DPNI object. Where all DPNIs share
one common DPBP and DPIO object to support Rx and Tx flows.
Signed-off-by: Prabhakar Kushwaha <[email protected]>
CC: Cristian Sovaiala <[email protected]>
CC: Bogdan Hamciuc <[email protected]>
CC: J. German Rivera <[email protected]>
[York Sun: s/NetReceive/net_process_received_packet]
Reviewed-by: York Sun <[email protected]>
|
|
We want to be able to set up the device tree in SPL, so move this code
to a common place.
Signed-off-by: Simon Glass <[email protected]>
|
|
Signed-off-by: Masahiro Yamada <[email protected]>
Cc: Linus Walleij <[email protected]>
|
|
Switch to CONFIG_ARCH_INTEGRATOR defined by Kconfig.
Signed-off-by: Masahiro Yamada <[email protected]>
Cc: Linus Walleij <[email protected]>
|
|
Select integrator boards by the combination of platform select (AP/CP)
and core module select (CM720T, CM920T, ...).
This allows us to remove CONFIG_SYS_EXTRA_OPTIONS and make Kconfig
much cleaner.
Signed-off-by: Masahiro Yamada <[email protected]>
Cc: Linus Walleij <[email protected]>
|
|
The board/SoC select menu in arch/arm/Kconfig is still cluttered.
Add ARCH_INTEGRATOR into arch/arm/Kconfig and move the board select
under arch/arm/mach-integrator.
Signed-off-by: Masahiro Yamada <[email protected]>
Cc: Linus Walleij <[email protected]>
|
|
arch/arm/cpu/arm720t/start.S includes <asm/arch/hardware.h>,
but the hardware.h headers of ARM720T boards are all empty.
Signed-off-by: Masahiro Yamada <[email protected]>
Cc: Linus Walleij <[email protected]>
Cc: Stephen Warren <[email protected]>
Cc: Tom Warren <[email protected]>
|
|
For some files I neglected to add a license. Rectify this:
arch/arm/dts/exynos4210-pinctrl-uboot.dtsi
arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi
arch/arm/dts/exynos5250-pinctrl-uboot.dtsi
arch/arm/dts/exynos54xx-pinctrl-uboot.dtsi
arch/arm/dts/s5pc100-pinctrl.dtsi
arch/arm/dts/s5pc110-pinctrl.dtsi
This file came from Linux and has no license information there, so add a
comment to that effect:
arch/sandbox/include/asm/bitops.h
This file also came from Linux - presumably someone from TI could add the
license:
include/dt-bindings/pinctrl/omap.h
Signed-off-by: Simon Glass <[email protected]>
Reported-by: Ingrid Viitanen <[email protected]>
|
|
Signed-off-by: Kamil Lulko <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
|
|
Signed-off-by: Kamil Lulko <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
|
|
Signed-off-by: Kamil Lulko <[email protected]>
|
|
Add the initial SPL support for HummingBoard-i2eX, which is based on a
MX6 Dual.
For more information about HummingBoard, please check:
http://www.solid-run.com/products/hummingboard/
Based on the work from Jon Nettleton and Rabeeh Khoury.
Signed-off-by: Fabio Estevam <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
|
|
DDR3 has a special Precharge power-down mode: fast-exit vs slow-exit.
In slow-exit mode the DLL is off but in some quiescent state that makes it easy
to turn on again in tXPDLL cycles (about 10tCK) vs the full tDLLK (512tCK).
In fast-exist mode the DLL is maintained such that it is ready again in about
3tCK.
Signed-off-by: Tim Harvey <[email protected]>
|
|
Reading the boot mode pins after power-up does not necessarily represent the
boot mode used by the ROM loader. For example the state of a pin may have
changed because a recovery switch which was pressed to enter USB mode is
already released after plugging in USB.
The ROM loader stores the value a fixed address in OCRAM. Use this value
instead of reading the boot map pins.
The GLOBAL_BOOT_MODE_ADDR for i.MX28 is taken from an U-Boot patch for the
MX28EVK:
http://repository.timesys.com/buildsources/u/u-boot/u-boot-2009.08/u-boot-2009.08-mx28-201012211513.patch
Leave the boot mode detection for the i.MX23 untouched. Someone has to test
whether the i.MX ROM loader does also store the boot mode in OCRAM and if the
address match.
This patch superseeds my incorrect patch:
ARM: mxs: get boot mode from OTP
http://patchwork.ozlabs.org/patch/454930/
Signed-off-by: Jörg Krause <[email protected]>
Cc: Stefano Babic <[email protected]>
|
|
Freescale's Layerscape Management Complex (MC) provide support various
objects like DPRC, DPNI, DPBP and DPIO.
Where:
DPRC: Place holdes for other MC objectes like DPNI, DPBP, DPIO
DPBP: Management of buffer pool
DPIO: Used for used to QBMan portal
DPNI: Represents standard network interface
These objects are used for DPAA ethernet drivers.
Signed-off-by: J. German Rivera <[email protected]>
Signed-off-by: Lijun Pan <[email protected]>
Signed-off-by: Stuart Yoder <[email protected]>
Signed-off-by: Geoff Thorpe <[email protected]>
Signed-off-by: Haiying Wang <[email protected]>
Signed-off-by: Cristian Sovaiala <[email protected]>
Signed-off-by: pankaj chauhan <[email protected]>
Signed-off-by: Prabhakar Kushwaha <[email protected]>
Reviewed-by: York Sun <[email protected]>
|
|
This patch adds description for NOR flash layout (firmware images)
in the README file for LS2085A platforms.
Signed-off-by: Bhupesh Sharma <[email protected]>
Reviewed-by: York Sun <[email protected]>
|
|
The Debug Server driver is responsible for loading the Debug
server FW on the Service Processor (Cortex-A5 core) on LS2085A like
SoCs and then polling for the successful initialization of the same.
TOP MEM HIDE is adjusted to ensure the space required by Debug Server
FW is accounted for. MC uses the DDR area which is calculated as:
MC DDR region start = Top of DDR - area reserved by Debug Server FW
Signed-off-by: Bhupesh Sharma <[email protected]>
Reviewed-by: York Sun <[email protected]>
|
|
Muram will power off during deepsleep, and the microcode of qe
in muram will be lost, it should be reload when resume.
Signed-off-by: Zhao Qiang <[email protected]>
Reviewed-by: York Sun <[email protected]>
|
|
The patch uses the common function name ft_pci_setup to replace
ft_pcie_setup, then removes unnecessary pcie_layerscape.h because
all the functions have been declared in common.h.
Signed-off-by: Minghuan Lian <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Reviewed-by: York Sun <[email protected]>
|
|
1. Default environment will be used for secure boot flow
which can't be edited or saved.
2. Command for secure boot is predefined in the default
environment which will run on autoboot (and autoboot is
the only option allowed in case of secure boot) and it
looks like this:
#define CONFIG_SECBOOT \
"setenv bs_hdraddr 0xe8e00000;" \
"esbc_validate $bs_hdraddr;" \
"source $img_addr;" \
"esbc_halt;"
#endif
3. Boot Script can contain esbc_validate commands and bootm command.
Uboot source command used in default secure boot command will
run the bootscript.
4. Command esbc_halt added to ensure either bootm executes
after validation of images or core should just spin.
Signed-off-by: Ruchika Gupta <[email protected]>
Signed-off-by: Gaurav Rana <[email protected]>
Reviewed-by: York Sun <[email protected]>
|
|
For LS102xA, some workarounds are only used in VER1.0, so silicon
version detection are added for QDS and TWR boards.
Signed-off-by: Alison Wang <[email protected]>
Reviewed-by: York Sun <[email protected]>
|
|
Since the SoCFPGA SDRAM support is not yet applied to u-boot, we still
need to be able to compile the codebase. Introduce stub functions which
temporarily supplement the missing SDRAM setup functions.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Chin Liang See <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Pavel Machek <[email protected]>
Cc: Stefan Roese <[email protected]>
Cc: Tom Rini <[email protected]>
Cc: Vince Bridgers <[email protected]>
|
|
Remap SDRAM to 0x0, and clear OCRAM's ECC in board_init_f().
Signed-off-by: Dinh Nguyen <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
|
|
Signed-off-by: Dinh Nguyen <[email protected]>
|
|
For SoCFGPA, use the common ARMv7 lowlevel_init. Thus, we can delete the
SoCFPGA lowlevel_init.S file.
Signed-off-by: Dinh Nguyen <[email protected]>
|
|
Signed-off-by: Dinh Nguyen <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
|
|
Add a call to checkboard along with sdram intilialization and calibration.
Signed-off-by: Dinh Nguyen <[email protected]>
|
|
Signed-off-by: Dinh Nguyen <[email protected]>
Acked-by: Marek Vasut <[email protected]>
|
|
Signed-off-by: Dinh Nguyen <[email protected]>
|
|
Add the calls in the spl_board_init to enable SDRAM, timer, and UART.
Signed-off-by: Dinh Nguyen <[email protected]>
Acked-by: Marek Vasut <[email protected]>
|
|
These functions will be needed for use by the SPL for enabling the
console and sdram initialization.
Signed-off-by: Dinh Nguyen <[email protected]>
Acked-by: Marek Vasut <[email protected]>
Acked-by: Pavel Machek <[email protected]>
|
|
|
|
U-Boot does not have system calls (the services it exposes to
standalone commands use a different mechanism), so the syscall handler
is dead code. It's also broken code, as it assumes it is located at
0xc00 -- while even before the patch to stop relocating exception
vectors to 0, U-Boot had the syscall at 0x900.
The critical and machine check return paths are never called -- the
regular exception return path is used instead, which works because
xSRR0/1 have already been saved and can be restored via the regular
SRR0/1 (we don't care too much in U-Boot about taking a critical/mcheck
inside another exception prolog/epilog).
Also remove a few other small unused functions.
Signed-off-by: Scott Wood <[email protected]>
Reviewed-by: York Sun <[email protected]>
|
|
Booke does not require exception vectors to be located at address zero.
U-Boot was doing so anyway, simply because that's how it had been done
on other PPC. The downside of this is that once the OS is loaded to
address zero, the exception vectors have been overwritten -- which
makes it difficult to diagnose a crash that happens after that point.
The IVOR setup and trap entry code is simplified somewhat as a result.
Also, there is no longer a need to align individual exceptions on 0x100
byte boundaries.
Signed-off-by: Scott Wood <[email protected]>
Reviewed-by: York Sun <[email protected]>
|
|
T2080 rev1.1 also needs erratum a007186.
Signed-off-by: Shengzhou Liu <[email protected]>
Reviewed-by: York Sun <[email protected]>
|
|
|
|
the ldb clock can be setup in board code (for example set through PLL5).
Update the ldb_clock rate also through board code.
This should be removed, if a clock framework is availiable.
Signed-off-by: Heiko Schocher <[email protected]>
Tested-by: Eric Nelson <[email protected]>
|
|
Add dummy bootz_setup implementation allowing the u-boot sandbox to
run bootz. This recognizes both ARM and x86 zImages to validate a
valid zImage was loaded.
Signed-off-by: Sjoerd Simons <[email protected]>
Acked-by: Simon Glass <[email protected]>
|
|
Follow the convention of other architectures and move the platform
specific linux bootm code into sandbox/lib/bootm.c.
Signed-off-by: Sjoerd Simons <[email protected]>
Acked-by: Simon Glass <[email protected]>
|
|
Don't store it in a u32.
Don't dereference the bus address as if it were a virtual address
(fixes 284231e49a2b4 ("ahci: Support splitting of read transactions
into multiple chunks")).
Fixes crash on boot in MPC8641HPCN_36BIT target.
Signed-off-by: Scott Wood <[email protected]>
Cc: Vadim Bendebury <[email protected]>
Acked-by: York Sun <[email protected]>
|
|
Move this over to Kconfig and tidy up.
Signed-off-by: Simon Glass <[email protected]>
|
|
Move CONFIG_BOOT_STAGE and its associated options to Kconfig. Adjust
existing users and code.
Signed-off-by: Simon Glass <[email protected]>
|
