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Signed-off-by: Kuan-Yu Kuo <[email protected]>
Cc: Macpaul Lin <[email protected]>
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The timer_init function is called before relocation and writes to bss data
were corrupting relocation data. Fix this by removing the call to
reset_timer_masked. The initial timer count should be 0 or near 0 anyway,
so initializing the variables are not needed.
Signed-off-by: Rob Herring <[email protected]>
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The 150MHz clock rate gives u-boot time functions problems and there's no
benefit to a fast clock, so lower the rate.
Signed-off-by: Rob Herring <[email protected]>
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get_tbclk should return the timer's frequency, not CONFIG_SYS_HZ.
Signed-off-by: Rob Herring <[email protected]>
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interrupt_init also sets up the abort stack, but is not setup before
relocation. So any aborts during relocation will hang and not print out
any useful information. Fix this by moving the interrupt_init to after
the stack setup in board_init_f.
Signed-off-by: Rob Herring <[email protected]>
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Synchronize the code with mips64/cache.S, in order to
allow further unifications.
Signed-off-by: Gabor Juhos <[email protected]>
Cc: Daniel Schwierzeck <[email protected]>
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Synchronize the code with mips64/cache.S, in order to
allow further unifications.
Signed-off-by: Gabor Juhos <[email protected]>
Cc: Daniel Schwierzeck <[email protected]>
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Synchronize the code with mips64/cache.S, in order to
allow further unifications.
Signed-off-by: Gabor Juhos <[email protected]>
Cc: Daniel Schwierzeck <[email protected]>
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Make it similar to the code in mips{32,64}/start.S, in order to
allow further unifications.
Signed-off-by: Gabor Juhos <[email protected]>
Cc: Daniel Schwierzeck <[email protected]>
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Synchronize the code with mips{32,64}/start.S, in order to
allow further unifications.
Signed-off-by: Gabor Juhos <[email protected]>
Cc: Daniel Schwierzeck <[email protected]>
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Synchronize the code with mips{32,64}/start.S, in order to
allow further unifications.
Signed-off-by: Gabor Juhos <[email protected]>
Cc: Daniel Schwierzeck <[email protected]>
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Synchronize the code with mips{32,64}/start.S, in order to
allow further unifications.
Signed-off-by: Gabor Juhos <[email protected]>
Cc: Daniel Schwierzeck <[email protected]>
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Synchronize the code with mips{32,64}/start.S, in order to
allow further unifications.
Signed-off-by: Gabor Juhos <[email protected]>
Cc: Daniel Schwierzeck <[email protected]>
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Make it similar to the code in mips64/start.S, in order to
allow further unifications.
Signed-off-by: Gabor Juhos <[email protected]>
Cc: Daniel Schwierzeck <[email protected]>
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Synchronize the code with mips64/start.S, in order to
allow further unifications.
Signed-off-by: Gabor Juhos <[email protected]>
Cc: Daniel Schwierzeck <[email protected]>
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The t4 register already holds the cache
line size, and the value of the register
is not changed in mips_init_icache.
Get the cache line size value from t4 for
mips_init_dcache as well and remove the
superfluous assignment of t5 register.
Signed-off-by: Gabor Juhos <[email protected]>
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Nothing is used from asm/mipsregs.h.
Signed-off-by: Gabor Juhos <[email protected]>
Cc: Daniel Schwierzeck <[email protected]>
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Checking mips32/time.c with checkpatch.pl shows this:
arch/mips/cpu/mips32/time.c:30: WARNING: line over 80 characters
arch/mips/cpu/mips32/time.c:57: ERROR: return is not a function, parentheses are not required
total: 1 errors, 1 warnings, 0 checks, 85 lines checked
Fix the code to make checkpatch.pl happy.
Signed-off-by: Gabor Juhos <[email protected]>
Cc: Daniel Schwierzeck <[email protected]>
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Move the GT64120 register base to 0x1be00000
and setup PCI BAR registers as done by the
original YAMON bootloader.
This is needed for running Linux kernel.
Signed-off-by: Gabor Juhos <[email protected]>
Cc: Daniel Schwierzeck <[email protected]>
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Signed-off-by: Gabor Juhos <[email protected]>
Cc: Daniel Schwierzeck <[email protected]>
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The MIPS Malta board has a SOFTRES register. Writing a
magic value into that register initiates a board reset.
Use this feature to implement reset support.
Signed-off-by: Gabor Juhos <[email protected]>
Cc: Daniel Schwierzeck <[email protected]>
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Add minimal support for the MIPS Malta CoreLV board
emulated by Qemu. The only supported peripherial is
the UART.
This is enough to boot U-Boot to the command prompt
both in little and big endian mode.
Signed-off-by: Gabor Juhos <[email protected]>
Cc: Daniel Schwierzeck <[email protected]>
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On the origial Malta boards the REVISION register is
accessible at the 0x1fc00010 address. The contents of
this register gives information about the revision
of the Malta and Core Boards.
This register is used by the Linux kernel to identify
the actual board it is running on. However the register
is not emulated properly by Qemu, so put a hardcoded
value into the flash to make Linux work.
Signed-off-by: Gabor Juhos <[email protected]>
Cc: Daniel Schwierzeck <[email protected]>
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Signed-off-by: Gabor Juhos <[email protected]>
Cc: Daniel Schwierzeck <[email protected]>
Conflicts:
arch/mips/cpu/mips64/start.S
Signed-off-by: Tom Rini <[email protected]>
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The sandburst-specific i2c drivers have been deleted, conflict was just
over the SPDX conversion.
Conflicts:
board/sandburst/common/ppc440gx_i2c.c
board/sandburst/common/ppc440gx_i2c.h
Signed-off-by: Tom Rini <[email protected]>
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Signed-off-by: Wolfgang Denk <[email protected]>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <[email protected]>
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The timer3 counter unit for lastdesc and now values are inconsistent in current
code. The unit of "readl(&tmr->timer3_counter) / (CONFIG_SYS_CLK_FREQ / 2)" is
second. However, CONFIG_SYS_HZ is defined as 1000 in board config file.
This means the accuracy of "lastdec" and "now" should be in millisecond,
thus fix the equation to set lastdec and now variables accordingly.
Signed-off-by: Axel Lin <[email protected]>
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Add a header file, setup.h, which copy from Linux source code,
this file contain structures are used to pass initialisation parameters
to Linux. Enable this function on adp-ag101/adp-ag101p target
Signed-off-by: Kuan-Yu Kuo <[email protected]>
Cc: Macpaul Lin <[email protected]>
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The original adp-ag101/adp-ag101p initialize only one bank(64MB)
by default at boot time, but it is not enough for some application,
so increasing to two banks(128M).
Signed-off-by: Kuan-Yu Kuo <[email protected]>
Cc: Macpaul Lin <[email protected]>
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U-Boot does not compile for the adp-ag101 boards since
commit f6c3b34697bf8bf05cb4e81c2fd3cadb9a98daea (mmc:
update Faraday FTSDC010 for rw performance)
The driver assumes that the bit manipulation macros
are provided by all architectures. This is not the
case for nds32 and it causes a build error like this:
ftsdc010_mci.c: In function 'ftsdc010_clkset':
ftsdc010_mci.c:118: warning: implicit declaration of function 'setbits_le32'
ftsdc010_mci.c:123: warning: implicit declaration of function 'clrbits_le32'
drivers/mmc/libmmc.o: In function `ftsdc010_request':
/devel/u-boot.git/drivers/mmc/ftsdc010_mci.c:234: undefined reference to `setbits_le32'
/devel/u-boot.git/drivers/mmc/ftsdc010_mci.c:243: undefined reference to `clrbits_le32'
/devel/u-boot.git/drivers/mmc/ftsdc010_mci.c:234: undefined reference to `clrbits_le32'
drivers/mmc/libmmc.o: In function `ftsdc010_clkset':
/devel/u-boot.git/drivers/mmc/ftsdc010_mci.c:118: undefined reference to `clrbits_le32'
/devel/u-boot.git/drivers/mmc/ftsdc010_mci.c:118: undefined reference to `clrbits_le32'
/devel/u-boot.git/drivers/mmc/ftsdc010_mci.c:121: undefined reference to `setbits_le32'
/devel/u-boot.git/drivers/mmc/ftsdc010_mci.c:123: undefined reference to `setbits_le32'
/devel/u-boot.git/drivers/mmc/ftsdc010_mci.c:123: undefined reference to `setbits_le32'
The patch adds bit manipulation macros for the
nds32 architecture to avoid the errors. The macros
are copied from the ARM implementation.
Compile tested only.
Cc: Kuo-Jung Su <[email protected]>
Cc: Macpaul Lin <[email protected]>
Signed-off-by: Gabor Juhos <[email protected]>
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This patch adds I2C support for Vybrid VF610 platform and adds
I2C0 support to VF610TWR board.
Signed-off-by: Alison Wang <[email protected]>
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Signed-off-by: Dirk Eibach <[email protected]>
Cc: Heiko Schocher <[email protected]>
Cc: Stefan Roese <[email protected]>
Tested-by: Stefan Roese <[email protected]>
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CONFIG_I2C_MUX is replaced through the new i2c multibus/multiadapter
framework, configured through CONFIG_SYS_I2C. As CONFIG_I2C_MUX
is only used on the keymile boards, and they are now completely
moved to the new framework, remove CONFIG_I2C_MUX.
Signed-off-by: Heiko Schocher <[email protected]>
Cc: Holger Brunck <[email protected]>
Tested-By: Holger Brunck <[email protected]>
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- added to fsl_i2c driver new multibus/multiadpater support
- adapted all config files, which uses this driver
Signed-off-by: Heiko Schocher <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: Stephen Warren <[email protected]>
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- added to soft_i2c driver new multibus/multiadpater support
- adapted all config files, which uses this driver
Signed-off-by: Heiko Schocher <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: Stephen Warren <[email protected]>
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Signed-off-by: Heiko Schocher <[email protected]>
Signed-off-by: Simon Glass <[email protected]>
Cc: Henrik Nordström <[email protected]>
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CONFIG_SPL_BUILD creates debug TLB entry, so disable it before init_tlbs.
CONFIG_SPL_INIT_MINIMAL never creates any debug TLB entry, so no need
of disable_tlb().
Signed-off-by: Prabhakar Kushwaha <[email protected]>
Signed-off-by: Andy Fleming <[email protected]>
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MAKEALL is fine for ppc4xx and mpc85xx.
Run checks were done on our controlcenterd hardware.
Signed-off-by: Dirk Eibach <[email protected]>
Signed-off-by: Andy Fleming <[email protected]>
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Provide proper setting for the APLL fout frequency calculation for
Exynos4 based targets (especially Exynos4210 - Trats board).
Signed-off-by: Lukasz Majewski <[email protected]>
Cc: Minkyu Kang <[email protected]>
Acked-by: Minkyu Kang <[email protected]>
Acked-by: Simon Glass <[email protected]>
Tested-by: Simon Glass <[email protected]>
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Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and
serial.
Conflicts:
arch/arm/dts/exynos5250.dtsi
Signed-off-by: Tom Rini <[email protected]>
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The OS function is now always called with the PREP stage. Adjust the
remaining bootm OS functions to deal with this correctly.
Signed-off-by: Simon Glass <[email protected]>
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Tegra30 and Tegra114 are compatible except PLL parameters.
Tested on Tegra30 Cardhu, and Tegra114 Dalmore
platforms. All works well.
Signed-off-by: Jim Lin <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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Add DT node for USB EHCI function.
Add support for T30-Cardhu, T30-Beaver, T114-Dalmore boards.
Signed-off-by: Jim Lin <[email protected]>
Reviewed-by: Stephen Warren <[email protected]>
Tested-by: Stephen Warren <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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This function has no prototype in the headers and passes void * around, thus
requiring several casts. Tidy this up.
- Add new patch to clean up bootz_setup() function
Signed-off-by: Simon Glass <[email protected]>
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There are differnce with clock calcuation by cpu variations.
This patch will fix it according to user manual.
Signed-off-by: Minkyu Kang <[email protected]>
Signed-off-by: Rajeshwari Shinde <[email protected]>
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This patch performs the following:
1) Convert the assembly code for memory and clock initialization to C code.
2) Move the memory and clock init codes from board/samsung to arch/arm
3) Creat a common lowlevel_init file across Exynos4 and Exynos5. Converted
the common lowlevel_init from assembly to C-code
4) Made spl_boot.c and tzpc_init.c common for both exynos4 and exynos5.
5) Enable CONFIG_SKIP_LOWLEVEL_INIT as stack pointer initialisation is already
done in _main.
6) exynos-uboot-spl.lds made common across SMDKV310, Origen and SMDK5250.
TEST: Tested SD-MMC boot on SMDK5250 and Origen.
Tested USB and SPI boot on SMDK5250
Compile tested for SMDKV310.
Signed-off-by: Rajeshwari Shinde <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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This patch configures the gpio values for UART
on Origen and SMDKV310 using pinmux
Signed-off-by: Rajeshwari Shinde <[email protected]>
Acked-by: Simon Glass <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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This patch adds APIs to get power reset status and exit the wakeup condition for
both exynos5 and exynos4
Signed-off-by: Rajeshwari Shinde <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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The omap_gpio driver is used by AM33XX, OMAP3/4, OMAP54XX and DRA7XX SoCs.
These SoCs have different gpio count but currently omap_gpio driver uses hard
coded 192 which is wrong.
This patch fixes this issue by:
1. Move define of OMAP_MAX_GPIO to all arch/arm/include/asm/arch-omap*/gpio.h.
2. Update gpio bank settings and enable GPIO modules 7 & 8 clocks for OMAP5.
Thanks for Lubomir Popov to provide valuable comments to fix this issue.
Signed-off-by: Axel Lin <[email protected]>
Tested-by: Lubomir Popov <[email protected]>
Acked-by: Heiko Schocher <[email protected]>
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