| Age | Commit message (Collapse) | Author |
|---|
|
Prepare place for new patch.
Signed-off-by: Michal Simek <[email protected]>
|
|
Include this header to get access to link symbols, which are otherwise
removed.
Signed-off-by: Kuan-Yu Kuo <[email protected]>
Cc: Macpaul Lin <[email protected]>
|
|
Extend the regs-lcdif.h with registers for i.MX233.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Otavio Salvador <[email protected]>
Cc: Stefano Babic <[email protected]>
|
|
This function turns on the LCDIF clock and configures it's frequency. The
dividers settings are calculated within the function and the current
implementation should be fast and accurate.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Otavio Salvador <[email protected]>
Cc: Stefano Babic <[email protected]>
|
|
Devcfg device requires to load bitstream in binary format.
But u-boot also has an option for loading bitstream in bit
format. Let's handle both cases by zynqpl driver.
Also add suport for loading partial bitstreams.
The first driver version was done by:
Joe Hershberger <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
|
|
The u-boot-imx23.bd and u-boot-imx28.bd need to be preprocessed, otherwise
they have issues with out-of-tree build where elftosb tool couldn't sometimes
find the u-boot.bin and spl/u-boot-spl.bin .
Preprocess these .bd files with sed and insert full path to u-boot.bin and
spl/u-boot-spl.bin to prevent this issue. Moreover, to avoid adding more
churn into main Makefile, move all this preprocessing and u-boot.sb generation
into CPU directory instead.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Stefano Babic <[email protected]>
Acked-by: Otavio Salvador <[email protected]>
|
|
The VDDMEM ramped up in very weird way as it was horribly misconfigured.
Instead of setting up VDDMEM in one swipe, let it rise slowly the same
way as VDDD and VDDA in spl_power_init.c and then only clear ILIMIT before
memory gets inited. This makes sure the VDDMEM rises sanely, not jumps up
and down as it did till now.
The VDDMEM prior to this change did this:
2V0____ .--------2V5
| `--'
0V____|
The VDDMEM now does this:
2V0_____,-----------2V5
/
0V__|
Moreover, VDDIO on MX23 uses 25mV steps while MX28 uses 50mV steps,
fix this difference too.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Otavio Salvador <[email protected]>
Cc: Stefano Babic <[email protected]>
|
|
Put an explanation in the source code as to why some DDR registers do not
need to be configured.
Signed-off-by: Fabio Estevam <[email protected]>
|
|
After the recent fixes in the mx23 DDR setup, it is safe to operate DDR voltage
at the recommended 2.5V voltage level again.
Signed-off-by: Fabio Estevam <[email protected]>
|
|
This commit allows pxa2xx based boards to reimplement reset_cpu()
function with board specific reset sequence.
Signed-off-by: Lukasz Dalek <[email protected]>
|
|
If CONFIG_USB_DEV_PULLUP_GPIO is defined, a link error occurs because the
set_GPIO_mode() helper function is not implemented. This function doesn't do
much except make the code a little more readable, so I just manually coded its
equivalent and removed the prototype from the header file. It is invoked no
where else in the code.
While I was at it, I noticed that two other function prototypes in the same
header file are also neither implemented nor invoked anywhere, so I removed them
as well.
Signed-off-by: Mike Dunn <[email protected]>
|
|
Legacy iomux support is no longer needed now that all boards have been converted
to iomux-v3.
Signed-off-by: Benoît Thébaudeau <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
|
|
Allow usage of the imx-common/iomux-v3.h framework by including pad settings for
the i.MX53. The content of the file is taken from Freescale's Linux kernel at
commit 4ab3715, plus the required changes to make it work in U-Boot.
Signed-off-by: Benoît Thébaudeau <[email protected]>
|
|
Add missing definitions that are required by future changes.
By the way, make some cosmetic cleanup.
Signed-off-by: Benoît Thébaudeau <[email protected]>
|
|
In ALT1 mode, EIM_CS2 is GPIO2[27], not ESDHC1.CD. Hence, rename
MX51_PAD_EIM_CS2__SD1_CD to MX51_PAD_EIM_CS2__GPIO2_27.
Signed-off-by: Benoît Thébaudeau <[email protected]>
|
|
Legacy iomux support is no longer needed now that all boards have been converted
to iomux-v3.
Signed-off-by: Benoît Thébaudeau <[email protected]>
|
|
Allow usage of the imx-common/iomux-v3.h framework by including pad settings for
the i.MX35. The content of the file is taken from Linux kernel at commit
267dd34, plus the required changes to make it work in U-Boot.
Signed-off-by: Benoît Thébaudeau <[email protected]>
|
|
Legacy iomux support is no longer needed now that all boards have been converted
to iomux-v3.
Signed-off-by: Benoît Thébaudeau <[email protected]>
|
|
Allow usage of the imx-common/iomux-v3.h framework by including pad settings for
the i.MX25. The content of the file is taken from Linux kernel at commit
267dd34, plus the required changes to make it work in U-Boot.
Signed-off-by: Benoît Thébaudeau <[email protected]>
|
|
Augment the MX5 clock code with function to enable and configure
NFC clock. This is necessary to get NFC working on MX5.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Albert ARIBAUD <[email protected]>
Cc: Benoît Thébaudeau <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Scott Wood <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Tom Rini <[email protected]>
|
|
Fix minor adjustments needed to get SPL framework building on MX5.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Albert ARIBAUD <[email protected]>
Cc: Benoît Thébaudeau <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Scott Wood <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Tom Rini <[email protected]>
|
|
The U-Boot SPL can parse the uImage format and gather information from
it about the payload. Make use of this and wrap u-boot.bin into uImage
format. The benefit is the SPL will know the size of the payload
instead of using fixed size of the payload defined at compile time.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Albert ARIBAUD <[email protected]>
Cc: Benoît Thébaudeau <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Scott Wood <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Tom Rini <[email protected]>
|
|
FSL bootlets code set the PORT_PRIORITY_ORDER field of register HW_EMI_CTRL
as 0x2, which means:
PORT0231 = 0x02 Priority Order: AXI0, AHB2, AHB3, AHB1
Signed-off-by: Fabio Estevam <[email protected]>
|
|
HW_DRAM_CTL27, HW_DRAM_CTL28 and HW_DRAM_CTL35 are not initialized as per
FSL bootlets code.
mx23 Reference Manual mark HW_DRAM_CTL27 and HW_DRAM_CTL28 as "reserved".
HW_DRAM_CTL8 is setup as the last element.
So skip the initialization of these DRAM_CTL registers.
Signed-off-by: Fabio Estevam <[email protected]>
|
|
On mx23 there is no 'DRAM init complete' in register HW_DRAM_CTL18.
Remove this erroneous setting.
Signed-off-by: Fabio Estevam <[email protected]>
|
|
Start bit is part of HW_DRAM_CTL8 register, so fix the comment.
Signed-off-by: Fabio Estevam <[email protected]>
|
|
On mx23 the pad voltage selection bit needs to be always '0', since '1' is a
reserved value.
For example:
Pin 108, EMI_A06 pin voltage selection:
0= 1.8V (mDDR) or 2.5V (DDR1);
1= reserved.
Fix the pad voltage definitions for the mx23 case.
Signed-off-by: Fabio Estevam <[email protected]>
Acked-by: Marek Vasut <[email protected]>
|
|
|
|
Extending LIODN offset range from 1-5 to 1-10
While using a qman portal with a higher index the LIODN offset
is incorrectly set, thus extending the range of offsets covers
all 10 qman portals
Signed-off-by: Cristian Sovaiala <[email protected]>
Acked-by: Haiying Wang <[email protected]>
Signed-off-by: Andy Fleming <[email protected]>
|
|
Erratum DDR_A003 applies to P5020, P3041, P4080, P3060, P2041, P5040.
Signed-off-by: York Sun <[email protected]>
Signed-off-by: Andy Fleming <[email protected]>
|
|
Only some chips have four SerDes banks, so don't define lanes for a bank
that doesn't exist.
Signed-off-by: Timur Tabi <[email protected]>
Signed-off-by: Andy Fleming <[email protected]>
|
|
As per Errata list of BSC9131 and BSC9132, IFC Errata A003399 is no more
valid. So donot compile its workaround.
Signed-off-by: Prabhakar Kushwaha <[email protected]>
Signed-off-by: Andy Fleming <[email protected]>
|
|
cpu.c:288:2:
warning: implicit declaration of function 'reset_85xx_watchdog'
[-Wimplicit-function-declaration]
Signed-off-by: Horst Kronstorfer <[email protected]>
Signed-off-by: Andy Fleming <[email protected]>
|
|
On P204x/P304x/P50x0 Rev1.0, USB transmit will result in false internal
multi-bit ECC errors, which has impact on performance, so software should
disable all ECC reporting from USB1 and USB2.
In formal release document, the errata number should be USB14 instead of USB138.
Signed-off-by: xulei <[email protected]>
Signed-off-by: Roy Zang <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
Signed-off-by: xulei <[email protected]>
Signed-off-by: Andy Fleming <[email protected]>
|
|
Some legacy RGMII phys don't have in band signaling for the
speed information. so set the RGMII MAC mode according to
the speed got from PHY.
Signed-off-by: Roy Zang <[email protected]>
Reported-by: John Traill <[email protected]>
Signed-off-by: Andy Fleming <[email protected]>
|
|
For T4/B4, the clockgen node compatible string is updated to version 2.
Add clock-frequency setting for this new version.
Signed-off-by: Tang Yuantian <[email protected]>
Signed-off-by: Andy Fleming <[email protected]>
|
|
Per the latest errata updated, B4860/B4420 Rev 1.0 has also
errata A-005871, so adding define A-005871 for B4 SoCs.
Signed-off-by: Shengzhou Liu <[email protected]>
Signed-off-by: Andy Fleming <[email protected]>
|
|
B4420/B4860 PCIE can not work because of the wrong definition of
the PCIE register offset in the file:
arch/powerpc/include/asm/immap_85xx.h
Add the judgement of B4420/B4860 to make the register offset to:
#define CONFIG_SYS_MPC85xx_PCIE1_OFFSET 0x200000
Signed-off-by: Liu Gang <[email protected]>
Signed-off-by: Andy Fleming <[email protected]>
|
|
Set the device tree property associated with the mpic source
frequency. The frequency is used for mpic timer.
Signed-off-by: Wang Dongsheng <[email protected]>
Signed-off-by: Andy Fleming <[email protected]>
|
|
The 'fsl,pme-rev1' and 'fsl-pme-rev2' properties have been added to the
pme portal node. This is required for software to determine which version
of PME hardware is present and take appropriate actions.
These properties are a direct reflection of the corresponding ccsr pme
register value.
Also removed unnecessary static global variables.
Signed-off-by: Jeffrey Ladouceur <[email protected]>
Signed-off-by: Andy Fleming <[email protected]>
|
|
|
|
The prt_mpc512x_clks() function isn't referenced
anywhere and its prototype is wrong. Remove it.
Signed-off-by: Anatolij Gustschin <[email protected]>
|
|
Delete all occurrences of hang() and provide a generic function.
Signed-off-by: Andreas Bießmann <[email protected]>
Acked-by: Albert ARIBAUD <[email protected]>
[trini: Modify check around puts() in hang.c slightly]
Signed-off-by: Tom Rini <[email protected]>
|
|
Make nios2's board.c checkpatch clean.
Signed-off-by: Andreas Bießmann <[email protected]>
|
|
Make microblaze's board.c checkpatch clean.
Signed-off-by: Andreas Bießmann <[email protected]>
Reviewed-by: Michal Simek <[email protected]>
|
|
This allows passing of entire scripts to sandbox with the -c argument,
which is useful for testing. Commands can be delimited with a newline
or semicolon.
Signed-off-by: Simon Glass <[email protected]>
|
|
With sandbox it is tricky to add an FDT to the image at build time (or
later) since we build an ELF file, not a plain binary, and the address
space of the whole U-Boot is not accessible in the emulated memory map
of sandbox.
Sandbox can read files directly from the host, though, so add an option
to read an FDT from a host file on start-up.
Signed-off-by: Simon Glass <[email protected]>
|
|
Add generic board support for sandbox. and remove the old board init code.
Select CONFIG_SYS_GENERIC_BOARD for sandbox now that this is supported.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
|
|
In many cases, pointers to memory are passed around, and these pointers
refer to U-Boot memory, not host memory. This in itself is not a
problem.
However, in a few places, we cast that pointer back to a ulong (being
a U-Boot memory address). It is possible to convert many of these cases
to avoid this. However there are data structures (e.g. struct
bootm_headers) which use pointers. We could with a lot of effort adjust
the structs and all code that uses them to use ulong instead of pointers.
This seems like an unacceptable cost, since our objective with sandbox
is to minimise the impact on U-Boot code while maximising the features
available to sandbox.
Therefore, create a map_to_sysmem() function which converts from a
pointer to a U-Boot address. This can be used sparingly when needed.
Signed-off-by: Simon Glass <[email protected]>
|
|
|
