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2024-06-24imx8mp-venice-gw74xx: default USB1 to host modeTim Harvey
The GW74xx USB1 controller connects to a dual-role connector using a GPIO for role detection via the usb-connector Linux driver (usb-conn-gpio.c). This drive does not exist yet in U-Boot so for now we will just default USB1 to host mode. Signed-off-by: Tim Harvey <[email protected]>
2024-06-24arm: fsl: imx6ulz_bsh_smm_m2: Migrate to OF_UPSTREAMPatrick Barsanti
Migrate imx6ulz_bsh_smm_m2 board to OF_UPSTREAM. Signed-off-by: Patrick Barsanti <[email protected]>
2024-06-24arm: fsl: imx8mn_bsh_smm_s2: Migrate to OF_UPSTREAMPatrick Barsanti
Migrate imx8mn_bsh_smm_s2 and imx8mn_bsh_smm_s2pro boards to OF_UPSTREAM. Signed-off-by: Patrick Barsanti <[email protected]> Tested-by: Michael Trimarchi <[email protected]> Reviewed-by: Peng Fan <[email protected]>
2024-06-20arm: dts: corstone1000: enable secondary cores for FVPHarsimran Singh Tungal
Add the secondary cores nodes in the dts file Signed-off-by: Harsimran Singh Tungal <[email protected]> Cc: Tom Rini <[email protected]> Cc: Rui Miguel Silva <[email protected]>
2024-06-19arm: implement invalidate_icache_all on ARM11Heinrich Schuchardt
In EFI sub-system we rely on invalidate_icache_all() to invalidate the instruction cache after loading binaries. Add the missing implementation on ARM1136, ARM1176. Signed-off-by: Heinrich Schuchardt <[email protected]>
2024-06-19Merge patch series "Add basic U-Boot Support for J722S-EVM"Tom Rini
Jayesh Choudhary <[email protected]> says: Hello there, This series add the U-Boot support for our new platform of K3-SOC family - J722S-EVM which is a superset of AM62P. It shares the same memory map and thus the nodes are being reused from AM62P includes instead of duplicating the definitions. Some highlights of J722S SoC (in addition to AM62P SoC features) are: - Two Cortex-R5F for Functional Safety or general-purpose usage and two C7x floating point vector DSP with Matrix Multiply Accelerator for deep learning. - Vision Processing Accelerator (VPAC) with image signal processor and Depth and Motion Processing Accelerator (DMPAC). - 7xUARTs, 3xSPI, 5xI2C, 2xUSB2, 2xCAN-FD, 3xMMC and SD, GPMC for NAND/FPGA connection, OSPI memory controller, 5xMcASP for audio, 4xCSI-RX for Camera, 1 PCIe Gen3 controller, USB3.0 eCAP/eQEP, ePWM, among other peripherals. TRM: <https://www.ti.com/lit/zip/sprujb3> Schematics: <https://www.ti.com/lit/zip/sprr495> Boot test log: <https://gist.github.com/Jayesh2000/0313e58fde377f877a9a8f1acc2579ef>
2024-06-19arm: dts: Introduce J722S U-Boot dts filesJayesh Choudhary
Include the uboot device tree files needed to boot the board. Co-developed-by: Vaishnav Achath <[email protected]> Signed-off-by: Vaishnav Achath <[email protected]> Signed-off-by: Jayesh Choudhary <[email protected]>
2024-06-19arch: mach-k3: Introduce basic files to support J722S SoC familyJayesh Choudhary
Introduce the basic functions and definitions needed to properly initialize TI J722S family of SoCs. Co-developed-by: Vaishnav Achath <[email protected]> Signed-off-by: Vaishnav Achath <[email protected]> Signed-off-by: Jayesh Choudhary <[email protected]>
2024-06-19arm: mach-k3: j722s: introduce clock and device files for wkup splJayesh Choudhary
Include the clock and lpsc tree files needed for the wkup spl to initialize the proper PLLs and power domains to boot the SoC. Reviewed-by: Bryan Brattlof <[email protected]> Signed-off-by: Vaishnav Achath <[email protected]> Signed-off-by: Jayesh Choudhary <[email protected]>
2024-06-19arm: mach-k3: r5: Makefile: Fix the order for entriesJayesh Choudhary
Add the entries in alphabetical order. Signed-off-by: Jayesh Choudhary <[email protected]> Reviewed-by: Neha Malcom Francis <[email protected]>
2024-06-19soc: add info to identify the J722S SoC familyJayesh Choudhary
Include the part number for TI's j722s family of SoC to identify it during boot. Signed-off-by: Vaishnav Achath <[email protected]> Signed-off-by: Jayesh Choudhary <[email protected]>
2024-06-19arm: mach-k3: Sort CONFIG_SOC* and K3_SOC_ID entriesJayesh Choudhary
Sort CONFIG_SOC* and K3_SOC_ID alphabetically. Signed-off-by: Jayesh Choudhary <[email protected]> Reviewed-by: Andrew Davis <[email protected]> Reviewed-by: Neha Malcom Francis <[email protected]>
2024-06-18arm: dts: k3-am625-phyboard-lyra-rdk: Enable usb port in u-bootWadim Egorov
Enable usb0 in all boot phases for use with DFU. Signed-off-by: Wadim Egorov <[email protected]> Reviewed-by: Daniel Schultz <[email protected]>
2024-06-18arch: arm: dts: k3-am642-phyboard-electra: Add fixed partitionsNathan Morrisson
Add a fixed partitions node to the AM64x device tree so that it can be used to fixup the Linux device tree. Signed-off-by: Nathan Morrisson <[email protected]> Signed-off-by: Wadim Egorov <[email protected]> Reviewed-by: Daniel Schultz <[email protected]>
2024-06-18arch: arm: dts: k3-am625-phyboard-lyra: Add fixed partitionsNathan Morrisson
Add a fixed partitions node to the AM62x device tree so that it can be used to fixup the Linux device tree. Signed-off-by: Nathan Morrisson <[email protected]> Signed-off-by: Wadim Egorov <[email protected]> Reviewed-by: Daniel Schultz <[email protected]>
2024-06-18ARM: dts: stm32: Auto-detect second MAC on STM32MP15xx DH electronics DHCOMMarek Vasut
Test whether this system is compatible with STM32MP15xx DHCOM SoM, if so, test whether R292 pull up is populated on pin PC3, which is an indication that the second MAC chip, KS8851-16MLL, is populated. Use this information to patch 'status' DT property into the second ethernet MAC DT node and enable/disable the MAC on systems where the chip is/isn't populated respectively. Use spl_perform_fixups() to patch the U-Boot proper DT from SPL and ft_board_setup() to patch Linux DT from U-Boot proper. This way both software components are configured the same way. Signed-off-by: Marek Vasut <[email protected]> Reviewed-by: Patrice Chotard <[email protected]>
2024-06-18ARM: dts: stm32: Add generic SoM compatible to STM32MP15xx DH electronics DHSOMMarek Vasut
Add generic SoM compatible string into machine compatible string for all STM32MP15xx based DH electronics DHSOM. This way, common board code can match on this compatible. No functional change. Signed-off-by: Marek Vasut <[email protected]> Reviewed-by: Patrice Chotard <[email protected]>
2024-06-18ARM: dts: stm32: add phy-reset-gpios property to ethernet node for ↵Heesub Shin
stm32mp157c-odyssey In Odyssey board, we should reset the PHY chipset, toggling G0 pin. Signed-off-by: Heesub Shin <[email protected]> Reviewed-by: Patrice Chotard <[email protected]>
2024-06-18ARM: dts: stm32: fix incorrect PHY address for stm32mp157c-odysseyHeesub Shin
In Odyssey board, KSZ9031 is at the PHY address 0x7, not 0x0. This commit fixes it. Signed-off-by: Heesub Shin <[email protected]> Reviewed-by: Patrice Chotard <[email protected]>
2024-06-18ARM: dts: stm32: use internal clock for Tx for stm32mp157c-odysseyHeesub Shin
In Odyssey board, we should use the internal clock from RCC as the transmit clock, instead of the external clock from ETH_CLK125 pad. This commit adds a property, st,eth-clk-sel, so that the ETH_CLK_SEL mux selects ETH_CLK. Signed-off-by: Heesub Shin <[email protected]> Reviewed-by: Patrice Chotard <[email protected]>
2024-06-18ARM: dts: stm32: set PLL4_P to 125Mhz for ETH_CLK for stm32mp157c-odysseyHeesub Shin
Odyssey board requires ETH_CLK of 125Mhz. This commit sets PLL4_P/Q/R to 125, 62.5 and 62.5Mhz in respectively. Signed-off-by: Heesub Shin <[email protected]> Reviewed-by: Patrice Chotard <[email protected]>
2024-06-18ARM: dts: stm32: Add support for STM32MP13xx DHCOR SoM and DHSBC boardMarek Vasut
This stm32mp135f-dhcor-dhsbc board is a stack of DHCOR SoM based on STM32MP135F SoC (900MHz / crypto capabilities) populated on DHSBC carrier board. The SoM contains the following peripherals: - STPMIC (power delivery) - 512MB DDR3L memory - eMMC and SDIO WiFi module The DHSBC carrier board contains the following peripherals: - Two RGMII Ethernet ports - USB-A Host port, USB-C peripheral port, USB-C power supply plug - Expansion connector Reviewed-by: Patrice Chotard <[email protected]> Signed-off-by: Marek Vasut <[email protected]>
2024-06-18ARM: dts: stm32: Add pinmux nodes for DH electronics STM32MP13xx DHCOR SoM ↵Marek Vasut
and DHSBC board Add new pinmux nodes for DH electronics STM32MP13xx DHCOR SoM and DHSBC board. The following pinmux nodes are added: - ADC pins - ADC CC pins - ETH1 pins - ETH2 pins - I2C5 pins - MCAN1 pins - MCAN2 pins - PWM13 pins - PWM5 pins - QSPI pins - SAI1 pins - SDMMC2 D4..D7 pins - SPI2 pins - SPI3 pins - UART4 pins - UART7 pins - USART1 pins - USART2 pins Signed-off-by: Marek Vasut <[email protected]> Reviewed-by: Patrice Chotard <[email protected]>
2024-06-18ARM: dts: stm32: add eth1 and eth2 support on stm32mp13Christophe Roullier
Add both ethernet MACs based on GMAC SNPS IP on stm32mp13. Signed-off-by: Christophe Roullier <[email protected]> Reviewed-by: Patrice Chotard <[email protected]>
2024-06-18ARM: dts: stm32: Make PWR regulator driver available on STM32MP13xxMarek Vasut
This patch makes STM32 PWR regulators available on stm32mp13xx. This requires TFA to clear RCC_SECCFGR, is disabled by default on stm32mp13xx and can only be enabled on board config level. Signed-off-by: Marek Vasut <[email protected]> Reviewed-by: Patrice Chotard <[email protected]>
2024-06-18ARM: dts: stm32: add PWR regulators support on stm32mp131Marek Vasut
This patch adds STM32 PWR regulators DT support on stm32mp131. This requires TFA to clear RCC_SECCFGR, is disabled by default and can only be enabled on board DT level. Signed-off-by: Marek Vasut <[email protected]> Reviewed-by: Patrice Chotard <[email protected]>
2024-06-18stm32mp: Reserve OPTEE area in EFI memory mapPatrice Chotard
Since commit 7b78d6438a2b3 ("efi_loader: Reserve unaccessible memory") memory region above ram_top is tagged in EFI memory map as EFI_BOOT_SERVICES_DATA. In case of STM32MP1/STM32MP13 platforms, above ram_top, there is one reserved-memory region tagged "no-map" dedicated to OP-TEE : _ addr=de000000 size=2000000 for stm32mp157x-dkx and stm32mp135f-dk _ addr=fe000000 size=2000000 for stm32mp157c-ev1 Before booting kernel, EFI memory map is first built, the OPTEE region is tagged as EFI_BOOT_SERVICES_DATA and when reserving LMB, the tag LMB_NONE is used. Then after, the LMB are completed by boot_fdt_add_mem_rsv_regions() which try to add again the same OPTEE region (addr=de000000 size=2000000 in case of stm32mp157x-dkx / stm32mp135f-dk or addr=fe000000 size=2000000 in case for stm2mp157c-ev1) but now with LMB_NOMAP tag which produces the following error message : _ for stm32mp157x-dkx / stm32mp135f-dk : "ERROR: reserving fdt memory region failed (addr=de000000 size=2000000 flags=4)" _ for stm32mp157c-ev1 : "ERROR: reserving fdt memory region failed (addr=fe000000 size=2000000 flags=4)" To avoid this, OPTEE area shouldn't be used by EFI, so we need to mark it as reserved. Signed-off-by: Patrice Chotard <[email protected]> Reviewed-by: Patrick Delaunay <[email protected]>
2024-06-17Merge tag 'xilinx-for-v2024.10-rc1' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-microblaze into next AMD/Xilinx changes for v2024.10-rc1 common: - spl: Introduce SoC specific init function xilinx: - Enable FF-A and NVMEM - Rename spl_board_init() to spl_soc_init() zynqmp: - DT alignments - Enable reset from SPL - Enable USB3 for KD240 - Align multiboot register on Kria for proper reboot - Allow multiboot environment write even in saved environment - Move zynqmp commands from board/ to arch/ - Clean up xilinx_zynqmp.h versal: - Do not prioritize boot device if driver is not enabled versal-net: - Setup location for redundant variables in SPI versal2: - Add support for new SOC mmc: - Fix tap delay for SD on Versal NET spi: - Add SPI_NOR_OCTAL_READ flag for mx66uw2g345gx0 flash part gpio: - Cover MODEPIN firmware dependency
2024-06-17Merge tag 'u-boot-stm32-20240617' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-stm STM32MP1: - Ping IWDG on exit from PSCI suspend code
2024-06-17arm64: zynqmp: Align #address/size-cells with nodeMichal Simek
zynqmp-mini-nand wasn't aligned with dt binding that's why fix it. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/3916fde2e896b8be8863505305118903e0644ab0.1717684544.git.michal.simek@amd.com
2024-06-17arm64: versal2: Add support for AMD Versal Gen 2Michal Simek
Add support for AMD Versal Gen 2. SoC is based on Cortex-a78ae 4 cluster/2 cpu core each. A lot of IPs are shared with previous families. There are couple of new IP blocks where the most interesting from user point of view is UFS. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/bc2b70831ce1031bd0fac32357bff84936e1310f.1716994063.git.michal.simek@amd.com
2024-06-17arm64: zynqmp: Update rproc nodeMichal Simek
remoteproc node should be updated to be aligned with the latest dt-schema. Reviewed-by: Tanmay Shah <[email protected]> Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/d8247a46f486a612f85767de9b832ad33fa980fe.1717065556.git.michal.simek@amd.com
2024-06-17arm64: zynq(mp): Rename spl_board_init() to spl_soc_init()Lukas Funke
Rename spl_board_init() to spl_soc_init(). SoC specific implementation should be separated from board specific implementation in order to be extended by board developers. Signed-off-by: Lukas Funke <[email protected]> Acked-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2024-06-17board: zynqmp: Move zynqmp commands from board/ to arch/Charlie Johnston
The zynqmp cmds.c is currently tied to the board but the commands contained within are more closely tied to the architecture. To allow usage of those commands when the architecture is ZynqMP but the board is not, this change moves the cmds into the arch/ tree. The source file is renamed to zynqmp.c to reflect the command name as well. Signed-off-by: Charlie Johnston <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2024-06-17ARM: dts: stm32: Ping IWDG on exit from PSCI suspend codeMarek Vasut
Make sure the OS would not get any spurious IWDG pretimeout IRQ right after the system wakes up. This may happen in case the SoC got woken up by another source than the IWDG pretimeout and the pretimeout IRQ arrived immediately afterward, but too late to be handled by the suspend main loop. In case either of the IWDG is enabled, ping it first and then return to the OS. Signed-off-by: Marek Vasut <[email protected]> Reviewed-by: Patrice Chotard <[email protected]> Reviewed-by: Igor Opaniuk <[email protected]>
2024-06-16Merge branch 'next' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-watchdog into next - misc cyclic infrastructure improvements (Rasmus) - watchdog_reset cleanup (Rasmus) CI: https://dev.azure.com/sr0718/u-boot/_build/results?buildId=369&view=results
2024-06-16Merge tag 'u-boot-rockchip-next-20240615' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-rockchip into next CI: https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/pipelines/21113 - New board: Theobroma Systems SOM-RK3588-Q7 Tiger, ArmSoM Sige7 Rk3588; - PX30 dts migrate to OF_UPSTREAM; - Some other update on board or config;
2024-06-16Merge tag 'u-boot-rockchip-20240614' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-rockchip CI: https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/pipelines/21111 - pmic fix for rk8xx; - pinctrl fix for rk3188/rv1126/rk3588; - mkimage fix for rockcihp "-l" option;
2024-06-16powerpc: mpc85xx: remove dead watchdog-related codeRasmus Villemoes
Nothing in-tree calls watchdog_reset() anymore (that stopped two years ago with the removal of the WATCHDOG_RESET macro). So that function is dead code. That was the only caller of reset_85xx_watchdog(), so that can obviously also be removed. Finally, init_85xx_watchdog() is/was also not called from anywhere, so that can go away as well, which nicely also removes a bit of arch-specific code from the generic watchdog.h header. Cc: Christophe Leroy <[email protected]> Signed-off-by: Rasmus Villemoes <[email protected]> Reviewed-by: Stefan Roese <[email protected]>
2024-06-16powerpc: mpc83xx: remove unused watchdog_reset() functionRasmus Villemoes
There is no longer any code in tree that calls a watchdog_reset() function. The macro WATCHDOG_RESET, which used to emit a call to watchdog_reset(), got removed two years ago. Cc: Christophe Leroy <[email protected]> Signed-off-by: Rasmus Villemoes <[email protected]> Reviewed-by: Stefan Roese <[email protected]>
2024-06-16sh4: remove watchdog.c fileRasmus Villemoes
The external functions defined here are not called from anywhere. So they, and consequently the whole file, can be dropped. Cc: Nobuhiro Iwamatsu <[email protected]> Signed-off-by: Rasmus Villemoes <[email protected]> Reviewed-by: Stefan Roese <[email protected]>
2024-06-16sh4: move reset_cpu() from watchdog.c to cpu.cRasmus Villemoes
The next patch will remove all the other code from watchdog.c, which would leave just this function in there. It seems just as natural for this function to be defined in cpu.c, allowing us to delete watchdog.c completely. Cc: Nobuhiro Iwamatsu <[email protected]> Signed-off-by: Rasmus Villemoes <[email protected]> Reviewed-by: Stefan Roese <[email protected]>
2024-06-16m68k: remove dead codeRasmus Villemoes
There are no calls of "watchdog_reset()" anymore anywhere in the tree since the WATCHDOG_RESET macro got removed in 942d07df0e79 ("watchdog: Remove WATCHDOG_RESET macro"). The only places the identifiers watchdog_disable and watchdog_init are called are in arch/arm/mach-omap2/, so those can obviously not refer to these instances. Hence these functions are not actually used at all and can be removed. As a bonus, this also removes two leftover references to WATCHDOG_RESET. Cc: Huan Wang <[email protected]> Cc: Angelo Dureghello <[email protected]> Signed-off-by: Rasmus Villemoes <[email protected]> Reviewed-by: Stefan Roese <[email protected]>
2024-06-14arm: dts: k3-am625-verdin: add combined binariesAndrejs Cainikovs
Add combined binaries for all Verdin AM62 variants. These binaries can be used to flash the U-Boot via single binary instead of few as it is done at the moment. Signed-off-by: Andrejs Cainikovs <[email protected]>
2024-06-14Merge patch series "introduce basic support for TI's am625-lp-sk"Tom Rini
Bryan Brattlof <[email protected]> says: Hello Again Everyone! The am625-lp-sk is a variant of the am625-sk showcasing the low-power features of the am625 SoC Family. Because it's essentially a board and package spin of the am625-sk I've inherited the am625 configuration and overridden what was needed. This is a new spin of Nitin's original work which has been updated significantly since October 2023 https://lore.kernel.org/u-boot/[email protected]/ For those of us interested here is proof of life using buildroot: https://paste.sr.ht/~bryanb/40f7787f7760bee383aa8fbc342a29e8544dbdab This also works around a buildman issue not following #include directives. To get around this I've redefined the variables it's looking for inside the lp-sk defconfig to keep it happy for now. I made a pull request on github and everything seems like it's happy https://dev.azure.com/u-boot/u-boot/_build/results?buildId=8634&view=results
2024-06-14Merge patch series "binman: am62a/62p: add support for signing TIFSStub"Tom Rini
Dhruva Gole <[email protected]> says: Add support for signing of TIFSSTUB images for HSSE, HSFS and GP devices and include them in tispl.bin and tispl.bin_unsigned in AM62A. AM62P doesn't have any GP support, hence not applicable. These changes are required for Low Power Mode features to work on these SoCs as this TIFS Stub gets used in the Low Power Exit sequences. Boot tested on both platforms that are being touched: [0] AM62A, [1] AM62P [0] https://gist.github.com/DhruvaG2000/d5f2a46818d8025a540efe9289feacb4 [1] https://gist.github.com/DhruvaG2000/ce29f6e9315a78d3e9e5810f55f17f43
2024-06-14Merge patch series "arm: dts: am625/am62a7: Switch over to OF_UPSTREAM"Tom Rini
Nishanth Menon <[email protected]> says: Cleanup am625 on by switching over the last two platforms (SK and beagleplay) over to OF_UPSTREAM, and while at it, switch over am62a7 (last of the am62* family) over as well. This superscedes the previous version of beagleplay only patch[1] Test logs: https://gist.github.com/nmenon/ba310d3750a80789aca6a4fd90190135
2024-06-14arm: dts: k3: binman: am62p: add support for signing TIFSStub imagesDhruva Gole
Adds TIFS stub binaries, this is required for deepsleep functionality. This implements the same change as commit 128f81290b7d ("arm: dts: k3: binman: am625: add support for signing TIFSSTUB Images") did for TI AM62 SK board. Signed-off-by: Vibhore Vardhan <[email protected]> Signed-off-by: Dhruva Gole <[email protected]>
2024-06-14arm: dts: k3: binman: am62a: add support for signing TIFSStub ImagesDhruva Gole
Add support for signing of TIFSSTUB images for HSSE, HSFS and GP devices and include them in tispl.bin and tispl.bin_unsigned. This implements the same change as commit 128f81290b7d ("arm: dts: k3: binman: am625: add support for signing TIFSSTUB Images") did for TI AM62 SK board. Signed-off-by: Vibhore Vardhan <[email protected]> Signed-off-by: Dhruva Gole <[email protected]>
2024-06-14Merge patch series "binman: ti: create binman nodes for EFI capsules"Tom Rini
Jonathan Humphreys <[email protected]> says: Add binman nodes for EFI capsules of firmware components so that capsules are automatically created during the UBoot builds. This is enabled for several TI SoC based platforms: AM64, AM62, AM62p, BeaglePlay, AM69, J7, and BeagleboneAI.