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Commit 68dcbdd594d4 ("ARM: imx: Add weak default reset_cpu()") caused
the 'reset' command in U-Boot to not cause a board reset.
Fix it by switching to the watchdog driver model via sysreset, which
is the preferred method for implementing the watchdog reset.
Signed-off-by: Sébastien Szymanski <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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Commit 68dcbdd594d4 ("ARM: imx: Add weak default reset_cpu()") caused
the 'reset' command in U-Boot to not cause a board reset.
Fix it by switching to the watchdog driver model via sysreset, which
is the preferred method for implementing the watchdog reset.
Signed-off-by: Fabio Estevam <[email protected]>
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Enable both usbotg1 and usbotg2 ports.
Signed-off-by: Mathieu Othacehe <[email protected]>
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Copied from:
https://lore.kernel.org/linux-devicetree/[email protected]/
Signed-off-by: Mathieu Othacehe <[email protected]>
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Add support for booting the imxrt1050-evk from spi.
Add imximage config and the ability for SPL to boot from NOR.
Enable binman in Kconfig and device tree for imxrt* as it is used to
prepend fspi_header.bin to SPL and u-boot.img.
Signed-off-by: Jesse Taube <[email protected]>
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The Sielaff i.MX6 Solo board is a control and HMI board for vending
machines. Add support for this board.
The devicetree files are taken from pending changes in the Linux
kernel that are available from linux-next and will likely be
part of Linux v6.9.
Signed-off-by: Frieder Schrempf <[email protected]>
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Add mmc alias so that the eMMC is mmc0 and the SD card
is mmc1 to have a well defined device numbering scheme.
Signed-off-by: Fabio Estevam <[email protected]>
Reviewed-by: Ian Ray <[email protected]>
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The conversion to DM_SERIAL is mandatory, so do the conversion.
Signed-off-by: Fabio Estevam <[email protected]>
Reviewed-by: Ian Ray <[email protected]>
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Enable LTO globally on Renesas R-Car platforms. This has been enabled
on a subset of boards already, but at this point it is safe to enable
it globally. This saves units or tens of kiB from the resulting build.
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Paul Barker <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx changes for v2024.04-rc3
zynqmp:
- Cover missing _SE chip variants to fix fpga programming
versal:
- Enable LTO for mini configurations
versal-net:
- Enable LTO for mini configurations
- Fix GIC address to aligned with real silicon
xilinx:
- DTs cleanup and fixups
- Enable HTTP boot
- Add missing spl header to zynqmp.c
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https://gitlab.denx.de/u-boot/custodians/u-boot-imx
CI:
https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/19583
- Fix the i.MX8MP SPI compatible string.
- Let the SPL clock code do the configuration on Data Modul i.MX8M Plus
eDM SBC.
- Enable secure boot on the imx93_var_som board.
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When SOM dt is combined with kd240 overlay DPSUB is enabled but kd240 has
no DP wired that's why change disable it via status property.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/f6de217b3350c9d59032ef54800882e48f240398.1706791116.git.michal.simek@amd.com
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usb0 is already updated but forget to also update usb1.
Fixes: 4ff083f09bc2 ("arm64: zynqmp: Do not expose usbhub nodes")
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/862ca748670f18f25d88aa5b43c37e3dd6aa35eb.1706791116.git.michal.simek@amd.com
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Node name has to be renamed to be aligned with dt-schema and also
xlnx,zynqmp-nvmem-fw switched to fixed-layout.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/32899b20c1e282aab16c32074b1c9a3f45f6dac8.1706791116.git.michal.simek@amd.com
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There is no dt schema associated with it. Also Linux driver have been
removed in Xilinx Linux tree and never gets to upstream that's why remove
description for it.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/6685ee980d9b475f95eef6b2a74795adc4ac4619.1706791116.git.michal.simek@amd.com
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fpga-full is not aligned with the latest dt-schema. Generic name
fpga-region should be used.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/78e6e3f287f79917eb92c6c74accbaf955526aad.1706791116.git.michal.simek@amd.com
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kr260 revA/revA01 is using discrete oscilator for DP (27MHz) and si5332 for
other clocks but clocks are different compare to kv260 that's why fix it to
aligned with the latest schematics.
On the other handle kr260 revB/revA03 also contains 74.25 MHz discrete
clock chip for SLVC-EC output which is not defined.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/e87ae94979c6efc909740bb1a569505042e4f876.1706626255.git.michal.simek@amd.com
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Describe 25Mhz fixed oscilator which is providing clock for PL based
ethernet IPs. Physicially it is one chip but it is described as 2 fixed
clock to be aligned with other SOM versions which were using integrated
clock generators where clocks could be adjusted via i2c (si5332 chips).
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/c430aeacaa76d9f61ed3f874f721a33049f45eb9.1706514396.git.michal.simek@amd.com
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Board description describes the hard part of chip (PS) but programmable
logic (PL) part is not described in this file. But clocks on the board are
not only connected to PS but also wired to PL. And because two revisions
are available where revA is using one si5332 and revB multiple clock chips
using the same clock labels helping with keeping only one device tree
overlay which targets PL. That's why synchronize clock labels and use
labels from revB which are more generic.
Unfortunately if there is driver for si5332 chip split could happen again
but it is still worth to do it now and solve this issue when occurs.
Reported-by: Sagar Karmarkar <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/abac6069e6029ed4076ec7b9d6b33604b6072aa3.1706253871.git.michal.simek@amd.com
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Without 'silabs,skip-recall' property, the driver on System Controller
re-calibrates the output clock frequency at probe() time based on the NVRAM
setting. This re-calibration causes a glitch on the output clock. At
power-on, Versal is also booting and expecting a glitch-free clock for
its correct operation. System Controller should skip the re-calibration
step to prevent any clock instability for Versal.
Signed-off-by: Saeed Nowshadi <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/bbb2322c94503f0e6b369c60312b7546500fad95.1706170068.git.michal.simek@amd.com
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Put imx9_probe_mu declaration in a new mu.h header file.
Signed-off-by: Mathieu Othacehe <[email protected]>
Reviewed-by: Igor Opaniuk <[email protected]>
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The SPL clock code does configure the ECSPI clock frequency, which has
to match the mxc-spi driver configuration for successful SPI NOR boot.
Drop the assigned-clock from DT ecspi1 node on this board to let the
SPL clock code do the configuration and keep it aligned with the driver
expectation.
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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Add board code for the Renesas R8A779H0 V4M Gray Hawk board.
Signed-off-by: Hai Pham <[email protected]>
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Initial support for the Renesas Gray Hawk CPU and BreakOut boards.
The arch/arm/dts/r8a779h0-gray-hawk-cpu.dtsi is extended version of:
https://lore.kernel.org/linux-renesas-soc/b657402113267acd57aece0b4c681b707e704455.1706194617.git.geert+renesas@glider.be/
The version currenty submitted upstream lacks functionality which is
present in this series. Once the upstream support implements that
missing functionality, these DTs will be updated to match.
Signed-off-by: Hai Pham <[email protected]>
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Add Renesas R8A779H0 V4M DT extras for U-Boot.
Until the RPC node becomes part of main DT, keep it here as
an extension so that board code can enable and use the RPC
to access SPI NOR.
Signed-off-by: Hai Pham <[email protected]>
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Add initial support for the Renesas R8A779H0 (R-Car V4M) SoC.
The current version is imported and modified from:
https://lore.kernel.org/linux-renesas-soc/4107bc3d7c31932da29e671ddf4b1564ba38a84c.1706194617.git.geert+renesas@glider.be/
The modifications contain nodes from previous version
which are useful in U-Boot and not part of the Linux
kernel DT yet. The following nodes were added:
- pfc
- gpio0..gpio7
- i2c0..i2c3
- avb0..avb2
- mmc0
Signed-off-by: Hai Pham <[email protected]>
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Add Kconfig entry and PRR ID to support R8A779H0 V4M SoC.
Reviewed-by: Paul Barker <[email protected]>
Signed-off-by: Hai Pham <[email protected]>
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These select/imply settings are common to the whole architecture not just
these boards, move these settings to the architecture config.
Signed-off-by: Andrew Davis <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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TI KS2 boards have the nfs command in their common environment boot
configuration, enable this command.
Signed-off-by: Andrew Davis <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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https://gitlab.denx.de/u-boot/custodians/u-boot-imx
- Add USB support for phycore-imx8mp
- Fix environment corruption, reset on mx6sabresd
- Print reset cause on imx8
- Extend mkimage to support generating an image for i.MXRT FlexSPI
- Add new apalis and colibri variants
- Add support for phyBOARD-Segin-i.MX93 support
- Fix when FEC is primarily used instead of EQOS on i.MX93.
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add support for USB mass storage to USB0 port of phyBOARD Pollux.
tested with "ums 0 mmc 2"
Signed-off-by: Benjamin Hahn <[email protected]>
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sync devicetree with kernel v6.8-rc2.
New commits on kernel v6.8-rc2:
4a58fcdb1818 arm64: dts: imx8mp-phyboard-pollux: Add support for RS232/RS485
3bd7fdcc359e arm64: dts: imx8mp-phyboard-pollux: Add gpio-line-names
f5faa633daf8 arm64: dts: imx8mp-phyboard-pollux: Enable USB support
27c0dc128d04 arm64: dts: imx8mp-phyboard-pollux: Add flexcan support
fa2a1ec50456 arm64: dts: imx8mp-phyboard-pollux: Add missing usdhc clocks assignment
055e38c76388 arm64: dts: imx8mp-phyboard-pollux-rdk: Fix led sub-node names
Signed-off-by: Benjamin Hahn <[email protected]>
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Commit 68dcbdd594d4 ("ARM: imx: Add weak default reset_cpu()") caused
the 'reset' command in U-Boot to not cause a board reset.
Fix it by switching to the watchdog driver model via sysreset, which
is the preferred method for implementing the watchdog reset.
Signed-off-by: Fabio Estevam <[email protected]>
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Add support for printing reset cause during boot.
Signed-off-by: Igor Opaniuk <[email protected]>
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Add initial support for the PHYTEC phyBOARD-Segin-i.MX93 board based on
the PHYTEC phyCORE-i.MX93 SoM.
Supported features:
- 1GB LPDDR4 RAM
- eMMC
- external SD
- FEC Ethernet
- debug UART
- watchdog
Signed-off-by: Mathieu Othacehe <[email protected]>
Tested-by: Primoz Fiser <[email protected]>
Reviewed-by: Yannic Moog <[email protected]>
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Commit d5eae216d833 ("net: dwc_eth_qos: Add board_interface_eth_init()
for i.MX93") implemented board_interface_eth_init for i.MX9 platforms.
However it only accounted for the EQOS interface while any board using
FEC as primary Ethernet interface was left out as return value -EINVAL
is always returned from the function in such case.
Fix this by returning 0 (success) when FEC interface is primarily used
instead of EQOS interface on i.MX93.
Fixes: d5eae216d833 ("net: dwc_eth_qos: Add board_interface_eth_init() for i.MX93")
Signed-off-by: Primoz Fiser <[email protected]>
Tested-by: Mathieu Othacehe <[email protected]>
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When an XXX_BOOTCOMMAND isn't defined, the result is that bootcmd is set
to some random memory content. Fix it so that the function does nothing
in that case and leaves the bootcmd environment unmodified.
Signed-off-by: Mike Looijmans <[email protected]>
Reviewed-by: Dan Carpenter <[email protected]>
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A number of assorted fixes
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https://source.denx.de/u-boot/custodians/u-boot-rockchip
- Add board: rv1126 Sonoff iHost board
- rv1126 ddr4 support;
- Enable BOOTSTD_FULL for RK3399 and RK3588;
- rk3036 spl stack addr fix;
- dts sync from linux v6.8-rc1 for rk356x, rk3588, rv1126;
- Enable eMMC HS200 mode by default for rk3568 and rk3588;
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Add smbios information for Pine64 RockPro64 board and enable in
config
Signed-off-by: Shantur Rathore <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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The number of DDR controllers to be initialised and used should depend
on the device tree with the constraint of the maximum number of
controllers the device supports. Since J721S2 has multiple (2)
controllers, instead of hardcoding the number of probes, move to
depending on the device tree UCLASS_RAM nodes present.
Signed-off-by: Neha Malcom Francis <[email protected]>
Reviewed-by: Manorit Chawdhry <[email protected]>
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This commit enables support for DM_SERIAL in the vexpress_ca9x4 boards.
When running the board with the DM_SERIAL driver, the board ran out of
memory in SPL when initialising the DM serial driver.
Thus this required an increase in the pre-allocated SRAM memory. I did
increase it to 0x800, and it now works graciously.
It could probably be set lower, but I do not see any reason not to use the
available SRAM at this point.
Also adds stdout-path to the 'chosen' node in the device tree.
Signed-off-by: Ole P. Orhagen <[email protected]>
Reviewed-by: Linus Walleij <[email protected]>
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Change reset method from generic to reset driver
Signed-off-by: Jim Liu <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-raspberrypi
Add RaspberryPi5 basic support.
Acked-by: Peter Robinson <[email protected]>
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Writing to eMMC using HS200 mode work more reliably then other modes on
RK356x boards.
Add device tree props and enable Kconfig options for eMMC HS200 mode on
the generic RK3566/RK3568 board. Also enable the pinctrl driver in SPL
and add missing rk3568-generic.dtb to Makefile.
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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Testing has shown that writing to eMMC using a slower mode then HS200
typically generate an ERROR on first attempt on RK3588.
# Rescan using MMC legacy mode
=> mmc rescan 0
# Write a single block to sector 0x4000 fails with ERROR
=> mmc write 20000000 4000 1
# Write a single block to sector 0x4000 now works
=> mmc write 20000000 4000 1
With the MMC_SPEED_MODE_SET Kconfig option enabled.
Writing to eMMC using HS200 mode work more reliably than slower modes on
RK35xx boards. Enable MMC_HS200_SUPPORT Kconfig option by default to
prefer use of HS200 mode on RK356x and RK3588.
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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Testing has shown that writing to eMMC using DDR52 mode does not seem to
work on RK356x and RK3588 boards.
A simple test of writing a single block to e.g. sector 0x4000 fails:
# Rescan using DDR52 mode
=> mmc rescan 4
# Write a single block to sector 0x4000 fails with ERROR
=> mmc write 20000000 4000 1
With the MMC_SPEED_MODE_SET Kconfig option enabled.
Fix this by removing the mmc-ddr-1_8v prop from sdhci nodes in affected
board u-boot.dtsi files.
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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Remove unnecessary status props from rk35xx u-boot.dtsi files, regular
device tree files or default value already enable the affected nodes.
Also reorder bootph-pre-ram and clock-frequency props alphabetically in
rk3588s-u-boot.dtsi uart2 node.
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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Add a default u-boot,spl-boot-order prop to rk3588s-u-boot.dtsi and
remove the prop from board u-boot.dtsi files using the default value.
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Eugen Hristev <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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