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Currently, it isn't possible to build clock drivers for more than one
platform due to how the msm_enable() and msm_set_rate() callbacks are
implemented.
Extend qcom_clk_data to include function pointers for these and convert
all platforms to use them.
Previously, clock drivers relied on include/configs/<board.h> to include the
board specific sysmap header, however as most of the header contents are clock
driver related, import the contents directly into each clock driver and
remove the header. The only exception here is the dragonboard820c board file
which includes some pinctrl macros, those are also inlined.
Reviewed-by: Sumit Garg <[email protected]>
Signed-off-by: Caleb Connolly <[email protected]>
[caleb: remove additional sysmap-sdm845.h mention]
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Qualcomm's clock controller blocks actually do much more than it
says on the tin.. They provide clocks, resets and power domains.
Currently, U-Boot requires one to spawn 2 separate devices for
controlling clocks and resets, both spanning the same register space.
Refactor the code to make it work with just a single DT node, making
it compatible with upstream Linux bindings and dropping the dedicated
reset driver in favour of including it in the clock driver.
Heavily inspired by Renesas code for a similar hw block.
[caleb: moved drivers to clk/qcom, added reset driver and adjusted bind
logic. Imported qcom,gcc-ipq4019.h from Linux]
Signed-off-by: Konrad Dybcio <[email protected]>
Reviewed-by: Sumit Garg <[email protected]>
Signed-off-by: Caleb Connolly <[email protected]>
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This driver is just a stub, but it's necessary to support the upcoming
reset driver changes.
Reviewed-by: Sumit Garg <[email protected]>
Signed-off-by: Caleb Connolly <[email protected]>
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Clock drivers don't belong here, move them to the right place and
declutter mach-snapdragon a bit.
To de-couple these drivers from specific "target" platforms, add
additional config options to enable each clock driver gated behind a
common CLK_QCOM option and enable them by default for the respective
targets. This will make future work easier as we move towards a generic
Qualcomm target.
Reviewed-by: Sumit Garg <[email protected]>
Signed-off-by: Caleb Connolly <[email protected]>
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AM642 SoC supports booting from GPMC NAND device.
Define boot device for it.
Signed-off-by: Roger Quadros <[email protected]>
Link: https://www.mail-archive.com/[email protected]/msg499180.html
Signed-off-by: Dario Binacchi <[email protected]>
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Synchronize R-Car R8A779F0 S4 DTs with Linux 6.6.3,
commit bd3a9e5771a8b332f466d06f7c130a69cab0d526 .
Signed-off-by: Marek Vasut <[email protected]>
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Synchronize R-Car R8A77990 E3 DTs with Linux 6.6.3,
commit bd3a9e5771a8b332f466d06f7c130a69cab0d526 .
Signed-off-by: Marek Vasut <[email protected]>
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Synchronize R-Car R8A77970 V3M DTs with Linux 6.6.3,
commit bd3a9e5771a8b332f466d06f7c130a69cab0d526 .
Signed-off-by: Marek Vasut <[email protected]>
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Synchronize R-Car R8A7792 V2H DTs with Linux 6.6.3,
commit bd3a9e5771a8b332f466d06f7c130a69cab0d526 .
Signed-off-by: Marek Vasut <[email protected]>
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Read i.MX9 CPU temp grade from fuses and fixup thermal trips in Linux
device-tree accordingly.
Based on commit 0543a1ed2787 ("imx8m: fixup thermal trips")
Signed-off-by: Primoz Fiser <[email protected]>
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phyGATE-Tauri-L-iMX8MM is a Gateway based on the phycore-imx8mm SoM.
As a result, all the board code of the phycore-imx8mm is used.
Device tree synced with kernel v6.7.
Signed-off-by: Yannic Moog <[email protected]>
Reviewed-by: Teresa Remmet <[email protected]>
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All i.MX8M targets rely on using binman to generate the U-Boot
binary.
Select it at the SoC level instead of per board.
Signed-off-by: Fabio Estevam <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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All i.MX93 targets rely on using binman to generate the U-Boot
binary.
Select it at the SoC level instead of per board.
Signed-off-by: Fabio Estevam <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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Currently when using "W=1" with xilinx_zynqmp_r5_defconfig, getting
below warnings.
cc1.real: warning: ./arch/arm/mach-zynqmp-r5/include:
No such file or directory [-Wmissing-include-dirs]
Fix W=1 missing-include-dirs warnings by including the headers and
sys_r5_proto.h file which can be used.
Signed-off-by: Venkatesh Yadav Abbarapu <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
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Some users want to build with CONFIG_TOOLS_LIBCRYPTO disabled, which in
general is possible for at least some boards. 32-bit mvebu however
requires kwbimage for building SPL, and kwbimage has a hard dependency
to host OpenSSL.
The new symbol CONFIG_TOOLS_KWBIMAGE allows disabling kwbimage build on
non-mvebu platforms, and thus building without host libcrypto from
OpenSSL.
Based on previous work and discussions, see links below.
Link: https://lore.kernel.org/u-boot/[email protected]/
Link: https://lore.kernel.org/u-boot/[email protected]/
Link: https://lore.kernel.org/u-boot/[email protected]/
Cc: Marek Vasut <[email protected]>
Cc: Paul-Erwan Rio <[email protected]>
Signed-off-by: Alexander Dahl <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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It may be necessary to set breakpoints etc. on a specific fault handler in SPL.
Add a Kconfig option to separate the different handlers into their own individual infinite loops.
Signed-off-by: Csókás Bence <[email protected]>
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Maxim Uvarov <[email protected]> says:
Add small net fixes prior lwip patches.
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Use device specific naming for functions so as to not overlap
with common function names.
Signed-off-by: Maxim Uvarov <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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Fix compilation issue with overlapping lwip and march defines.
Signed-off-by: Maxim Uvarov <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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all network drivers return 0 on the successful
transmission.
Signed-off-by: Maxim Uvarov <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Remove already disabled node. GPIO connections are handled by pmufw that's
why there is no reason to have it described for non secure firmware.
If someone wants to handle it from OS revert this patch and also update
PMUFW configuration and pinctrl setting for these GPIO pins.
Link: https://lore.kernel.org/r/f26b1a780ec44444d62e2dd696a05e2a37fa0993.1704890056.git.michal.simek@amd.com
Signed-off-by: Michal Simek <[email protected]>
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There is a new eDPU revision that uses Marvell 88E6361 switch onboard.
We can rely on detecting the switch to enable and fixup the Linux DTS
so a single DTS can be used.
There is currently no support for the 88E6361 switch and thus no working
networking in U-Boot, so we disable both ports.
Signed-off-by: Robert Marko <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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The ATF implementation for AC5/AC5X ends up with bl31 living in some
internal SRAM. This is in the middle of the large MMIO region that we
were using. Adjust this to be finer grained blocks based on the address
map from the AC5X Family Control and Management Subsystem Functional
Datasheet.
Signed-off-by: Chris Packham <[email protected]>
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Rename zynqmp-power node name to power-management which is more aligned
with generic node name recommendation.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/a2f7fe30e3630c262c2773a595b7a0c8918573a0.1704359569.git.michal.simek@amd.com
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Correct IRQ values don't match IRQ line description.
There is one more IRQ (hiber) but it is not described in DT binding spec
that's why value is not described. Just for completeness dwc3_0 has hiber
IRQ at 75 and dwc3_1 at 76.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/578d758ce2af7e307e38ac8b7fa28ba9efba16d4.1704364111.git.michal.simek@amd.com
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Using '_' in node name is not recommended that's why convert them to use
'-' instead.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/3979167636f0a5970a9ab642a4e0ea6a46b3f8d7.1704705872.git.michal.simek@amd.com
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There is no reason to have multiple blank lines in DTS files that's why
remove them.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/6aaa9fa91c88ca3d3e5645d66a795ec09b8cec61.1704708642.git.michal.simek@amd.com
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Add missing description for efuse aeskey/pufuser offsets.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/9975c501c92d8e9d6e307dfd3f4146e08a2fc68e.1704799551.git.michal.simek@amd.com
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OCM controller interrupt description hasn't been converted by using macros
that's why fix it now.
Fixes: 6b049190c9c5 ("arm64: zynqmp: Describe interrupts by using macros")
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/6a51f47d239002679db03a787057fdc58610515d.1704709554.git.michal.simek@amd.com
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The pca mux is not added to the i2c0 bus so remove it from the bus.
Signed-off-by: Shubhrajyoti Datta <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/3dfe8b41142de2e8c25c56702450ae1a6b1becc0.1704725223.git.michal.simek@amd.com
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Anything ending with gpio/gpios is taken as gpio phande/description which
is reported as the issue coming from gpio-consumer.yaml schema.
That's why rename the gpio suffix to gpio-grp to avoid name collision.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/407b0b67ba019be5a2073d09d578b381c639cbc6.1703002605.git.michal.simek@amd.com
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mt25qu512a is not documented in DT binding that's why remove it.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/517672560a472de33c8e5c4ffc729d8e288da43c.1703002605.git.michal.simek@amd.com
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node name shouldn't use '_' that's why convert it to '-'.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/8f392c7ff13bdf2322798818ddeda06446b6d7b8.1703002605.git.michal.simek@amd.com
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fixed clock nodes can't be on the bus because they are missing reg
property. That's why move them to root.
And because it is root it is good to have it as the first node in a file.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/9a6c17fa754add356b3b03356e41d15e4a18648b.1703002605.git.michal.simek@amd.com
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Describe ADIN phy present on KD240 via ethernet-phy-id compatible string.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/61f89dc055f191fd4138b80bb7e3217d814502f5.1702904236.git.michal.simek@amd.com
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https://gitlab.denx.de/u-boot/custodians/u-boot-imx
- Removed fdt_addr from verdin-imx8mm to fix booting via bootefi.
- Support Ethernet PHY autodection on Data Modul i.MX8M Mini/Plus eDM
SBC
- Add i.MX93 binman support
- Add support for imx93-var-som
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Add support for the Variscite VAR-SOM-IMX93 evaluation kit. The SoM
consists of an NXP iMX93 dual A55 CPU. The SoM is mounted on a Variscite
Symphony SBC.
Signed-off-by: Mathieu Othacehe <[email protected]>
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Signed-off-by: Mathieu Othacehe <[email protected]>
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Add dedicated Makefile targets for the i.MX93 and a new imx93-u-boot.dtsi
device-tree to create binman images.
Signed-off-by: Mathieu Othacehe <[email protected]>
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Implement fdtdec_board_setup() auto-detection of ethernet PHY.
This uses properties of the hardware and pull resistor placement.
If GPIO1_16 RGMII_MDC is HIGH, then R530 (MX8MM eDM SBC) or
R390 (MX8MP eDM SBC) is populated. R530 or R390 is populated
only on boards with AR8031 PHY.
If GPIO1_16 RGMII_MDC is LOW, then the in-SoM pull down is the
dominant pull resistor. This is the case on boards with BCM54213PE
PHY.
In case AR8031 PHY is populated, the PHY MDIO address is 0, in
case BCM54213PE PHY is populated, the PHY MDIO address is 1, the
fdtdec_board_setup() is used to patch the correct address into
the U-Boot control DT.
Enable broadcom PHY support to support both PHYs.
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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Select CONFIG_SUPPORT_ACPI to allow usage of ACPI tables with RISC-V.
Signed-off-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Add fields for the location of ACPI tables to the global data.
Signed-off-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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Add fields for the location of ACPI tables to the global data.
Signed-off-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Ilias Apalodimas <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Fields X_FIRMWAE_CTRL and X_DSDT must be 64bit wide. Convert pointers to
to uintptr_t to fill these.
If field X_FIRMWARE_CTRL is filled, field FIRMWARE must be ignored. If
field X_DSDT is filled, field DSDT must be ignored. We should not fill
unused fields.
See the field definitions in chapter "5.2.9 Fixed ACPI Description Table
(FADT)" of the ACPI Specification 6.5.
Signed-off-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Sandbox uses an API to map between addresses and pointers. This allows
it to have (emulated) memory at zero and avoid arch-specific addressing
details. It also allows memory-mapped peripherals to work.
As an example, on many machines sandbox maps address 100 to pointer
value 10000000.
However this is not correct for ACPI, if sandbox starts another program
(e.g EFI app) and passes it the tables. That app has no knowledge of
sandbox's address mapping. So to make this work we want to store
10000000 as the value in the table.
Add two new 'nomap' functions which clearly make this exeption to how
sandbox works.
This should allow EFI apps to access ACPI tables with sandbox, e.g. for
testing purposes.
Signed-off-by: Simon Glass <[email protected]>
Suggested-by: Heinrich Schuchardt <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-tegra into next
Documentation updates for endeavoru, lg_x3, grouper and transformers,
addition of MIPI calibration clock name for T114 (inline with T124+),
conversion of TEGRA_SUPPORT_NON_SECURE into Kconfig and endeavoru
stability improvements.
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This restores support for IOT2050 by widely synchronizing its DT files
with the Linux kernel. We additionally need to add the alias restoration
that is still waiting for its upstream merge and the not-yet-upstreamed
bits needed for watchdog reboot detection.
Fixes: 4dbdc84754ea ("arm: dts: k3-am654: pull in dtb update from Linux")
Signed-off-by: Jan Kiszka <[email protected]>
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Manorit Chawdhry <[email protected]> says:
K3 devices have firewalls that are used to prevent illegal accesses to
memory regions that are deemed secure. The series prevents the illegal
accesses to ATF and OP-TEE regions that are present in different K3
devices.
AM62X, AM62AX and AM64X are currently in hold due to some firewall
configurations that our System Controller (TIFS) needs to handle.
The devices that are not configured with the firewalling nodes will not
be affected and can continue to work fine until the firewall nodes are
added so will be a non-blocking merge.
Test Logs: https://gist.github.com/manorit2001/4cead2fb3a19eb5d19005b3f54682627
CICD Run: https://github.com/u-boot/u-boot/pull/442
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The following commits adds the configuration of firewalls required to
protect ATF and OP-TEE memory region from non-secure reads and
writes using master and slave firewalls present in our K3 SOCs.
Signed-off-by: Manorit Chawdhry <[email protected]>
Tested-by: Thomas Richard <[email protected]>
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